Lines Matching +full:pre +full:- +full:determined
52 #define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */
76 #define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1))
77 #define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1))
79 /* structure to hold tx fifo information and pre-loading state
85 * ampdu_pld_size: number of bytes to be pre-loaded
86 * mcs2ampdu_table: per-mcs max # of mpdus in an ampdu
107 * ini_enable: per-tid initiator enable/disable of ampdu
112 * retry_limit_tid: per-tid mpdu transmit retry limit
113 * rr_retry_limit_tid: per-tid mpdu transmit retry limit at regular rate
114 * mpdu_density: min mpdu spacing (0-7) ==> 2^(x-1)/8 usec
117 * rx_factor: maximum rx ampdu factor (0-3) ==> 2^(13+x) bytes
154 ampdu->max_txlen[mcs][0][0] = (rate * dur) >> 3;
157 ampdu->max_txlen[mcs][1][0] = (rate * dur) >> 3;
160 ampdu->max_txlen[mcs][0][1] = (rate * dur) >> 3;
163 ampdu->max_txlen[mcs][1][1] = (rate * dur) >> 3;
169 if (BRCMS_PHY_11N_CAP(ampdu->wlc->band))
177 struct brcms_c_info *wlc = ampdu->wlc;
178 struct bcma_device *core = wlc->hw->d11core;
180 wlc->pub->_ampdu = false;
183 if (!(wlc->pub->_n_enab & SUPPORT_11N)) {
185 wlc->pub->unit);
186 return -ENOTSUPP;
190 wlc->pub->unit);
191 return -ENOTSUPP;
193 wlc->pub->_ampdu = on;
205 fifo = (ampdu->fifo_tb + j);
206 fifo->ampdu_pld_size = 0;
208 fifo->mcs2ampdu_table[i] = 255;
209 fifo->dmaxferrate = 0;
210 fifo->accum_txampdu = 0;
211 fifo->prev_txfunfl = 0;
212 fifo->accum_txfunfl = 0;
226 ampdu->wlc = wlc;
229 ampdu->ini_enable[i] = true;
231 ampdu->ini_enable[PRIO_8021D_VO] = false;
232 ampdu->ini_enable[PRIO_8021D_NC] = false;
235 ampdu->ini_enable[PRIO_8021D_NONE] = false;
236 ampdu->ini_enable[PRIO_8021D_BK] = false;
238 ampdu->ba_tx_wsize = AMPDU_TX_BA_DEF_WSIZE;
239 ampdu->ba_rx_wsize = AMPDU_RX_BA_DEF_WSIZE;
240 ampdu->mpdu_density = AMPDU_DEF_MPDU_DENSITY;
241 ampdu->max_pdu = AUTO;
242 ampdu->dur = AMPDU_MAX_DUR;
244 ampdu->ffpld_rsvd = AMPDU_DEF_FFPLD_RSVD;
249 if (BRCMS_ISNPHY(wlc->band) && NREV_LT(wlc->band->phyrev, 2))
250 ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_32K;
252 ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_64K;
253 ampdu->retry_limit = AMPDU_DEF_RETRY_LIMIT;
254 ampdu->rr_retry_limit = AMPDU_DEF_RR_RETRY_LIMIT;
257 ampdu->retry_limit_tid[i] = ampdu->retry_limit;
258 ampdu->rr_retry_limit_tid[i] = ampdu->rr_retry_limit;
261 brcms_c_scb_ampdu_update_max_txlen(ampdu, ampdu->dur);
262 ampdu->mfbr = false;
264 brcms_c_ampdu_set(ampdu, wlc->pub->_ampdu);
266 ampdu->tx_max_funl = FFPLD_TX_MAX_UNFL;
280 struct scb_ampdu *scb_ampdu = &scb->scb_ampdu;
283 scb_ampdu->max_pdu = AMPDU_NUM_MPDU;
287 if (ampdu->fifo_tb[i].ampdu_pld_size > FFPLD_PLD_INCR)
288 scb_ampdu->max_pdu = AMPDU_NUM_MPDU_LEGACY;
292 if (ampdu->max_pdu != AUTO)
293 scb_ampdu->max_pdu = (u8) ampdu->max_pdu;
295 scb_ampdu->release = min_t(u8, scb_ampdu->max_pdu,
298 if (scb_ampdu->max_rx_ampdu_bytes)
299 scb_ampdu->release = min_t(u8, scb_ampdu->release,
300 scb_ampdu->max_rx_ampdu_bytes / 1600);
302 scb_ampdu->release = min(scb_ampdu->release,
303 ampdu->fifo_tb[TX_AC_BE_FIFO].
309 brcms_c_scb_ampdu_update_config(ampdu, &du->wlc->pri_scb);
317 struct brcms_fifo_info *fifo = (ampdu->fifo_tb + f);
321 max_mpdu = min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS],
326 (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size))
328 fifo->dmaxferrate = dma_rate;
336 tmp = ((fifo->ampdu_pld_size * phy_rate) /
337 ((phy_rate - dma_rate) * FFPLD_MPDU_SIZE)) + 1;
339 fifo->mcs2ampdu_table[i] = (u8) tmp;
347 * Return 1 if pre-loading not active, -1 if not an underflow event,
348 * 0 if pre-loading module took care of the event.
352 struct ampdu_info *ampdu = wlc->ampdu;
357 struct brcms_fifo_info *fifo = (ampdu->fifo_tb + fid);
362 cur_txunfl = brcms_b_read_shm(wlc->hw,
365 new_txunfl = (u16) (cur_txunfl - fifo->prev_txfunfl);
367 brcms_dbg_ht(wlc->hw->d11core,
369 return -1;
371 fifo->prev_txfunfl = cur_txunfl;
373 if (!ampdu->tx_max_funl)
377 if (brcms_b_xmtfifo_sz_get(wlc->hw, fid, &xmtfifo_sz))
378 return -1;
380 if ((TXFIFO_SIZE_UNIT * (u32) xmtfifo_sz) <= ampdu->ffpld_rsvd)
383 max_pld_size = TXFIFO_SIZE_UNIT * xmtfifo_sz - ampdu->ffpld_rsvd;
384 fifo->accum_txfunfl += new_txunfl;
387 if (fifo->accum_txfunfl < 10)
390 brcms_dbg_ht(wlc->hw->d11core, "tx_underflows %d\n", fifo->accum_txfunfl);
392 max_mpdu = min_t(u8, fifo->mcs2ampdu_table[FFPLD_MAX_MCS],
399 if (fifo->ampdu_pld_size >= max_mpdu * FFPLD_MPDU_SIZE) {
400 fifo->accum_txfunfl = 0;
404 if (fifo->ampdu_pld_size < max_pld_size) {
407 fifo->ampdu_pld_size += FFPLD_PLD_INCR;
408 if (fifo->ampdu_pld_size > max_pld_size)
409 fifo->ampdu_pld_size = max_pld_size;
421 fifo->dmaxferrate =
423 (max_mpdu * FFPLD_MPDU_SIZE - fifo->ampdu_pld_size))
426 brcms_dbg_ht(wlc->hw->d11core,
428 "pre-load size %d\n",
429 fifo->dmaxferrate, fifo->ampdu_pld_size);
433 if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] > 1) {
434 if (fifo->mcs2ampdu_table[FFPLD_MAX_MCS] == 255)
435 fifo->mcs2ampdu_table[FFPLD_MAX_MCS] =
436 AMPDU_NUM_MPDU_LEGACY - 1;
438 fifo->mcs2ampdu_table[FFPLD_MAX_MCS] -= 1;
447 fifo->accum_txfunfl = 0;
456 struct ampdu_info *ampdu = wlc->ampdu;
457 struct scb *scb = &wlc->pri_scb;
458 scb_ampdu = &scb->scb_ampdu;
460 if (!ampdu->ini_enable[tid]) {
461 brcms_err(wlc->hw->d11core, "%s: Rejecting tid %d\n",
466 scb_ampdu->max_rx_ampdu_bytes = max_rx_ampdu_bytes;
472 session->wlc = wlc;
473 skb_queue_head_init(&session->skb_list);
474 session->max_ampdu_len = 0; /* determined from first MPDU */
475 session->max_ampdu_frames = 0; /* determined from first MPDU */
476 session->ampdu_len = 0;
477 session->dma_len = 0;
482 * frame cannot be accommodated in the current session, -ENOSPC is
488 struct brcms_c_info *wlc = session->wlc;
489 struct ampdu_info *ampdu = wlc->ampdu;
490 struct scb *scb = &wlc->pri_scb;
491 struct scb_ampdu *scb_ampdu = &scb->scb_ampdu;
493 struct ieee80211_tx_rate *txrate = tx_info->status.rates;
494 struct d11txh *txh = (struct d11txh *)p->data;
503 ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM];
505 fbr_iscck = !(le16_to_cpu(txh->XtraFrameTypes) & 0x03);
506 len = fbr_iscck ? BRCMS_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) :
507 BRCMS_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback);
510 ampdu_frames = skb_queue_len(&session->skb_list);
514 if (ampdu_frames + 1 > session->max_ampdu_frames ||
515 session->ampdu_len + len > session->max_ampdu_len)
516 return -ENOSPC;
521 * so return -ENOSPC anyway.
526 first = skb_peek(&session->skb_list);
527 if (p->priority != first->priority)
528 return -ENOSPC;
535 session->ampdu_len += len;
536 session->dma_len += p->len;
538 tid = (u8)p->priority;
541 if (txrate[0].count <= ampdu->rr_retry_limit_tid[tid]) {
551 uint fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
552 struct brcms_fifo_info *f = &du->fifo_tb[fifo];
558 plcp0 = txh->FragPLCPFallback[0];
559 plcp3 = txh->FragPLCPFallback[3];
567 session->max_ampdu_len = min(scb_ampdu->max_rx_ampdu_bytes,
568 ampdu->max_txlen[mcs][is40][sgi]);
570 session->max_ampdu_frames = scb_ampdu->max_pdu;
571 if (mcs_2_rate(mcs, true, false) >= f->dmaxferrate) {
572 session->max_ampdu_frames =
573 min_t(u16, f->mcs2ampdu_table[mcs],
574 session->max_ampdu_frames);
582 mcl = le16_to_cpu(txh->MacTxControlLow);
586 txh->MacTxControlLow = cpu_to_le16(mcl);
587 txh->PreloadSize = 0; /* always default to 0 */
589 skb_queue_tail(&session->skb_list, p);
596 struct brcms_c_info *wlc = session->wlc;
597 struct ampdu_info *ampdu = wlc->ampdu;
612 u16 dma_len = session->dma_len;
623 if (skb_queue_empty(&session->skb_list))
626 first = skb_peek(&session->skb_list);
627 last = skb_peek_tail(&session->skb_list);
630 txh = (struct d11txh *)last->data;
631 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
632 f = &du->fifo_tb[fifo];
634 mcl = le16_to_cpu(txh->MacTxControlLow);
637 txh->MacTxControlLow = cpu_to_le16(mcl);
640 ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM];
641 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = 0;
642 session->ampdu_len -= ndelim * AMPDU_DELIMITER_LEN;
645 fbr_iscck = ((le16_to_cpu(txh->XtraFrameTypes) & 0x3) == 0);
646 len = fbr_iscck ? BRCMS_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) :
647 BRCMS_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback);
648 session->ampdu_len -= roundup(len, 4) - len;
652 txrate = tx_info->status.rates;
653 txh = (struct d11txh *)first->data;
655 rts = (struct ieee80211_rts *)&txh->rts_frame;
657 mcl = le16_to_cpu(txh->MacTxControlLow);
664 if (ieee80211_is_rts(rts->frame_control)) {
668 if (ieee80211_is_cts(rts->frame_control)) {
672 txh->MacTxControlLow = cpu_to_le16(mcl);
678 plcp0 = txh->FragPLCPFallback[0];
684 if (CHSPEC_SB_UPPER(wlc_phy_chanspec_get(wlc->band->pi)))
696 fbr_iscck = !(le16_to_cpu(txh->XtraFrameTypes) & 0x03);
699 cck_rspec(cck_phy2mac_rate(txh->FragPLCPFallback[0]));
702 rspec_fallback |= txh->FragPLCPFallback[0] & ~MIMO_PLCP_40MHZ;
703 if (txh->FragPLCPFallback[0] & MIMO_PLCP_40MHZ)
716 BRCMS_SET_MIMO_PLCP_LEN(plcp, session->ampdu_len);
721 if (txh->MModeLen) {
723 session->ampdu_len);
724 txh->MModeLen = cpu_to_le16(mmodelen);
727 if (txh->MModeFbrLen) {
729 session->ampdu_len);
730 txh->MModeFbrLen = cpu_to_le16(mmfbrlen);
735 if (mcs_2_rate(mcs, true, false) >= f->dmaxferrate) {
736 dma_len = min(dma_len, f->ampdu_pld_size);
737 txh->PreloadSize = cpu_to_le16(dma_len);
739 txh->PreloadSize = 0;
742 mch = le16_to_cpu(txh->MacTxControlHigh);
758 session->ampdu_len, true);
759 rts->duration = cpu_to_le16(durid);
765 session->ampdu_len, true);
766 txh->RTSDurFallback = cpu_to_le16(durid);
768 txh->TxFesTimeNormal = rts->duration;
770 txh->TxFesTimeFallback = txh->RTSDurFallback;
776 txh->MacTxControlHigh = cpu_to_le16(mch);
778 BRCMS_SET_MIMO_PLCP_AMPDU(txh->FragPLCPFallback);
781 brcms_dbg_ht(wlc->hw->d11core, "wl%d: count %d ampdu_len %d\n",
782 wlc->pub->unit, skb_queue_len(&session->skb_list),
783 session->ampdu_len);
791 struct ieee80211_tx_rate *txrate = tx_info->status.rates;
796 txrate[i].idx = -1;
807 struct brcms_c_info *wlc = ampdu->wlc;
828 scb_ampdu = &scb->scb_ampdu;
829 tid = (u8) (p->priority);
831 ini = &scb_ampdu->ini[tid];
832 retry_limit = ampdu->retry_limit_tid[tid];
834 queue = txs->frameid & TXFID_QUEUE_MASK;
835 supr_status = txs->status & TX_STATUS_SUPR_MASK;
837 if (txs->status & TX_STATUS_ACK_RCV) {
838 WARN_ON(!(txs->status & TX_STATUS_INTERMEDIATE));
839 start_seq = txs->sequence >> SEQNUM_SHIFT;
840 bitmap[0] = (txs->status & TX_STATUS_BA_BMAP03_MASK) >>
862 brcms_dbg_ht(wlc->hw->d11core,
865 wlc->default_bss->chanspec));
868 brcms_err(wlc->hw->d11core,
878 * try tuning pre-loading or ampdu size
882 * if there were underflows, but pre-loading
887 } else if (txs->phyerr) {
888 brcms_dbg_ht(wlc->hw->d11core,
890 __func__, txs->phyerr);
897 txh = (struct d11txh *) p->data;
898 mcl = le16_to_cpu(txh->MacTxControlLow);
901 seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT;
903 trace_brcms_txdesc(&wlc->hw->d11core->dev, txh, sizeof(*txh));
907 mimoantsel = le16_to_cpu(txh->ABI_MimoAntSel);
920 brcms_dbg_ht(wlc->hw->d11core,
926 ini->txretry[index] = 0;
935 tx_info->flags |= IEEE80211_TX_STAT_ACK;
936 tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
937 tx_info->status.ampdu_ack_len =
938 tx_info->status.ampdu_len = 1;
943 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw,
950 if (retry && (ini->txretry[index] < (int)retry_limit)) {
952 ini->txretry[index]++;
963 tx_info->status.ampdu_ack_len = 0;
964 tx_info->status.ampdu_len = 1;
965 tx_info->flags |=
969 brcms_dbg_ht(wlc->hw->d11core,
972 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw,
983 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
987 brcms_c_antsel_antsel2id(wlc->asi, mimoantsel);
994 struct brcms_c_info *wlc = ampdu->wlc;
1001 if (txs->status & TX_STATUS_ACK_RCV) {
1005 s1 = bcma_read32(wlc->hw->d11core, D11REGOFFS(frmtxstatus));
1011 s1 = bcma_read32(wlc->hw->d11core,
1015 s2 = bcma_read32(wlc->hw->d11core, D11REGOFFS(frmtxstatus2));
1022 u8 queue = txs->frameid & TXFID_QUEUE_MASK;
1026 txh = (struct d11txh *) p->data;
1027 trace_brcms_txdesc(&wlc->hw->d11core->dev, txh,
1029 mcl = le16_to_cpu(txh->MacTxControlLow);
1035 p = dma_getnexttxp(wlc->hw->di[queue],
1047 memcpy(template, wlc->pub->cur_etheraddr, ETH_ALEN);
1048 brcms_b_write_template_ram(wlc->hw, (T_BA_TPL_BASE + 16),
1055 return wlc->ampdu->ini_enable[tid];
1060 struct brcms_c_info *wlc = ampdu->wlc;
1066 if ((ampdu->rx_factor & IEEE80211_HT_AMPDU_PARM_FACTOR) ==
1068 brcms_b_write_shm(wlc->hw, M_MIMO_MAXSYM, MIMO_MAXSYM_MAX);
1069 brcms_b_write_shm(wlc->hw, M_WATCHDOG_8TU, WATCHDOG_8TU_MAX);
1071 brcms_b_write_shm(wlc->hw, M_MIMO_MAXSYM, MIMO_MAXSYM_DEF);
1072 brcms_b_write_shm(wlc->hw, M_WATCHDOG_8TU, WATCHDOG_8TU_DEF);
1084 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) &&
1085 (tx_info->rate_driver_data[0] == sta || sta == NULL))
1086 tx_info->rate_driver_data[0] = NULL;
1096 brcms_c_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu);