Lines Matching full:gain
28 #define B43_NPHY_C1_CGAINI B43_PHY_N(0x01C) /* Core 1 compute gain info */
29 #define B43_NPHY_C1_CGAINI_GAINBKOFF 0x001F /* Gain backoff */
31 #define B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */
33 #define B43_NPHY_C1_CGAINI_GAINSTEP 0x1C00 /* Gain step */
36 #define B43_NPHY_C1_CCK_CGAINI B43_PHY_N(0x01D) /* Core 1 CCK compute gain info */
37 #define B43_NPHY_C1_CCK_CGAINI_GAINBKOFF 0x001F /* Gain backoff */
38 #define B43_NPHY_C1_CCK_CGAINI_CLIPGBKOFF 0x01E0 /* CCK barely clip gain backoff */
39 #define B43_NPHY_C1_MINMAX_GAIN B43_PHY_N(0x01E) /* Core 1 min/max gain */
40 #define B43_NPHY_C1_MINGAIN 0x00FF /* Minimum gain */
42 #define B43_NPHY_C1_MAXGAIN 0xFF00 /* Maximum gain */
44 #define B43_NPHY_C1_CCK_MINMAX_GAIN B43_PHY_N(0x01F) /* Core 1 CCK min/max gain */
45 #define B43_NPHY_C1_CCK_MINGAIN 0x00FF /* Minimum gain */
47 #define B43_NPHY_C1_CCK_MAXGAIN 0xFF00 /* Maximum gain */
49 #define B43_NPHY_C1_INITGAIN B43_PHY_N(0x020) /* Core 1 initial gain code */
60 #define B43_NPHY_C1_CLIP1_HIGAIN B43_PHY_N(0x021) /* Core 1 clip1 high gain code */
62 #define B43_NPHY_C1_CLIP1_MEDGAIN B43_PHY_N(0x022) /* Core 1 clip1 medium gain code */
64 #define B43_NPHY_C1_CLIP1_LOGAIN B43_PHY_N(0x023) /* Core 1 clip1 low gain code */
66 #define B43_NPHY_C1_CLIP2_GAIN B43_PHY_N(0x024) /* Core 1 clip2 gain code */
68 #define B43_NPHY_C1_FILTERGAIN B43_PHY_N(0x025) /* Core 1 filter gain */
86 #define B43_NPHY_C2_CGAINI B43_PHY_N(0x032) /* Core 2 compute gain info */
87 #define B43_NPHY_C2_CGAINI_GAINBKOFF 0x001F /* Gain backoff */
89 #define B43_NPHY_C2_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */
91 #define B43_NPHY_C2_CGAINI_GAINSTEP 0x1C00 /* Gain step */
94 #define B43_NPHY_C2_CCK_CGAINI B43_PHY_N(0x033) /* Core 2 CCK compute gain info */
95 #define B43_NPHY_C2_CCK_CGAINI_GAINBKOFF 0x001F /* Gain backoff */
96 #define B43_NPHY_C2_CCK_CGAINI_CLIPGBKOFF 0x01E0 /* CCK barely clip gain backoff */
97 #define B43_NPHY_C2_MINMAX_GAIN B43_PHY_N(0x034) /* Core 2 min/max gain */
98 #define B43_NPHY_C2_MINGAIN 0x00FF /* Minimum gain */
100 #define B43_NPHY_C2_MAXGAIN 0xFF00 /* Maximum gain */
102 #define B43_NPHY_C2_CCK_MINMAX_GAIN B43_PHY_N(0x035) /* Core 2 CCK min/max gain */
103 #define B43_NPHY_C2_CCK_MINGAIN 0x00FF /* Minimum gain */
105 #define B43_NPHY_C2_CCK_MAXGAIN 0xFF00 /* Maximum gain */
107 #define B43_NPHY_C2_INITGAIN B43_PHY_N(0x036) /* Core 2 initial gain code */
118 #define B43_NPHY_C2_CLIP1_HIGAIN B43_PHY_N(0x037) /* Core 2 clip1 high gain code */
120 #define B43_NPHY_C2_CLIP1_MEDGAIN B43_PHY_N(0x038) /* Core 2 clip1 medium gain code */
122 #define B43_NPHY_C2_CLIP1_LOGAIN B43_PHY_N(0x039) /* Core 2 clip1 low gain code */
124 #define B43_NPHY_C2_CLIP2_GAIN B43_PHY_N(0x03A) /* Core 2 clip2 gain code */
126 #define B43_NPHY_C2_FILTERGAIN B43_PHY_N(0x03B) /* Core 2 filter gain */
169 #define B43_NPHY_INITGAIN_SLEN B43_PHY_N(0x064) /* Initial gain settle length */
170 #define B43_NPHY_CLIP1GAIN_SLEN B43_PHY_N(0x065) /* Clip1 gain settle length */
171 #define B43_NPHY_CLIP2GAIN_SLEN B43_PHY_N(0x066) /* Clip2 gain settle length */
172 #define B43_NPHY_PACKGAIN_SLEN B43_PHY_N(0x067) /* Packet gain settle length */
210 #define B43_NPHY_RFCTL_RXG1 B43_PHY_N(0x07B) /* RF control (RX gain 1) */
211 #define B43_NPHY_RFCTL_TXG1 B43_PHY_N(0x07C) /* RF control (TX gain 1) */
220 #define B43_NPHY_RFCTL_RXG2 B43_PHY_N(0x07E) /* RF control (RX gain 2) */
221 #define B43_NPHY_RFCTL_TXG2 B43_PHY_N(0x07F) /* RF control (TX gain 2) */
230 #define B43_NPHY_RFCTL_RXG3 B43_PHY_N(0x081) /* RF control (RX gain 3) */
231 #define B43_NPHY_RFCTL_TXG3 B43_PHY_N(0x082) /* RF control (TX gain 3) */
240 #define B43_NPHY_RFCTL_RXG4 B43_PHY_N(0x084) /* RF control (RX gain 4) */
241 #define B43_NPHY_RFCTL_TXG4 B43_PHY_N(0x085) /* RF control (TX gain 4) */
285 #define B43_NPHY_RFSEQTR_UPGH 0x0004 /* Update gain H */
286 #define B43_NPHY_RFSEQTR_UPGL 0x0008 /* Update gain L */
287 #define B43_NPHY_RFSEQTR_UPGU 0x0010 /* Update gain U */
295 #define B43_NPHY_AFECTL_DACGAIN1 B43_PHY_N(0x0AA) /* AFE control DAC gain 1 */
296 #define B43_NPHY_AFECTL_DACGAIN2 B43_PHY_N(0x0AB) /* AFE control DAC gain 2 */
297 #define B43_NPHY_AFECTL_DACGAIN3 B43_PHY_N(0x0AC) /* AFE control DAC gain 3 */
298 #define B43_NPHY_AFECTL_DACGAIN4 B43_PHY_N(0x0AD) /* AFE control DAC gain 4 */
493 #define B43_NPHY_OVER_DGAIN0 B43_PHY_N(0x152) /* Override digital gain 0 */
494 #define B43_NPHY_OVER_DGAIN1 B43_PHY_N(0x153) /* Override digital gain 1 */
495 #define B43_NPHY_OVER_DGAIN_FDGV 0x0007 /* Force digital gain value */
497 #define B43_NPHY_OVER_DGAIN_FDGEN 0x0008 /* Force digital gain enable */
498 #define B43_NPHY_OVER_DGAIN_CCKDGECV 0xFF00 /* CCK digital gain enable count value */
509 #define B43_NPHY_FREQGAIN0 B43_PHY_N(0x160) /* Frequency gain 0 */
510 #define B43_NPHY_FREQGAIN1 B43_PHY_N(0x161) /* Frequency gain 1 */
511 #define B43_NPHY_FREQGAIN2 B43_PHY_N(0x162) /* Frequency gain 2 */
512 #define B43_NPHY_FREQGAIN3 B43_PHY_N(0x163) /* Frequency gain 3 */
513 #define B43_NPHY_FREQGAIN4 B43_PHY_N(0x164) /* Frequency gain 4 */
514 #define B43_NPHY_FREQGAIN5 B43_PHY_N(0x165) /* Frequency gain 5 */
515 #define B43_NPHY_FREQGAIN6 B43_PHY_N(0x166) /* Frequency gain 6 */
516 #define B43_NPHY_FREQGAIN7 B43_PHY_N(0x167) /* Frequency gain 7 */
517 #define B43_NPHY_FREQGAIN_BYPASS B43_PHY_N(0x168) /* Frequency gain bypass */
521 #define B43_NPHY_LTRN_OFFGAIN B43_PHY_N(0x16F) /* LTRN offset gain */
600 #define B43_NPHY_LTRN_OFF_G20L B43_PHY_N(0x1C4) /* LTRN offset gain 20L */
602 #define B43_NPHY_LTRN_OFF_G20U B43_PHY_N(0x1C6) /* LTRN offset gain 20U */
604 #define B43_NPHY_DSSSCCK_GAINSL B43_PHY_N(0x1C8) /* DSSS/CCK gain settle length */
675 #define B43_NPHY_SMALLSGS_LEN B43_PHY_N(0x1EF) /* Small sig gain settle length */
676 #define B43_NPHY_PHYSTAT_GAIN0 B43_PHY_N(0x1F0) /* PHY stats gain info 0 */
677 #define B43_NPHY_PHYSTAT_GAIN1 B43_PHY_N(0x1F1) /* PHY stats gain info 1 */