Lines Matching +full:rx +full:- +full:tx
1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* Definitions for the LP-PHY */
11 #define B43_LPPHY_B_RX_STAT0 B43_PHY_CCK(0x04) /* B PHY RX Status0 */
12 #define B43_LPPHY_B_RX_STAT1 B43_PHY_CCK(0x05) /* B PHY RX Status1 */
22 #define B43_LPPHY_PA_RAMP_TX_TO B43_PHY_CCK(0x10) /* PA Ramp TX Timeout */
24 #define B43_LPPHY_PA_RAMP_TX_TIME_IN B43_PHY_CCK(0x12) /* PA ramp TX Time in */
25 #define B43_LPPHY_RX_FILTER_TIME_IN B43_PHY_CCK(0x13) /* RX Filter Time in */
42 #define B43_LPPHY_TX_DCOFFSET1 B43_PHY_CCK(0x2E) /* TX DCOffset1 */
43 #define B43_LPPHY_TX_DCOFFSET2 B43_PHY_CCK(0x2F) /* TX DCOffset2 */
57 #define B43_LPPHY_RX_DELAYCOMP B43_PHY_CCK(0x44) /* RX DelayComp */
77 #define B43_LPPHY_B_RX_STAT2 B43_PHY_CCK(0x5E) /* B PHY RX Status2 */
78 #define B43_LPPHY_B_RX_STAT3 B43_PHY_CCK(0x5F) /* B PHY RX Status3 */
96 #define B43_LPPHY_RX_STAT0 B43_PHY_OFDM(0x04) /* RX Status0 */
97 #define B43_LPPHY_RX_STAT1 B43_PHY_OFDM(0x05) /* RX Status1 */
98 #define B43_LPPHY_TX_ERROR B43_PHY_OFDM(0x07) /* TX Error */
184 #define B43_LPPHY_RESET_LEN_OFDM_TX_ADDR B43_PHY_OFDM(0x5E) /* Reset len Ofdm TX Address */
185 #define B43_LPPHY_RESET_LEN_OFDM_RX_ADDR B43_PHY_OFDM(0x5F) /* Reset len Ofdm RX Address */
191 #define B43_LPPHY_PACKET_RX_ACTIVE_TO B43_PHY_OFDM(0x65) /* packet rx Active timeout */
194 #define B43_LPPHY_OFDM_TX_PHY_CRS_DELAY_VAL B43_PHY_OFDM(0x69) /* ofdm tx phy CRS Delay Value */
195 #define B43_LPPHY_CCK_TX_PHY_CRS_DELAY_VAL B43_PHY_OFDM(0x6A) /* cck tx phy CRS Delay Value */
244 #define B43_LPPHY_RX_COMP_COEFF_S B43_PHY_OFDM(0x9E) /* RX Comp coefficient(s) */
250 #define B43_LPPHY_TX_PWR_CTL_CMD B43_PHY_OFDM(0xA4) /* TX Power Control Cmd */
251 #define B43_LPPHY_TX_PWR_CTL_CMD_MODE 0xE000 /* TX power control mode mask */
252 #define B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF 0x0000 /* TX power control is OFF */
253 #define B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW 0x8000 /* TX power control is SOFTWARE */
254 #define B43_LPPHY_TX_PWR_CTL_CMD_MODE_HW 0xE000 /* TX power control is HARDWARE */
255 #define B43_LPPHY_TX_PWR_CTL_NNUM B43_PHY_OFDM(0xA5) /* TX Power Control Nnum */
256 #define B43_LPPHY_TX_PWR_CTL_IDLETSSI B43_PHY_OFDM(0xA6) /* TX Power Control IdleTssi */
257 #define B43_LPPHY_TX_PWR_CTL_TARGETPWR B43_PHY_OFDM(0xA7) /* TX Power Control TargetPower */
258 #define B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT B43_PHY_OFDM(0xA8) /* TX Power Control DeltaPower Limit…
259 #define B43_LPPHY_TX_PWR_CTL_BASEINDEX B43_PHY_OFDM(0xA9) /* TX Power Control BaseIndex */
260 #define B43_LPPHY_TX_PWR_CTL_PWR_INDEX B43_PHY_OFDM(0xAA) /* TX Power Control Power Index */
261 #define B43_LPPHY_TX_PWR_CTL_STAT B43_PHY_OFDM(0xAB) /* TX Power Control Status */
263 #define B43_LPPHY_RX_RADIO_CTL_FILTER_STATE B43_PHY_OFDM(0xAD) /* RX Radio Control Filter State */
264 #define B43_LPPHY_RX_RADIO_CTL B43_PHY_OFDM(0xAE) /* RX Radio Control */
271 #define B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL B43_PHY_OFDM(0xB5) /* TX gain Control override val */
272 #define B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL B43_PHY_OFDM(0xB6) /* RX gain Control override val */
369 #define B2062_N_TX_CTL0 B43_LP_NORTH(0x045) /* TX Control 0 (north) */
370 #define B2062_N_TX_CTL1 B43_LP_NORTH(0x046) /* TX Control 1 (north) */
371 #define B2062_N_TX_CTL2 B43_LP_NORTH(0x047) /* TX Control 2 (north) */
372 #define B2062_N_TX_CTL3 B43_LP_NORTH(0x048) /* TX Control 3 (north) */
373 #define B2062_N_TX_CTL4 B43_LP_NORTH(0x049) /* TX Control 4 (north) */
374 #define B2062_N_TX_CTL5 B43_LP_NORTH(0x04A) /* TX Control 5 (north) */
375 #define B2062_N_TX_CTL6 B43_LP_NORTH(0x04B) /* TX Control 6 (north) */
376 #define B2062_N_TX_CTL7 B43_LP_NORTH(0x04C) /* TX Control 7 (north) */
377 #define B2062_N_TX_CTL8 B43_LP_NORTH(0x04D) /* TX Control 8 (north) */
378 #define B2062_N_TX_CTL9 B43_LP_NORTH(0x04E) /* TX Control 9 (north) */
379 #define B2062_N_TX_CTL_A B43_LP_NORTH(0x04F) /* TX Control A (north) */
380 #define B2062_N_TX_GC2G B43_LP_NORTH(0x050) /* TX GC2G (north) */
381 #define B2062_N_TX_GC5G B43_LP_NORTH(0x051) /* TX GC5G (north) */
382 #define B2062_N_TX_TUNE B43_LP_NORTH(0x052) /* TX Tune (north) */
383 #define B2062_N_TX_PAD B43_LP_NORTH(0x053) /* TX PAD (north) */
384 #define B2062_N_TX_PGA B43_LP_NORTH(0x054) /* TX PGA (north) */
385 #define B2062_N_TX_PADAUX B43_LP_NORTH(0x055) /* TX PADAUX (north) */
386 #define B2062_N_TX_PGAAUX B43_LP_NORTH(0x056) /* TX PGAAUX (north) */
551 #define B2063_G_RX_SP1 B43_LP_RADIO(0x021) /* G RX SP 1 */
552 #define B2063_G_RX_SP2 B43_LP_RADIO(0x022) /* G RX SP 2 */
553 #define B2063_G_RX_SP3 B43_LP_RADIO(0x023) /* G RX SP 3 */
554 #define B2063_G_RX_SP4 B43_LP_RADIO(0x024) /* G RX SP 4 */
555 #define B2063_G_RX_SP5 B43_LP_RADIO(0x025) /* G RX SP 5 */
556 #define B2063_G_RX_SP6 B43_LP_RADIO(0x026) /* G RX SP 6 */
557 #define B2063_G_RX_SP7 B43_LP_RADIO(0x027) /* G RX SP 7 */
558 #define B2063_G_RX_SP8 B43_LP_RADIO(0x028) /* G RX SP 8 */
559 #define B2063_G_RX_SP9 B43_LP_RADIO(0x029) /* G RX SP 9 */
560 #define B2063_G_RX_SP10 B43_LP_RADIO(0x02A) /* G RX SP 10 */
561 #define B2063_G_RX_SP11 B43_LP_RADIO(0x02B) /* G RX SP 11 */
562 #define B2063_A_RX_SP1 B43_LP_RADIO(0x02C) /* A RX SP 1 */
563 #define B2063_A_RX_SP2 B43_LP_RADIO(0x02D) /* A RX SP 2 */
564 #define B2063_A_RX_SP3 B43_LP_RADIO(0x02E) /* A RX SP 3 */
565 #define B2063_A_RX_SP4 B43_LP_RADIO(0x02F) /* A RX SP 4 */
566 #define B2063_A_RX_SP5 B43_LP_RADIO(0x030) /* A RX SP 5 */
567 #define B2063_A_RX_SP6 B43_LP_RADIO(0x031) /* A RX SP 6 */
568 #define B2063_A_RX_SP7 B43_LP_RADIO(0x032) /* A RX SP 7 */
569 #define B2063_RX_BB_SP1 B43_LP_RADIO(0x033) /* RX BB SP 1 */
570 #define B2063_RX_BB_SP2 B43_LP_RADIO(0x034) /* RX BB SP 2 */
571 #define B2063_RX_BB_SP3 B43_LP_RADIO(0x035) /* RX BB SP 3 */
572 #define B2063_RX_BB_SP4 B43_LP_RADIO(0x036) /* RX BB SP 4 */
573 #define B2063_RX_BB_SP5 B43_LP_RADIO(0x037) /* RX BB SP 5 */
574 #define B2063_RX_BB_SP6 B43_LP_RADIO(0x038) /* RX BB SP 6 */
575 #define B2063_RX_BB_SP7 B43_LP_RADIO(0x039) /* RX BB SP 7 */
576 #define B2063_RX_BB_SP8 B43_LP_RADIO(0x03A) /* RX BB SP 8 */
577 #define B2063_TX_RF_SP1 B43_LP_RADIO(0x03B) /* TX RF SP 1 */
578 #define B2063_TX_RF_SP2 B43_LP_RADIO(0x03C) /* TX RF SP 2 */
579 #define B2063_TX_RF_SP3 B43_LP_RADIO(0x03D) /* TX RF SP 3 */
580 #define B2063_TX_RF_SP4 B43_LP_RADIO(0x03E) /* TX RF SP 4 */
581 #define B2063_TX_RF_SP5 B43_LP_RADIO(0x03F) /* TX RF SP 5 */
582 #define B2063_TX_RF_SP6 B43_LP_RADIO(0x040) /* TX RF SP 6 */
583 #define B2063_TX_RF_SP7 B43_LP_RADIO(0x041) /* TX RF SP 7 */
584 #define B2063_TX_RF_SP8 B43_LP_RADIO(0x042) /* TX RF SP 8 */
585 #define B2063_TX_RF_SP9 B43_LP_RADIO(0x043) /* TX RF SP 9 */
586 #define B2063_TX_RF_SP10 B43_LP_RADIO(0x044) /* TX RF SP 10 */
587 #define B2063_TX_RF_SP11 B43_LP_RADIO(0x045) /* TX RF SP 11 */
588 #define B2063_TX_RF_SP12 B43_LP_RADIO(0x046) /* TX RF SP 12 */
589 #define B2063_TX_RF_SP13 B43_LP_RADIO(0x047) /* TX RF SP 13 */
590 #define B2063_TX_RF_SP14 B43_LP_RADIO(0x048) /* TX RF SP 14 */
591 #define B2063_TX_RF_SP15 B43_LP_RADIO(0x049) /* TX RF SP 15 */
592 #define B2063_TX_RF_SP16 B43_LP_RADIO(0x04A) /* TX RF SP 16 */
593 #define B2063_TX_RF_SP17 B43_LP_RADIO(0x04B) /* TX RF SP 17 */
601 #define B2063_TX_BB_SP1 B43_LP_RADIO(0x053) /* TX BB SP 1 */
602 #define B2063_TX_BB_SP2 B43_LP_RADIO(0x054) /* TX BB SP 2 */
603 #define B2063_TX_BB_SP3 B43_LP_RADIO(0x055) /* TX BB SP 3 */
696 #define B2063_G_RX_1ST1 B43_LP_RADIO(0x0B2) /* G RX 1ST 1 */
697 #define B2063_G_RX_1ST2 B43_LP_RADIO(0x0B3) /* G RX 1ST 2 */
698 #define B2063_G_RX_1ST3 B43_LP_RADIO(0x0B4) /* G RX 1ST 3 */
699 #define B2063_G_RX_2ND1 B43_LP_RADIO(0x0B5) /* G RX 2ND 1 */
700 #define B2063_G_RX_2ND2 B43_LP_RADIO(0x0B6) /* G RX 2ND 2 */
701 #define B2063_G_RX_2ND3 B43_LP_RADIO(0x0B7) /* G RX 2ND 3 */
702 #define B2063_G_RX_2ND4 B43_LP_RADIO(0x0B8) /* G RX 2ND 4 */
703 #define B2063_G_RX_2ND5 B43_LP_RADIO(0x0B9) /* G RX 2ND 5 */
704 #define B2063_G_RX_2ND6 B43_LP_RADIO(0x0BA) /* G RX 2ND 6 */
705 #define B2063_G_RX_2ND7 B43_LP_RADIO(0x0BB) /* G RX 2ND 7 */
706 #define B2063_G_RX_2ND8 B43_LP_RADIO(0x0BC) /* G RX 2ND 8 */
707 #define B2063_G_RX_PS1 B43_LP_RADIO(0x0BD) /* G RX PS 1 */
708 #define B2063_G_RX_PS2 B43_LP_RADIO(0x0BE) /* G RX PS 2 */
709 #define B2063_G_RX_PS3 B43_LP_RADIO(0x0BF) /* G RX PS 3 */
710 #define B2063_G_RX_PS4 B43_LP_RADIO(0x0C0) /* G RX PS 4 */
711 #define B2063_G_RX_PS5 B43_LP_RADIO(0x0C1) /* G RX PS 5 */
712 #define B2063_G_RX_MIX1 B43_LP_RADIO(0x0C2) /* G RX MIX 1 */
713 #define B2063_G_RX_MIX2 B43_LP_RADIO(0x0C3) /* G RX MIX 2 */
714 #define B2063_G_RX_MIX3 B43_LP_RADIO(0x0C4) /* G RX MIX 3 */
715 #define B2063_G_RX_MIX4 B43_LP_RADIO(0x0C5) /* G RX MIX 4 */
716 #define B2063_G_RX_MIX5 B43_LP_RADIO(0x0C6) /* G RX MIX 5 */
717 #define B2063_G_RX_MIX6 B43_LP_RADIO(0x0C7) /* G RX MIX 6 */
718 #define B2063_G_RX_MIX7 B43_LP_RADIO(0x0C8) /* G RX MIX 7 */
719 #define B2063_G_RX_MIX8 B43_LP_RADIO(0x0C9) /* G RX MIX 8 */
720 #define B2063_G_RX_PDET1 B43_LP_RADIO(0x0CA) /* G RX PDET 1 */
721 #define B2063_G_RX_SPARES1 B43_LP_RADIO(0x0CB) /* G RX SPARES 1 */
722 #define B2063_G_RX_SPARES2 B43_LP_RADIO(0x0CC) /* G RX SPARES 2 */
723 #define B2063_G_RX_SPARES3 B43_LP_RADIO(0x0CD) /* G RX SPARES 3 */
724 #define B2063_A_RX_1ST1 B43_LP_RADIO(0x0CE) /* A RX 1ST 1 */
725 #define B2063_A_RX_1ST2 B43_LP_RADIO(0x0CF) /* A RX 1ST 2 */
726 #define B2063_A_RX_1ST3 B43_LP_RADIO(0x0D0) /* A RX 1ST 3 */
727 #define B2063_A_RX_1ST4 B43_LP_RADIO(0x0D1) /* A RX 1ST 4 */
728 #define B2063_A_RX_1ST5 B43_LP_RADIO(0x0D2) /* A RX 1ST 5 */
729 #define B2063_A_RX_2ND1 B43_LP_RADIO(0x0D3) /* A RX 2ND 1 */
730 #define B2063_A_RX_2ND2 B43_LP_RADIO(0x0D4) /* A RX 2ND 2 */
731 #define B2063_A_RX_2ND3 B43_LP_RADIO(0x0D5) /* A RX 2ND 3 */
732 #define B2063_A_RX_2ND4 B43_LP_RADIO(0x0D6) /* A RX 2ND 4 */
733 #define B2063_A_RX_2ND5 B43_LP_RADIO(0x0D7) /* A RX 2ND 5 */
734 #define B2063_A_RX_2ND6 B43_LP_RADIO(0x0D8) /* A RX 2ND 6 */
735 #define B2063_A_RX_2ND7 B43_LP_RADIO(0x0D9) /* A RX 2ND 7 */
736 #define B2063_A_RX_PS1 B43_LP_RADIO(0x0DA) /* A RX PS 1 */
737 #define B2063_A_RX_PS2 B43_LP_RADIO(0x0DB) /* A RX PS 2 */
738 #define B2063_A_RX_PS3 B43_LP_RADIO(0x0DC) /* A RX PS 3 */
739 #define B2063_A_RX_PS4 B43_LP_RADIO(0x0DD) /* A RX PS 4 */
740 #define B2063_A_RX_PS5 B43_LP_RADIO(0x0DE) /* A RX PS 5 */
741 #define B2063_A_RX_PS6 B43_LP_RADIO(0x0DF) /* A RX PS 6 */
742 #define B2063_A_RX_MIX1 B43_LP_RADIO(0x0E0) /* A RX MIX 1 */
743 #define B2063_A_RX_MIX2 B43_LP_RADIO(0x0E1) /* A RX MIX 2 */
744 #define B2063_A_RX_MIX3 B43_LP_RADIO(0x0E2) /* A RX MIX 3 */
745 #define B2063_A_RX_MIX4 B43_LP_RADIO(0x0E3) /* A RX MIX 4 */
746 #define B2063_A_RX_MIX5 B43_LP_RADIO(0x0E4) /* A RX MIX 5 */
747 #define B2063_A_RX_MIX6 B43_LP_RADIO(0x0E5) /* A RX MIX 6 */
748 #define B2063_A_RX_MIX7 B43_LP_RADIO(0x0E6) /* A RX MIX 7 */
749 #define B2063_A_RX_MIX8 B43_LP_RADIO(0x0E7) /* A RX MIX 8 */
750 #define B2063_A_RX_PWRDET1 B43_LP_RADIO(0x0E8) /* A RX PWRDET 1 */
751 #define B2063_A_RX_SPARE1 B43_LP_RADIO(0x0E9) /* A RX SPARE 1 */
752 #define B2063_A_RX_SPARE2 B43_LP_RADIO(0x0EA) /* A RX SPARE 2 */
753 #define B2063_A_RX_SPARE3 B43_LP_RADIO(0x0EB) /* A RX SPARE 3 */
754 #define B2063_RX_TIA_CTL1 B43_LP_RADIO(0x0EC) /* RX TIA Control 1 */
755 #define B2063_RX_TIA_CTL2 B43_LP_RADIO(0x0ED) /* RX TIA Control 2 */
756 #define B2063_RX_TIA_CTL3 B43_LP_RADIO(0x0EE) /* RX TIA Control 3 */
757 #define B2063_RX_TIA_CTL4 B43_LP_RADIO(0x0EF) /* RX TIA Control 4 */
758 #define B2063_RX_TIA_CTL5 B43_LP_RADIO(0x0F0) /* RX TIA Control 5 */
759 #define B2063_RX_TIA_CTL6 B43_LP_RADIO(0x0F1) /* RX TIA Control 6 */
760 #define B2063_RX_BB_CTL1 B43_LP_RADIO(0x0F2) /* RX BB Control 1 */
761 #define B2063_RX_BB_CTL2 B43_LP_RADIO(0x0F3) /* RX BB Control 2 */
762 #define B2063_RX_BB_CTL3 B43_LP_RADIO(0x0F4) /* RX BB Control 3 */
763 #define B2063_RX_BB_CTL4 B43_LP_RADIO(0x0F5) /* RX BB Control 4 */
764 #define B2063_RX_BB_CTL5 B43_LP_RADIO(0x0F6) /* RX BB Control 5 */
765 #define B2063_RX_BB_CTL6 B43_LP_RADIO(0x0F7) /* RX BB Control 6 */
766 #define B2063_RX_BB_CTL7 B43_LP_RADIO(0x0F8) /* RX BB Control 7 */
767 #define B2063_RX_BB_CTL8 B43_LP_RADIO(0x0F9) /* RX BB Control 8 */
768 #define B2063_RX_BB_CTL9 B43_LP_RADIO(0x0FA) /* RX BB Control 9 */
769 #define B2063_TX_RF_CTL1 B43_LP_RADIO(0x0FB) /* TX RF Control 1 */
770 #define B2063_TX_RF_IDAC_LO_RF_I B43_LP_RADIO(0x0FC) /* TX RF IDAC LO RF I */
771 #define B2063_TX_RF_IDAC_LO_RF_Q B43_LP_RADIO(0x0FD) /* TX RF IDAC LO RF Q */
772 #define B2063_TX_RF_IDAC_LO_BB_I B43_LP_RADIO(0x0FE) /* TX RF IDAC LO BB I */
773 #define B2063_TX_RF_IDAC_LO_BB_Q B43_LP_RADIO(0x0FF) /* TX RF IDAC LO BB Q */
774 #define B2063_TX_RF_CTL2 B43_LP_RADIO(0x100) /* TX RF Control 2 */
775 #define B2063_TX_RF_CTL3 B43_LP_RADIO(0x101) /* TX RF Control 3 */
776 #define B2063_TX_RF_CTL4 B43_LP_RADIO(0x102) /* TX RF Control 4 */
777 #define B2063_TX_RF_CTL5 B43_LP_RADIO(0x103) /* TX RF Control 5 */
778 #define B2063_TX_RF_CTL6 B43_LP_RADIO(0x104) /* TX RF Control 6 */
779 #define B2063_TX_RF_CTL7 B43_LP_RADIO(0x105) /* TX RF Control 7 */
780 #define B2063_TX_RF_CTL8 B43_LP_RADIO(0x106) /* TX RF Control 8 */
781 #define B2063_TX_RF_CTL9 B43_LP_RADIO(0x107) /* TX RF Control 9 */
782 #define B2063_TX_RF_CTL10 B43_LP_RADIO(0x108) /* TX RF Control 10 */
783 #define B2063_TX_RF_CTL14 B43_LP_RADIO(0x109) /* TX RF Control 14 */
784 #define B2063_TX_RF_CTL15 B43_LP_RADIO(0x10A) /* TX RF Control 15 */
798 #define B2063_TX_BB_CTL1 B43_LP_RADIO(0x118) /* TX BB Control 1 */
799 #define B2063_TX_BB_CTL2 B43_LP_RADIO(0x119) /* TX BB Control 2 */
800 #define B2063_TX_BB_CTL3 B43_LP_RADIO(0x11A) /* TX BB Control 3 */
801 #define B2063_TX_BB_CTL4 B43_LP_RADIO(0x11B) /* TX BB Control 4 */
810 #define B2063_TX_RX_LOOPBACK1 B43_LP_RADIO(0x124) /* TX/RX LOOPBACK 1 */
811 #define B2063_TX_RX_LOOPBACK2 B43_LP_RADIO(0x125) /* TX/RX LOOPBACK 2 */
820 B43_LPPHY_TXPCTL_OFF, /* TX power control is OFF */
821 B43_LPPHY_TXPCTL_SW, /* TX power control is set to Software */
822 B43_LPPHY_TXPCTL_HW, /* TX power control is set to Hardware */
826 /* Current TX power control mode. */
862 /* Target TX frequency */
900 /* Frequency of the active TX tone */