Lines Matching +full:reg +full:- +full:5 +full:ah
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
19 #include <linux/dma-mapping.h>
24 #include <linux/nvmem-consumer.h>
33 struct ath_hw *ah; member
54 static int ath9k_led_active_high = -1;
60 MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
88 { .throughput = 5 * 1024, .blink_time = 220 },
108 .ident = "Dell Inspiron 24-3460",
111 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 24-3460"),
132 .ident = "Dell Vostro 15-3572",
135 DMI_MATCH(DMI_PRODUCT_NAME, "Vostro 15-3572"),
140 .ident = "Dell Inspiron 14-3473",
143 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 14-3473"),
153 ath9k_ps_wakeup(common->priv); in ath9k_op_ps_wakeup()
158 ath9k_ps_restore(common->priv); in ath9k_op_ps_restore()
174 struct ath_hw *ah = hw_priv; in ath9k_iowrite32() local
175 struct ath_common *common = ath9k_hw_common(ah); in ath9k_iowrite32()
176 struct ath_softc *sc = common->priv; in ath9k_iowrite32()
178 if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) { in ath9k_iowrite32()
180 spin_lock_irqsave(&sc->sc_serial_rw, flags); in ath9k_iowrite32()
181 iowrite32(val, sc->mem + reg_offset); in ath9k_iowrite32()
182 spin_unlock_irqrestore(&sc->sc_serial_rw, flags); in ath9k_iowrite32()
184 iowrite32(val, sc->mem + reg_offset); in ath9k_iowrite32()
189 struct ath_hw *ah = hw_priv; in ath9k_ioread32() local
190 struct ath_common *common = ath9k_hw_common(ah); in ath9k_ioread32()
191 struct ath_softc *sc = common->priv; in ath9k_ioread32()
194 if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) { in ath9k_ioread32()
196 spin_lock_irqsave(&sc->sc_serial_rw, flags); in ath9k_ioread32()
197 val = ioread32(sc->mem + reg_offset); in ath9k_ioread32()
198 spin_unlock_irqrestore(&sc->sc_serial_rw, flags); in ath9k_ioread32()
200 val = ioread32(sc->mem + reg_offset); in ath9k_ioread32()
219 val = ioread32(sc->mem + reg_offset); in __ath9k_reg_rmw()
222 iowrite32(val, sc->mem + reg_offset); in __ath9k_reg_rmw()
229 struct ath_hw *ah = hw_priv; in ath9k_reg_rmw() local
230 struct ath_common *common = ath9k_hw_common(ah); in ath9k_reg_rmw()
231 struct ath_softc *sc = common->priv; in ath9k_reg_rmw()
235 if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_ON) { in ath9k_reg_rmw()
236 spin_lock_irqsave(&sc->sc_serial_rw, flags); in ath9k_reg_rmw()
238 spin_unlock_irqrestore(&sc->sc_serial_rw, flags); in ath9k_reg_rmw()
253 struct ath_softc *sc = hw->priv; in ath9k_reg_notifier()
254 struct ath_hw *ah = sc->sc_ah; in ath9k_reg_notifier() local
255 struct ath_regulatory *reg = ath9k_hw_regulatory(ah); in ath9k_reg_notifier() local
257 ath_reg_notifier_apply(wiphy, request, reg); in ath9k_reg_notifier()
260 if (sc->dfs_detector != NULL) in ath9k_reg_notifier()
261 sc->dfs_detector->set_dfs_domain(sc->dfs_detector, in ath9k_reg_notifier()
262 request->dfs_region); in ath9k_reg_notifier()
265 if (!ah->curchan) in ath9k_reg_notifier()
268 sc->cur_chan->txpower = 2 * ah->curchan->chan->max_power; in ath9k_reg_notifier()
270 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false); in ath9k_reg_notifier()
271 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower, in ath9k_reg_notifier()
272 sc->cur_chan->txpower, in ath9k_reg_notifier()
273 &sc->cur_chan->cur_txpower); in ath9k_reg_notifier()
286 struct ath_common *common = ath9k_hw_common(sc->sc_ah); in ath_descdma_setup()
296 desc_len = sc->sc_ah->caps.tx_desc_len; in ath_descdma_setup()
304 return -ENOMEM; in ath_descdma_setup()
307 dd->dd_desc_len = desc_len * nbuf * ndesc; in ath_descdma_setup()
314 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) { in ath_descdma_setup()
316 ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len); in ath_descdma_setup()
321 dd->dd_desc_len += dma_len; in ath_descdma_setup()
328 dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len, in ath_descdma_setup()
329 &dd->dd_desc_paddr, GFP_KERNEL); in ath_descdma_setup()
330 if (!dd->dd_desc) in ath_descdma_setup()
331 return -ENOMEM; in ath_descdma_setup()
333 ds = dd->dd_desc; in ath_descdma_setup()
334 ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", in ath_descdma_setup()
335 name, ds, (u32) dd->dd_desc_len, in ath_descdma_setup()
336 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); in ath_descdma_setup()
343 bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL); in ath_descdma_setup()
345 return -ENOMEM; in ath_descdma_setup()
348 bf->bf_desc = ds; in ath_descdma_setup()
349 bf->bf_daddr = DS2PHYS(dd, ds); in ath_descdma_setup()
351 if (!(sc->sc_ah->caps.hw_caps & in ath_descdma_setup()
358 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) { in ath_descdma_setup()
359 BUG_ON((caddr_t) bf->bf_desc >= in ath_descdma_setup()
360 ((caddr_t) dd->dd_desc + in ath_descdma_setup()
361 dd->dd_desc_len)); in ath_descdma_setup()
364 bf->bf_desc = ds; in ath_descdma_setup()
365 bf->bf_daddr = DS2PHYS(dd, ds); in ath_descdma_setup()
368 list_add_tail(&bf->list, head); in ath_descdma_setup()
374 bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL); in ath_descdma_setup()
376 return -ENOMEM; in ath_descdma_setup()
379 bf->bf_desc = ds; in ath_descdma_setup()
380 bf->bf_daddr = DS2PHYS(dd, ds); in ath_descdma_setup()
382 if (!(sc->sc_ah->caps.hw_caps & in ath_descdma_setup()
389 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) { in ath_descdma_setup()
390 BUG_ON((caddr_t) bf->bf_desc >= in ath_descdma_setup()
391 ((caddr_t) dd->dd_desc + in ath_descdma_setup()
392 dd->dd_desc_len)); in ath_descdma_setup()
395 bf->bf_desc = ds; in ath_descdma_setup()
396 bf->bf_daddr = DS2PHYS(dd, ds); in ath_descdma_setup()
399 list_add_tail(&bf->list, head); in ath_descdma_setup()
409 sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah); in ath9k_init_queues()
410 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0); in ath9k_init_queues()
413 sc->tx.uapsdq = ath_txq_setup(sc, ATH9K_TX_QUEUE_UAPSD, 0); in ath9k_init_queues()
416 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i); in ath9k_init_queues()
417 sc->tx.txq_map[i]->mac80211_qnum = i; in ath9k_init_queues()
424 struct ath_common *common = ath9k_hw_common(sc->sc_ah); in ath9k_init_misc()
427 timer_setup(&common->ani.timer, ath_ani_calibrate, 0); in ath9k_init_misc()
429 common->last_rssi = ATH_RSSI_DUMMY_MARKER; in ath9k_init_misc()
430 eth_broadcast_addr(common->bssidmask); in ath9k_init_misc()
431 sc->beacon.slottime = 9; in ath9k_init_misc()
433 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) in ath9k_init_misc()
434 sc->beacon.bslot[i] = NULL; in ath9k_init_misc()
436 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) in ath9k_init_misc()
437 sc->ant_comb.count = ATH_ANT_DIV_COMB_INIT_COUNT; in ath9k_init_misc()
439 sc->spec_priv.ah = sc->sc_ah; in ath9k_init_misc()
440 sc->spec_priv.spec_config.enabled = 0; in ath9k_init_misc()
441 sc->spec_priv.spec_config.short_repeat = true; in ath9k_init_misc()
442 sc->spec_priv.spec_config.count = 8; in ath9k_init_misc()
443 sc->spec_priv.spec_config.endless = false; in ath9k_init_misc()
444 sc->spec_priv.spec_config.period = 0xFF; in ath9k_init_misc()
445 sc->spec_priv.spec_config.fft_period = 0xF; in ath9k_init_misc()
450 struct ath_hw *ah = sc->sc_ah; in ath9k_init_pcoem_platform() local
451 struct ath9k_hw_capabilities *pCap = &ah->caps; in ath9k_init_pcoem_platform()
452 struct ath_common *common = ath9k_hw_common(ah); in ath9k_init_pcoem_platform()
457 if (common->bus_ops->ath_bus_type != ATH_PCI) in ath9k_init_pcoem_platform()
460 if (sc->driver_data & (ATH9K_PCI_CUS198 | in ath9k_init_pcoem_platform()
462 ah->config.xlna_gpio = 9; in ath9k_init_pcoem_platform()
463 ah->config.xatten_margin_cfg = true; in ath9k_init_pcoem_platform()
464 ah->config.alt_mingainidx = true; in ath9k_init_pcoem_platform()
465 ah->config.ant_ctrl_comm2g_switch_enable = 0x000BBB88; in ath9k_init_pcoem_platform()
466 sc->ant_comb.low_rssi_thresh = 20; in ath9k_init_pcoem_platform()
467 sc->ant_comb.fast_div_bias = 3; in ath9k_init_pcoem_platform()
470 (sc->driver_data & ATH9K_PCI_CUS198) ? in ath9k_init_pcoem_platform()
474 if (sc->driver_data & ATH9K_PCI_CUS217) in ath9k_init_pcoem_platform()
477 if (sc->driver_data & ATH9K_PCI_CUS252) in ath9k_init_pcoem_platform()
480 if (sc->driver_data & ATH9K_PCI_AR9565_1ANT) in ath9k_init_pcoem_platform()
481 ath_info(common, "WB335 1-ANT card detected\n"); in ath9k_init_pcoem_platform()
483 if (sc->driver_data & ATH9K_PCI_AR9565_2ANT) in ath9k_init_pcoem_platform()
484 ath_info(common, "WB335 2-ANT card detected\n"); in ath9k_init_pcoem_platform()
486 if (sc->driver_data & ATH9K_PCI_KILLER) in ath9k_init_pcoem_platform()
495 if (sc->driver_data & (ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_AR9565_2ANT)) { in ath9k_init_pcoem_platform()
496 if (!(sc->driver_data & ATH9K_PCI_BT_ANT_DIV)) in ath9k_init_pcoem_platform()
497 pCap->hw_caps &= ~ATH9K_HW_CAP_ANT_DIV_COMB; in ath9k_init_pcoem_platform()
500 if (sc->driver_data & ATH9K_PCI_BT_ANT_DIV) { in ath9k_init_pcoem_platform()
501 pCap->hw_caps |= ATH9K_HW_CAP_BT_ANT_DIV; in ath9k_init_pcoem_platform()
505 if (sc->driver_data & ATH9K_PCI_D3_L1_WAR) { in ath9k_init_pcoem_platform()
506 ah->config.pcie_waen = 0x0040473b; in ath9k_init_pcoem_platform()
515 ah->config.pll_pwrsave = 1; in ath9k_init_pcoem_platform()
517 if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) { in ath9k_init_pcoem_platform()
518 ah->config.pll_pwrsave = 0; in ath9k_init_pcoem_platform()
522 if (sc->driver_data & ATH9K_PCI_LED_ACT_HI) in ath9k_init_pcoem_platform()
523 ah->config.led_active_high = true; in ath9k_init_pcoem_platform()
532 ec->ah->eeprom_blob = eeprom_blob; in ath9k_eeprom_request_cb()
534 complete(&ec->complete); in ath9k_eeprom_request_cb()
540 struct ath_hw *ah = sc->sc_ah; in ath9k_eeprom_request() local
545 ec.ah = sc->sc_ah; in ath9k_eeprom_request()
547 err = request_firmware_nowait(THIS_MODULE, 1, name, sc->dev, GFP_KERNEL, in ath9k_eeprom_request()
550 ath_err(ath9k_hw_common(ah), in ath9k_eeprom_request()
557 if (!ah->eeprom_blob) { in ath9k_eeprom_request()
558 ath_err(ath9k_hw_common(ah), in ath9k_eeprom_request()
560 return -EINVAL; in ath9k_eeprom_request()
568 release_firmware(sc->sc_ah->eeprom_blob); in ath9k_eeprom_release()
573 struct ath_hw *ah = sc->sc_ah; in ath9k_nvmem_request_eeprom() local
579 cell = devm_nvmem_cell_get(sc->dev, "calibration"); in ath9k_nvmem_request_eeprom()
589 if (err == -ENOENT || err == -EOPNOTSUPP) in ath9k_nvmem_request_eeprom()
606 return -EINVAL; in ath9k_nvmem_request_eeprom()
610 ah->nvmem_blob = devm_kmemdup(sc->dev, buf, len, GFP_KERNEL); in ath9k_nvmem_request_eeprom()
612 if (!ah->nvmem_blob) in ath9k_nvmem_request_eeprom()
613 return -ENOMEM; in ath9k_nvmem_request_eeprom()
615 ah->nvmem_blob_len = len; in ath9k_nvmem_request_eeprom()
616 ah->ah_flags &= ~AH_USE_EEPROM; in ath9k_nvmem_request_eeprom()
617 ah->ah_flags |= AH_NO_EEP_SWAP; in ath9k_nvmem_request_eeprom()
624 struct device_node *np = sc->dev->of_node; in ath9k_of_init()
625 struct ath_hw *ah = sc->sc_ah; in ath9k_of_init() local
626 struct ath_common *common = ath9k_hw_common(ah); in ath9k_of_init()
627 enum ath_bus_type bus_type = common->bus_ops->ath_bus_type; in ath9k_of_init()
636 if (of_property_read_bool(np, "qca,no-eeprom")) { in ath9k_of_init()
637 /* ath9k-eeprom-<bus>-<id>.bin */ in ath9k_of_init()
639 "ath9k-eeprom-%s-%s.bin", in ath9k_of_init()
640 ath_bus_type_to_string(bus_type), dev_name(ah->dev)); in ath9k_of_init()
646 ah->ah_flags &= ~AH_USE_EEPROM; in ath9k_of_init()
647 ah->ah_flags |= AH_NO_EEP_SWAP; in ath9k_of_init()
650 ret = of_get_mac_address(np, common->macaddr); in ath9k_of_init()
651 if (ret == -EPROBE_DEFER) in ath9k_of_init()
660 struct ath_hw *ah = NULL; in ath9k_init_softc() local
666 ah = devm_kzalloc(sc->dev, sizeof(struct ath_hw), GFP_KERNEL); in ath9k_init_softc()
667 if (!ah) in ath9k_init_softc()
668 return -ENOMEM; in ath9k_init_softc()
670 ah->dev = sc->dev; in ath9k_init_softc()
671 ah->hw = sc->hw; in ath9k_init_softc()
672 ah->hw_version.devid = devid; in ath9k_init_softc()
673 ah->ah_flags |= AH_USE_EEPROM; in ath9k_init_softc()
674 ah->led_pin = -1; in ath9k_init_softc()
675 ah->reg_ops.read = ath9k_ioread32; in ath9k_init_softc()
676 ah->reg_ops.multi_read = ath9k_multi_ioread32; in ath9k_init_softc()
677 ah->reg_ops.write = ath9k_iowrite32; in ath9k_init_softc()
678 ah->reg_ops.rmw = ath9k_reg_rmw; in ath9k_init_softc()
679 pCap = &ah->caps; in ath9k_init_softc()
681 common = ath9k_hw_common(ah); in ath9k_init_softc()
684 set_bit(ATH_OP_INVALID, &common->op_flags); in ath9k_init_softc()
686 sc->sc_ah = ah; in ath9k_init_softc()
687 sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET); in ath9k_init_softc()
688 sc->tx99_power = MAX_RATE_POWER + 1; in ath9k_init_softc()
689 init_waitqueue_head(&sc->tx_wait); in ath9k_init_softc()
690 sc->cur_chan = &sc->chanctx[0]; in ath9k_init_softc()
692 sc->cur_chan->hw_queue_base = 0; in ath9k_init_softc()
694 common->ops = &ah->reg_ops; in ath9k_init_softc()
695 common->bus_ops = bus_ops; in ath9k_init_softc()
696 common->ps_ops = &ath9k_ps_ops; in ath9k_init_softc()
697 common->ah = ah; in ath9k_init_softc()
698 common->hw = sc->hw; in ath9k_init_softc()
699 common->priv = sc; in ath9k_init_softc()
700 common->debug_mask = ath9k_debug; in ath9k_init_softc()
701 common->btcoex_enabled = ath9k_btcoex_enable == 1; in ath9k_init_softc()
702 common->disable_ani = false; in ath9k_init_softc()
717 if (ath9k_led_active_high != -1) in ath9k_init_softc()
718 ah->config.led_active_high = ath9k_led_active_high == 1; in ath9k_init_softc()
723 * - BTCOEX is disabled. in ath9k_init_softc()
724 * - the user manually requests the feature. in ath9k_init_softc()
725 * - the HW cap is set using the platform data. in ath9k_init_softc()
727 if (!common->btcoex_enabled && ath9k_bt_ant_diversity && in ath9k_init_softc()
728 (pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV)) in ath9k_init_softc()
729 common->bt_ant_diversity = 1; in ath9k_init_softc()
731 spin_lock_init(&common->cc_lock); in ath9k_init_softc()
732 spin_lock_init(&sc->intr_lock); in ath9k_init_softc()
733 spin_lock_init(&sc->sc_serial_rw); in ath9k_init_softc()
734 spin_lock_init(&sc->sc_pm_lock); in ath9k_init_softc()
735 spin_lock_init(&sc->chan_lock); in ath9k_init_softc()
736 mutex_init(&sc->mutex); in ath9k_init_softc()
737 tasklet_setup(&sc->intr_tq, ath9k_tasklet); in ath9k_init_softc()
738 tasklet_setup(&sc->bcon_tasklet, ath9k_beacon_tasklet); in ath9k_init_softc()
740 timer_setup(&sc->sleep_timer, ath_ps_full_sleep, 0); in ath9k_init_softc()
741 INIT_WORK(&sc->hw_reset_work, ath_reset_work); in ath9k_init_softc()
742 INIT_WORK(&sc->paprd_work, ath_paprd_calibrate); in ath9k_init_softc()
743 INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work); in ath9k_init_softc()
744 INIT_DELAYED_WORK(&sc->hw_check_work, ath_hw_check_work); in ath9k_init_softc()
753 common->cachelsz = csz << 2; /* convert to bytes */ in ath9k_init_softc()
756 ret = ath9k_hw_init(ah); in ath9k_init_softc()
776 ath9k_cmn_init_crypto(sc->sc_ah); in ath9k_init_softc()
781 if (common->bus_ops->aspm_init) in ath9k_init_softc()
782 common->bus_ops->aspm_init(common); in ath9k_init_softc()
789 ath_tx_cleanupq(sc, &sc->tx.txq[i]); in ath9k_init_softc()
791 ath9k_hw_deinit(ah); in ath9k_init_softc()
794 dev_kfree_skb_any(sc->tx99_skb); in ath9k_init_softc()
802 struct ath_hw *ah = sc->sc_ah; in ath9k_init_band_txpower() local
803 struct ath_common *common = ath9k_hw_common(ah); in ath9k_init_band_txpower()
807 sband = &common->sbands[band]; in ath9k_init_band_txpower()
808 for (i = 0; i < sband->n_channels; i++) { in ath9k_init_band_txpower()
809 chan = &sband->channels[i]; in ath9k_init_band_txpower()
810 ah->curchan = &ah->channels[chan->hw_value]; in ath9k_init_band_txpower()
812 ath9k_cmn_get_channel(sc->hw, ah, &chandef); in ath9k_init_band_txpower()
813 ath9k_hw_set_txpowerlimit(ah, MAX_COMBINED_POWER, true); in ath9k_init_band_txpower()
819 struct ath_hw *ah = sc->sc_ah; in ath9k_init_txpower_limits() local
820 struct ath9k_channel *curchan = ah->curchan; in ath9k_init_txpower_limits()
822 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) in ath9k_init_txpower_limits()
824 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) in ath9k_init_txpower_limits()
827 ah->curchan = curchan; in ath9k_init_txpower_limits()
882 struct ath_hw *ah = sc->sc_ah; in ath9k_set_mcc_capab() local
883 struct ath_common *common = ath9k_hw_common(ah); in ath9k_set_mcc_capab()
889 hw->queues = ATH9K_NUM_TX_QUEUES; in ath9k_set_mcc_capab()
890 hw->offchannel_tx_hw_queue = hw->queues - 1; in ath9k_set_mcc_capab()
891 hw->wiphy->iface_combinations = if_comb_multi; in ath9k_set_mcc_capab()
892 hw->wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_multi); in ath9k_set_mcc_capab()
893 hw->wiphy->max_scan_ssids = 255; in ath9k_set_mcc_capab()
894 hw->wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN; in ath9k_set_mcc_capab()
895 hw->wiphy->max_remain_on_channel_duration = 10000; in ath9k_set_mcc_capab()
896 hw->chanctx_data_size = sizeof(void *); in ath9k_set_mcc_capab()
897 hw->extra_beacon_tailroom = in ath9k_set_mcc_capab()
906 struct ath_hw *ah = sc->sc_ah; in ath9k_set_hw_capab() local
907 struct ath_common *common = ath9k_hw_common(ah); in ath9k_set_hw_capab()
923 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { in ath9k_set_hw_capab()
926 if (AR_SREV_9280_20_OR_LATER(ah)) in ath9k_set_hw_capab()
927 hw->radiotap_mcs_details |= in ath9k_set_hw_capab()
931 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || ath9k_modparam_nohwcrypt) in ath9k_set_hw_capab()
934 hw->wiphy->features |= NL80211_FEATURE_ACTIVE_MONITOR | in ath9k_set_hw_capab()
939 hw->wiphy->interface_modes = in ath9k_set_hw_capab()
949 hw->wiphy->interface_modes |= in ath9k_set_hw_capab()
952 hw->wiphy->iface_combinations = if_comb; in ath9k_set_hw_capab()
953 hw->wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); in ath9k_set_hw_capab()
956 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; in ath9k_set_hw_capab()
958 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; in ath9k_set_hw_capab()
959 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; in ath9k_set_hw_capab()
960 hw->wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; in ath9k_set_hw_capab()
961 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_5_10_MHZ; in ath9k_set_hw_capab()
962 hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; in ath9k_set_hw_capab()
963 hw->wiphy->flags |= WIPHY_FLAG_AP_UAPSD; in ath9k_set_hw_capab()
965 hw->queues = 4; in ath9k_set_hw_capab()
966 hw->max_rates = 4; in ath9k_set_hw_capab()
967 hw->max_listen_interval = 10; in ath9k_set_hw_capab()
968 hw->max_rate_tries = 10; in ath9k_set_hw_capab()
969 hw->sta_data_size = sizeof(struct ath_node); in ath9k_set_hw_capab()
970 hw->vif_data_size = sizeof(struct ath_vif); in ath9k_set_hw_capab()
971 hw->txq_data_size = sizeof(struct ath_atx_tid); in ath9k_set_hw_capab()
972 hw->extra_tx_headroom = 4; in ath9k_set_hw_capab()
974 hw->wiphy->available_antennas_rx = BIT(ah->caps.max_rxchains) - 1; in ath9k_set_hw_capab()
975 hw->wiphy->available_antennas_tx = BIT(ah->caps.max_txchains) - 1; in ath9k_set_hw_capab()
978 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) in ath9k_set_hw_capab()
979 hw->wiphy->available_antennas_rx = BIT(0) | BIT(1); in ath9k_set_hw_capab()
981 sc->ant_rx = hw->wiphy->available_antennas_rx; in ath9k_set_hw_capab()
982 sc->ant_tx = hw->wiphy->available_antennas_tx; in ath9k_set_hw_capab()
984 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) in ath9k_set_hw_capab()
985 hw->wiphy->bands[NL80211_BAND_2GHZ] = in ath9k_set_hw_capab()
986 &common->sbands[NL80211_BAND_2GHZ]; in ath9k_set_hw_capab()
987 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) in ath9k_set_hw_capab()
988 hw->wiphy->bands[NL80211_BAND_5GHZ] = in ath9k_set_hw_capab()
989 &common->sbands[NL80211_BAND_5GHZ]; in ath9k_set_hw_capab()
995 ath9k_cmn_reload_chainmask(ah); in ath9k_set_hw_capab()
997 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); in ath9k_set_hw_capab()
999 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); in ath9k_set_hw_capab()
1000 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_AIRTIME_FAIRNESS); in ath9k_set_hw_capab()
1001 wiphy_ext_feature_set(hw->wiphy, in ath9k_set_hw_capab()
1003 wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); in ath9k_set_hw_capab()
1009 struct ieee80211_hw *hw = sc->hw; in ath9k_init_device()
1011 struct ath_hw *ah; in ath9k_init_device() local
1013 struct ath_regulatory *reg; in ath9k_init_device() local
1020 ah = sc->sc_ah; in ath9k_init_device()
1021 common = ath9k_hw_common(ah); in ath9k_init_device()
1025 error = ath_regd_init(&common->regulatory, sc->hw->wiphy, in ath9k_init_device()
1030 reg = &common->regulatory; in ath9k_init_device()
1046 sc->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(sc->hw, in ath9k_init_device()
1051 wiphy_read_of_freq_limits(hw->wiphy); in ath9k_init_device()
1058 error = ath9k_init_debug(ah); in ath9k_init_device()
1065 if (!ath_is_world_regd(reg)) { in ath9k_init_device()
1066 error = regulatory_hint(hw->wiphy, reg->alpha2); in ath9k_init_device()
1088 /* De-Initialization */
1100 ath_tx_cleanupq(sc, &sc->tx.txq[i]); in ath9k_deinit_softc()
1102 timer_delete_sync(&sc->sleep_timer); in ath9k_deinit_softc()
1103 ath9k_hw_deinit(sc->sc_ah); in ath9k_deinit_softc()
1104 if (sc->dfs_detector != NULL) in ath9k_deinit_softc()
1105 sc->dfs_detector->exit(sc->dfs_detector); in ath9k_deinit_softc()
1112 struct ieee80211_hw *hw = sc->hw; in ath9k_deinit_device()
1116 wiphy_rfkill_stop_polling(sc->hw->wiphy); in ath9k_deinit_device()
1139 error = -ENODEV; in ath9k_init()
1145 error = -ENODEV; in ath9k_init()