Lines Matching +full:5 +full:kg
49 .macAddr = {0, 2, 3, 4, 5, 6},
62 .deviceType = 5, /* takes lower byte in eeprom location */
97 * for ar9280 (0xa20c/b20c 5:0)
177 /* 1L-5L,5S,11L,11S */
236 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
237 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
238 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
309 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
439 * 4,5,6,7,12,13,14,15,20,21,22,23
453 * 4,5,6,7,12,13,14,15,20,21,22,23
475 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
485 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
496 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
507 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
518 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
524 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
525 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
526 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
527 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
528 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
529 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
530 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
531 /* Data[5].ctlEdges[7].bChannel */ 0xFF
540 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
551 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
562 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
640 .deviceType = 5, /* takes lower byte in eeprom location */
675 * for ar9280 (0xa20c/b20c 5:0)
755 /* 1L-5L,5S,11L,11S */
814 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
815 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
816 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
887 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
1017 * 4,5,6,7,12,13,14,15,20,21,22,23
1031 * 4,5,6,7,12,13,14,15,20,21,22,23
1053 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1063 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1074 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
1085 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1096 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
1102 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1103 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
1104 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
1105 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
1106 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
1107 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1108 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
1109 /* Data[5].ctlEdges[7].bChannel */ 0xFF
1118 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
1129 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1140 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1219 .deviceType = 5, /* takes lower byte in eeprom location */
1254 * for ar9280 (0xa20c/b20c 5:0)
1334 /* 1L-5L,5S,11L,11S */
1393 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1394 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1395 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
1466 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
1596 * 4,5,6,7,12,13,14,15,20,21,22,23
1610 * 4,5,6,7,12,13,14,15,20,21,22,23
1632 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1642 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1653 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
1664 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1675 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
1681 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1682 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
1683 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
1684 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
1685 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
1686 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1687 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
1688 /* Data[5].ctlEdges[7].bChannel */ 0xFF
1697 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
1708 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1719 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1785 .templateVersion = 5,
1798 .deviceType = 5, /* takes lower byte in eeprom location */
1833 * for ar9280 (0xa20c/b20c 5:0)
1913 /* 1L-5L,5S,11L,11s */
1972 /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
1973 /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
1974 /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
2045 /* xatten1DB 3 xatten1_db for ar9280 (0xa20c/b20c 5:0) */
2175 * 4,5,6,7,12,13,14,15,20,21,22,23
2189 * 4,5,6,7,12,13,14,15,20,21,22,23
2211 /* Data[0].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2221 /* Data[1].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2232 /* Data[2].ctledges[5].bchannel */ FREQ2FBIN(5550, 0),
2243 /* Data[3].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2254 /* Data[4].ctledges[5].bchannel */ 0xFF,
2260 /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
2261 /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(5270, 0),
2262 /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(5310, 0),
2263 /* Data[5].ctledges[3].bchannel */ FREQ2FBIN(5510, 0),
2264 /* Data[5].ctledges[4].bchannel */ FREQ2FBIN(5590, 0),
2265 /* Data[5].ctledges[5].bchannel */ FREQ2FBIN(5670, 0),
2266 /* Data[5].ctledges[6].bchannel */ 0xFF,
2267 /* Data[5].ctledges[7].bchannel */ 0xFF
2276 /* Data[6].ctledges[5].bchannel */ FREQ2FBIN(5600, 0),
2287 /* Data[7].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2298 /* Data[8].ctledges[5].bchannel */ FREQ2FBIN(5670, 0),
2376 .deviceType = 5, /* takes lower byte in eeprom location */
2411 * for ar9280 (0xa20c/b20c 5:0)
2491 /* 1L-5L,5S,11L,11S */
2550 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2551 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2552 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
2623 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
2753 * 4,5,6,7,12,13,14,15,20,21,22,23
2767 * 4,5,6,7,12,13,14,15,20,21,22,23
2789 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2799 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2810 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
2821 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2832 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
2838 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
2839 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
2840 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
2841 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
2842 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
2843 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
2844 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
2845 /* Data[5].ctlEdges[7].bChannel */ 0xFF
2854 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
2865 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2876 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
2999 return !!(pBase->featureEnable & BIT(5)); in ath9k_hw_ar9300_get_eeprom()
3124 *code = ((value[0] >> 5) & 0x0007); in ar9300_comp_hdr_unpack()
3472 freq = 4800 + eep->calFreqPier5G[j] * 5; in ar9003_dump_cal_data()
3510 "%20s :\n", "5GHz modal Header"); in ath9k_hw_ar9003_dump_eeprom()
3527 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3535 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3537 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3553 PR_EEP("Enable Paprd", !!(pBase->featureEnable & BIT(5))); in ath9k_hw_ar9003_dump_eeprom()
3682 * here's new field name in XXX.ref for both 2G and 5G. in ar9003_hw_ant_ctrl_apply()
3827 reg |= 0x5 << 5; in ar9003_hw_drive_strength_apply()
3923 value = 5; in ar9003_hw_atten_apply()
3981 reg_pmu_set = (5 << 1) | (7 << 4) | in ar9003_hw_internal_regulator_apply()
4187 u32 data = 0, ko, kg; in ar9003_hw_thermo_cal_apply() local
4194 kg = (data >> 8) & 0xff; in ar9003_hw_thermo_cal_apply()
4195 if (ko || kg) { in ar9003_hw_thermo_cal_apply()
4200 kg + 256); in ar9003_hw_thermo_cal_apply()
4526 /* 0/8/16 (LSB), 1-3/9-11/17-19, 4, 5 (MSB) */ in ar9003_hw_tx_power_regwrite()
4535 REG_WRITE(ah, AR_PHY_POWER_TX_RATE(5), in ar9003_hw_tx_power_regwrite()
4563 * 0/8/16 (LSB), 1-3/9-11/17-19, 4, 5 (MSB) in ar9003_hw_tx_power_regwrite()
4783 "Invalid 5GHz cal pier index, must be less than %d\n", in ar9003_hw_cal_pier_get()
4855 t[2] = eep->base_ext1.tempslopextension[5]; in ar9003_hw_power_control_override()
5273 /* All 5G CTL's */ in ar9003_hw_set_power_per_rate_table()