Lines Matching +full:txpower +full:- +full:5 +full:g
4 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
5 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
6 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
29 * struct ath5k_ini - Mode-independent initial register writes
45 * struct ath5k_ini_mode - Mode specific initial register values
96 { AR5K_PHY(5), 0x0000076b },
132 { AR5K_BB_GAIN(5), 0x00000028 },
197 { AR5K_RF_GAIN(5), 0x00000021 },
283 { AR5K_QUEUE_TXDP(5), 0x00000000 },
309 { AR5K_PHY(5), 0x00000f6b },
346 * txpower setup later using calibration
347 * data etc. so next write is non-common */
352 { AR5K_PHY_PCDAC_TXPOWER(5), 0x0aff0aff },
392 /* Initial mode-specific settings for AR5211
393 * 5211 supports OFDM-only g (draft g) but we
397 /* A B G */
409 { AR5K_QUEUE_DFS_LOCAL_IFS(5),
482 { AR5K_QUEUE_TXDP(5), 0x00000000 },
495 { AR5K_DCU_TX_FILTER_0(5), 0x00000000 },
510 { AR5K_DCU_TX_FILTER_0(20), 0x00000000 }, /* DCU 5 */
528 { AR5K_DCU_TX_FILTER_1(5), 0x00000000 },
578 { AR5K_RATE_DUR(5), 0x00000000 },
611 /* Rate -> db table
612 * notice ...03<-02<-01<-00 ! */
618 { AR5K_RATE2DB(5), 0x17161514 },
621 /* Db -> Rate table */
627 { AR5K_DB2RATE(5), 0x17161514 },
678 /* Initial mode-specific settings for AR5212 (Written before ar5212_ini) */
681 /* A/XR B G */
691 { AR5K_QUEUE_DFS_LOCAL_IFS(5),
731 /* Initial mode-specific settings for AR5212 + RF5111
735 /* A/XR B G */
784 /* Initial mode-specific settings for AR5212 + RF5112
788 /* A/XR B G */
837 /* Initial mode-specific settings for RF5413/5414
841 /* A/XR B G */
976 /* Initial mode-specific settings for RF2413/2414
981 /* A/XR B G */
1099 /* Initial mode-specific settings for RF2425
1104 /* A/XR B G */
1242 { AR5K_BB_GAIN(5), 0x00000028 },
1310 { AR5K_BB_GAIN(5), 0x00000005 },
1373 * ath5k_hw_ini_registers() - Write initial register dump common for all modes
1409 * ath5k_hw_ini_mode_registers() - Write initial mode-specific register dump
1431 * ath5k_hw_write_initvals() - Write initial chip-specific register dump
1436 * Write initial chip-specific register dump, to get the chipset on a
1437 * clean and ready-to-work state after warm reset.
1447 if (ah->ah_version == AR5K_AR5212) { in ath5k_hw_write_initvals()
1449 /* First set of mode-specific settings */ in ath5k_hw_write_initvals()
1460 /* Second set of mode-specific settings */ in ath5k_hw_write_initvals()
1461 switch (ah->ah_radio) { in ath5k_hw_write_initvals()
1520 if (ah->ah_radio == AR5K_RF2316) { in ath5k_hw_write_initvals()
1570 return -EINVAL; in ath5k_hw_write_initvals()
1575 } else if (ah->ah_version == AR5K_AR5211) { in ath5k_hw_write_initvals()
1580 return -EINVAL; in ath5k_hw_write_initvals()
1583 /* Mode-specific settings */ in ath5k_hw_write_initvals()
1599 } else if (ah->ah_version == AR5K_AR5210) { in ath5k_hw_write_initvals()