2  * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3  * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
44  * ath5k_hw_start_rx_dma() - Start DMA receive
55  * ath5k_hw_stop_rx_dma() - Stop DMA receive
70 			i--)  in ath5k_hw_stop_rx_dma()
77 	return i ? 0 : -EBUSY;  in ath5k_hw_stop_rx_dma()
81  * ath5k_hw_get_rxdp() - Get RX Descriptor's address
91  * ath5k_hw_set_rxdp() - Set RX Descriptor's address
95  * Returns -EIO if rx is active
103 		return -EIO;  in ath5k_hw_set_rxdp()
116  * ath5k_hw_start_tx_dma() - Start DMA transmit for a specific queue
123  * on newer chips check out qcu.c. Returns -EINVAL if queue number is out
126  * NOTE: Must be called after setting up tx control descriptor for that
134 	AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);  in ath5k_hw_start_tx_dma()
137 	if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)  in ath5k_hw_start_tx_dma()
138 		return -EINVAL;  in ath5k_hw_start_tx_dma()
140 	if (ah->ah_version == AR5K_AR5210) {  in ath5k_hw_start_tx_dma()
146 		switch (ah->ah_txq[queue].tqi_type) {  in ath5k_hw_start_tx_dma()
161 			return -EINVAL;  in ath5k_hw_start_tx_dma()
169 			return -EIO;  in ath5k_hw_start_tx_dma()
179  * ath5k_hw_stop_tx_dma() - Stop DMA transmit on a specific queue
184  * have any pending frames. Returns -EBUSY if we still have pending frames,
185  * -EINVAL if queue number is out of range or inactive.
193 	AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);  in ath5k_hw_stop_tx_dma()
196 	if (ah->ah_txq[queue].tqi_type == AR5K_TX_QUEUE_INACTIVE)  in ath5k_hw_stop_tx_dma()
197 		return -EINVAL;  in ath5k_hw_stop_tx_dma()
199 	if (ah->ah_version == AR5K_AR5210) {  in ath5k_hw_stop_tx_dma()
205 		switch (ah->ah_txq[queue].tqi_type) {  in ath5k_hw_stop_tx_dma()
211 			/* XXX Fix me... */  in ath5k_hw_stop_tx_dma()
216 			return -EINVAL;  in ath5k_hw_stop_tx_dma()
225 		 * Enable DCU early termination to quickly  in ath5k_hw_stop_tx_dma()
232 		 * Schedule TX disable and wait until queue is empty  in ath5k_hw_stop_tx_dma()
239 		i--)  in ath5k_hw_stop_tx_dma()
253 		} while (--i && pending);  in ath5k_hw_stop_tx_dma()
257 		if (ah->ah_mac_version >= (AR5K_SREV_AR2414 >> 4) &&  in ath5k_hw_stop_tx_dma()
282 			/* Re-check for pending frames */  in ath5k_hw_stop_tx_dma()
289 			} while (--i && pending);  in ath5k_hw_stop_tx_dma()
301 		 * Disable DCU early termination  in ath5k_hw_stop_tx_dma()
310 					"tx dma didn't stop (q:%i, frm:%i) !\n",  in ath5k_hw_stop_tx_dma()
312 			return -EBUSY;  in ath5k_hw_stop_tx_dma()
321  * ath5k_hw_stop_beacon_queue() - Stop beacon queue
325  * Returns -EIO if queue didn't stop
335 		return -EIO;  in ath5k_hw_stop_beacon_queue()
341  * ath5k_hw_get_txdp() - Get TX Descriptor's address for a specific queue
345  * Get TX descriptor's address for a specific queue. For 5210 we ignore
346  * the queue number and use tx queue type since we only have 2 queues.
357 	AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);  in ath5k_hw_get_txdp()
363 	if (ah->ah_version == AR5K_AR5210) {  in ath5k_hw_get_txdp()
364 		switch (ah->ah_txq[queue].tqi_type) {  in ath5k_hw_get_txdp()
383  * ath5k_hw_set_txdp() - Set TX Descriptor's address for a specific queue
388  * Set TX descriptor's address for a specific queue. For 5210 we ignore
389  * the queue number and we use tx queue type since we only have 2 queues
392  * Returns -EINVAL if queue type is invalid for 5210 and -EIO if queue is still
400 	AR5K_ASSERT_ENTRY(queue, ah->ah_capabilities.cap_queues.q_tx_num);  in ath5k_hw_set_txdp()
406 	if (ah->ah_version == AR5K_AR5210) {  in ath5k_hw_set_txdp()
407 		switch (ah->ah_txq[queue].tqi_type) {  in ath5k_hw_set_txdp()
416 			return -EINVAL;  in ath5k_hw_set_txdp()
425 			return -EIO;  in ath5k_hw_set_txdp()
437  * ath5k_hw_update_tx_triglevel() - Update tx trigger level
441  * This function increases/decreases the tx trigger level for the tx fifo
444  * frames more quickly but can lead to tx underruns, raising it a lot can
446  * (64Bytes) and if we get tx underrun we increase it using the increase
447  * flag. Returns -EIO if we have reached maximum/minimum.
449  * XXX: Link this with tx DMA size ?
456 	int ret = -EIO;  in ath5k_hw_update_tx_triglevel()
461 	imr = ath5k_hw_set_imr(ah, ah->ah_imr & ~AR5K_INT_GLOBAL);  in ath5k_hw_update_tx_triglevel()
467 		if (--trigger_level < AR5K_TUNE_MIN_TX_FIFO_THRES)  in ath5k_hw_update_tx_triglevel()
471 			((AR5K_TUNE_MAX_TX_FIFO_THRES - trigger_level) / 2);  in ath5k_hw_update_tx_triglevel()
476 	if (ah->ah_version == AR5K_AR5210)  in ath5k_hw_update_tx_triglevel()
499  * ath5k_hw_is_intr_pending() - Check if we have pending interrupts
512  * ath5k_hw_get_isr() - Get interrupt status
520  * being mapped on some standard non hw-specific positions
523  * NOTE: We do write-to-clear, so the active PISR/SISR bits at the time this
537 	if (ah->ah_version == AR5K_AR5210) {  in ath5k_hw_get_isr()
542 			return -ENODEV;  in ath5k_hw_get_isr()
546 		 * Filter out the non-common bits from the interrupt  in ath5k_hw_get_isr()
549 		*interrupt_mask = (isr & AR5K_INT_COMMON) & ah->ah_imr;  in ath5k_hw_get_isr()
559 		 * true we should disable them before assoc and re-enable them  in ath5k_hw_get_isr()
578 			return -ENODEV;  in ath5k_hw_get_isr()
591 		 * TXOK and TXDESC  -> Logical OR of TXOK and TXDESC  in ath5k_hw_get_isr()
592 		 *			per-queue bits on SISR0  in ath5k_hw_get_isr()
594 		 * TXERR and TXEOL -> Logical OR of TXERR and TXEOL  in ath5k_hw_get_isr()
595 		 *			per-queue bits on SISR1  in ath5k_hw_get_isr()
597 		 * TXURN -> Logical OR of TXURN per-queue bits on SISR2  in ath5k_hw_get_isr()
599 		 * HIUERR -> Logical OR of MCABT, SSERR and DPER bits on SISR2  in ath5k_hw_get_isr()
601 		 * BCNMISC -> Logical OR of TIM, CAB_END, DTIM_SYNC  in ath5k_hw_get_isr()
605 		 * QCBRORN and QCBRURN -> Logical OR of QCBRORN and  in ath5k_hw_get_isr()
606 		 *			QCBRURN per-queue bits on SISR3  in ath5k_hw_get_isr()
607 		 * QTRIG -> Logical OR of QTRIG per-queue bits on SISR4  in ath5k_hw_get_isr()
620 		 *	with tx interrupt flags not being updated  in ath5k_hw_get_isr()
621 		 *	on PISR despite that all Tx interrupt bits  in ath5k_hw_get_isr()
623 		 *	Tx queues all together it shouldn't be an  in ath5k_hw_get_isr()
624 		 *	issue if we clear Tx interrupt flags also  in ath5k_hw_get_isr()
648 		 * Filter out the non-common bits from the interrupt  in ath5k_hw_get_isr()
651 		*interrupt_mask = (pisr & AR5K_INT_COMMON) & ah->ah_imr;  in ath5k_hw_get_isr()
653 		ah->ah_txq_isr_txok_all = 0;  in ath5k_hw_get_isr()
656 		 * the same way (schedule the tx tasklet)  in ath5k_hw_get_isr()
659 			ah->ah_txq_isr_txok_all |= AR5K_REG_MS(sisr0,  in ath5k_hw_get_isr()
663 			ah->ah_txq_isr_txok_all |= AR5K_REG_MS(sisr0,  in ath5k_hw_get_isr()
667 			ah->ah_txq_isr_txok_all |= AR5K_REG_MS(sisr1,  in ath5k_hw_get_isr()
671 			ah->ah_txq_isr_txok_all |= AR5K_REG_MS(sisr1,  in ath5k_hw_get_isr()
725 		ATH5K_PRINTF("ISR: 0x%08x IMR: 0x%08x\n", data, ah->ah_imr);  in ath5k_hw_get_isr()
731  * ath5k_hw_set_imr() - Set interrupt mask
736  * ath5k_int bits to hw-specific bits to remove abstraction and writing
744 	old_mask = ah->ah_imr;  in ath5k_hw_set_imr()
748 	 * (they will be re-enabled afterwards if AR5K_INT GLOBAL  in ath5k_hw_set_imr()
757 	 * Add additional, chipset-dependent interrupt mask flags  in ath5k_hw_set_imr()
762 	if (ah->ah_version != AR5K_AR5210) {  in ath5k_hw_set_imr()
814 	ah->ah_imr = new_mask;  in ath5k_hw_set_imr()
816 	/* ..re-enable interrupts if AR5K_INT_GLOBAL is set */  in ath5k_hw_set_imr()
831  * ath5k_hw_dma_init() - Initialize DMA unit
834  * Set DMA size and pre-enable interrupts
835  * (driver handles tx/rx buffer setup and
844 	 * Set Rx/Tx DMA Configuration  in ath5k_hw_dma_init()
847 	 * a DMA size of 512 causes rx overruns and tx errors  in ath5k_hw_dma_init()
848 	 * on pci-e cards (tested on 5424 but since rx overruns  in ath5k_hw_dma_init()
850 	 * for all PCI-E cards to be safe).  in ath5k_hw_dma_init()
853 	 * TODO: Check out tx trigger level, it's always 64 on dumps but I  in ath5k_hw_dma_init()
854 	 * guess we can tweak it and see how it goes ;-)  in ath5k_hw_dma_init()
856 	if (ah->ah_version != AR5K_AR5210) {  in ath5k_hw_dma_init()
863 	/* Pre-enable interrupts on 5211/5212*/  in ath5k_hw_dma_init()
864 	if (ah->ah_version != AR5K_AR5210)  in ath5k_hw_dma_init()
865 		ath5k_hw_set_imr(ah, ah->ah_imr);  in ath5k_hw_dma_init()
870  * ath5k_hw_dma_stop() - stop DMA unit
873  * Stop tx/rx DMA and interrupts. Returns
874  * -EBUSY if tx or rx dma failed to stop.
877  * stuck frames on tx queues, only a reset
878  * can fix that.
895 	 * and disable tx dma */  in ath5k_hw_dma_stop()
896 	if (ah->ah_version != AR5K_AR5210) {  in ath5k_hw_dma_stop()
907 		/* -EINVAL -> queue inactive */  in ath5k_hw_dma_stop()
908 		if (err && err != -EINVAL)  in ath5k_hw_dma_stop()