Lines Matching refs:ATH5K_DBG

448 	ATH5K_DBG(ah, ATH5K_DEBUG_RESET,  in ath5k_chan_set()
551 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", in ath5k_update_bssid_mask_and_opmode()
571 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); in ath5k_update_bssid_mask_and_opmode()
919 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n", in ath5k_desc_alloc()
1114 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, in ath5k_beaconq_config()
1213 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n", in ath5k_rx_start()
1866 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] " in ath5k_beacon_setup()
1992 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, in ath5k_beacon_send()
1995 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, in ath5k_beacon_send()
1998 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_beacon_send()
2005 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, in ath5k_beacon_send()
2018 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, in ath5k_beacon_send()
2058 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", in ath5k_beacon_send()
2240 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, in ath5k_tasklet_beacon()
2332 ATH5K_DBG(ah, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n", in ath5k_intr()
2344 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_intr()
2366 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_intr()
2461 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, in ath5k_calibrate_work()
2469 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_calibrate_work()
2477 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", in ath5k_calibrate_work()
2525 ATH5K_DBG(ah, ATH5K_DEBUG_XMIT, in ath5k_tx_complete_poll_work()
2541 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_tx_complete_poll_work()
2735 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "invalid %u\n", in ath5k_stop_locked()
2776 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "mode %d\n", ah->opmode); in ath5k_start()
2880 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_stop()
2909 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "resetting\n"); in ath5k_reset()
2942 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, in ath5k_reset()