31 #define GCC_GCC_PCIE_HOT_RST(ab) \  argument
32 	((ab)->hw_params->regs->gcc_gcc_pcie_hot_rst)
40 #define PCIE_QSERDES_COM_SYSCLK_EN_SEL_REG(ab) \  argument
41 	((ab)->hw_params->regs->pcie_qserdes_sysclk_en_sel)
44 #define PCIE_PCS_OSC_DTCT_CONFIG1_REG(ab) \  argument
45 	((ab)->hw_params->regs->pcie_pcs_osc_dtct_config_base)
47 #define PCIE_PCS_OSC_DTCT_CONFIG2_REG(ab) \  argument
48 	((ab)->hw_params->regs->pcie_pcs_osc_dtct_config_base + 0x4)
50 #define PCIE_PCS_OSC_DTCT_CONFIG4_REG(ab) \  argument
51 	((ab)->hw_params->regs->pcie_pcs_osc_dtct_config_base + 0xc)
96 	int (*wakeup)(struct ath12k_base *ab);
97 	void (*release)(struct ath12k_base *ab);
102 	struct ath12k_base *ab;  member
124 static inline struct ath12k_pci *ath12k_pci_priv(struct ath12k_base *ab)  in ath12k_pci_priv()  argument
126 	return (struct ath12k_pci *)ab->drv_priv;  in ath12k_pci_priv()
129 int ath12k_pci_get_user_msi_assignment(struct ath12k_base *ab, char *user_name,
133 void ath12k_pci_write32(struct ath12k_base *ab, u32 offset, u32 value);
134 u32 ath12k_pci_read32(struct ath12k_base *ab, u32 offset);
135 int ath12k_pci_map_service_to_pipe(struct ath12k_base *ab, u16 service_id,
137 void ath12k_pci_get_msi_address(struct ath12k_base *ab, u32 *msi_addr_lo,
139 void ath12k_pci_get_ce_msi_idx(struct ath12k_base *ab, u32 ce_id,
141 void ath12k_pci_hif_ce_irq_enable(struct ath12k_base *ab);
142 void ath12k_pci_hif_ce_irq_disable(struct ath12k_base *ab);
143 void ath12k_pci_ext_irq_enable(struct ath12k_base *ab);
144 void ath12k_pci_ext_irq_disable(struct ath12k_base *ab);
145 int ath12k_pci_hif_suspend(struct ath12k_base *ab);
146 int ath12k_pci_hif_resume(struct ath12k_base *ab);
147 void ath12k_pci_stop(struct ath12k_base *ab);
148 int ath12k_pci_start(struct ath12k_base *ab);
149 int ath12k_pci_power_up(struct ath12k_base *ab);
150 void ath12k_pci_power_down(struct ath12k_base *ab, bool is_suspend);