Lines Matching +full:a +full:- +full:bit
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
89 #define RX_ATTENTION_INFO1_FIRST_MPDU BIT(0)
90 #define RX_ATTENTION_INFO1_RSVD_1A BIT(1)
91 #define RX_ATTENTION_INFO1_MCAST_BCAST BIT(2)
92 #define RX_ATTENTION_INFO1_AST_IDX_NOT_FOUND BIT(3)
93 #define RX_ATTENTION_INFO1_AST_IDX_TIMEDOUT BIT(4)
94 #define RX_ATTENTION_INFO1_POWER_MGMT BIT(5)
95 #define RX_ATTENTION_INFO1_NON_QOS BIT(6)
96 #define RX_ATTENTION_INFO1_NULL_DATA BIT(7)
97 #define RX_ATTENTION_INFO1_MGMT_TYPE BIT(8)
98 #define RX_ATTENTION_INFO1_CTRL_TYPE BIT(9)
99 #define RX_ATTENTION_INFO1_MORE_DATA BIT(10)
100 #define RX_ATTENTION_INFO1_EOSP BIT(11)
101 #define RX_ATTENTION_INFO1_A_MSDU_ERROR BIT(12)
102 #define RX_ATTENTION_INFO1_FRAGMENT BIT(13)
103 #define RX_ATTENTION_INFO1_ORDER BIT(14)
104 #define RX_ATTENTION_INFO1_CCE_MATCH BIT(15)
105 #define RX_ATTENTION_INFO1_OVERFLOW_ERR BIT(16)
106 #define RX_ATTENTION_INFO1_MSDU_LEN_ERR BIT(17)
107 #define RX_ATTENTION_INFO1_TCP_UDP_CKSUM_FAIL BIT(18)
108 #define RX_ATTENTION_INFO1_IP_CKSUM_FAIL BIT(19)
109 #define RX_ATTENTION_INFO1_SA_IDX_INVALID BIT(20)
110 #define RX_ATTENTION_INFO1_DA_IDX_INVALID BIT(21)
111 #define RX_ATTENTION_INFO1_RSVD_1B BIT(22)
112 #define RX_ATTENTION_INFO1_RX_IN_TX_DECRYPT_BYP BIT(23)
113 #define RX_ATTENTION_INFO1_ENCRYPT_REQUIRED BIT(24)
114 #define RX_ATTENTION_INFO1_DIRECTED BIT(25)
115 #define RX_ATTENTION_INFO1_BUFFER_FRAGMENT BIT(26)
116 #define RX_ATTENTION_INFO1_MPDU_LEN_ERR BIT(27)
117 #define RX_ATTENTION_INFO1_TKIP_MIC_ERR BIT(28)
118 #define RX_ATTENTION_INFO1_DECRYPT_ERR BIT(29)
119 #define RX_ATTENTION_INFO1_UNDECRYPT_FRAME_ERR BIT(30)
120 #define RX_ATTENTION_INFO1_FCS_ERR BIT(31)
122 #define RX_ATTENTION_INFO2_FLOW_IDX_TIMEOUT BIT(0)
123 #define RX_ATTENTION_INFO2_FLOW_IDX_INVALID BIT(1)
124 #define RX_ATTENTION_INFO2_WIFI_PARSER_ERR BIT(2)
125 #define RX_ATTENTION_INFO2_AMSDU_PARSER_ERR BIT(3)
126 #define RX_ATTENTION_INFO2_SA_IDX_TIMEOUT BIT(4)
127 #define RX_ATTENTION_INFO2_DA_IDX_TIMEOUT BIT(5)
128 #define RX_ATTENTION_INFO2_MSDU_LIMIT_ERR BIT(6)
129 #define RX_ATTENTION_INFO2_DA_IS_VALID BIT(7)
130 #define RX_ATTENTION_INFO2_DA_IS_MCBC BIT(8)
131 #define RX_ATTENTION_INFO2_SA_IS_VALID BIT(9)
133 #define RX_ATTENTION_INFO2_RX_BITMAP_NOT_UPDED BIT(13)
134 #define RX_ATTENTION_INFO2_MSDU_DONE BIT(31)
155 * A ppdu counter value that PHY increments for every PPDU
160 * and last_mpdu are set in the MSDU then this is a not an
161 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
162 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
163 * 0. The PPDU start status will only be valid when this bit
168 * address 1 bit 0 is set indicating mcast/bcast and the BSSID
181 * Power management bit set in the 802.11 header. Only set
185 * Set if packet is not a non-QoS data frame. Only set when
193 * Set if packet is a management packet. Only set when
197 * Set if packet is a control packet. Only set when first_msdu
201 * Set if more bit in frame control is set. Only set when
205 * Set if the EOSP (end of service period) bit in the QoS
209 * Set if number of MSDUs in A-MSDU is above a threshold or if the
215 * set when either the more_frag bit is set in the frame
220 * Set if the order bit in the frame control is set. Only set
224 * Indicates that this status has a corresponding MSDU that
266 * MPDU is a directed packet which means that the RA matched
269 * 'no_ack' bit is the address search entry cleared.
277 * Indicates that the MPDU was pre-maturely terminated
278 * resulting in a truncated MPDU. Don't trust the MPDU length
298 * A-MSDU could not be properly de-agregated.
311 * be decasulated but will be DMA'ed in RAW format as a single
315 * Indicates that OLE found a valid DA entry.
319 * was a Multicast or Broadcast address.
322 * Indicates that OLE found a valid SA entry.
336 * valid. This bit must be in the last octet of the
340 #define RX_MPDU_START_INFO0_NDP_FRAME BIT(9)
341 #define RX_MPDU_START_INFO0_PHY_ERR BIT(10)
342 #define RX_MPDU_START_INFO0_PHY_ERR_MPDU_HDR BIT(11)
343 #define RX_MPDU_START_INFO0_PROTO_VER_ERR BIT(12)
344 #define RX_MPDU_START_INFO0_AST_LOOKUP_VALID BIT(13)
346 #define RX_MPDU_START_INFO1_MPDU_FCTRL_VALID BIT(0)
347 #define RX_MPDU_START_INFO1_MPDU_DUR_VALID BIT(1)
348 #define RX_MPDU_START_INFO1_MAC_ADDR1_VALID BIT(2)
349 #define RX_MPDU_START_INFO1_MAC_ADDR2_VALID BIT(3)
350 #define RX_MPDU_START_INFO1_MAC_ADDR3_VALID BIT(4)
351 #define RX_MPDU_START_INFO1_MAC_ADDR4_VALID BIT(5)
352 #define RX_MPDU_START_INFO1_MPDU_SEQ_CTRL_VALID BIT(6)
353 #define RX_MPDU_START_INFO1_MPDU_QOS_CTRL_VALID BIT(7)
354 #define RX_MPDU_START_INFO1_MPDU_HT_CTRL_VALID BIT(8)
355 #define RX_MPDU_START_INFO1_ENCRYPT_INFO_VALID BIT(9)
357 #define RX_MPDU_START_INFO1_MORE_FRAG_FLAG BIT(14)
358 #define RX_MPDU_START_INFO1_FROM_DS BIT(16)
359 #define RX_MPDU_START_INFO1_TO_DS BIT(17)
360 #define RX_MPDU_START_INFO1_ENCRYPTED BIT(18)
361 #define RX_MPDU_START_INFO1_MPDU_RETRY BIT(19)
364 #define RX_MPDU_START_INFO2_EPD_EN BIT(0)
365 #define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1)
368 #define RX_MPDU_START_INFO2_MESH_STA BIT(8)
369 #define RX_MPDU_START_INFO2_BSSID_HIT BIT(9)
375 #define RX_MPDU_START_INFO3_FLOW_ID_TOEPLITZ BIT(7)
376 #define RX_MPDU_START_INFO3_PKT_SEL_FP_UCAST_DATA BIT(8)
377 #define RX_MPDU_START_INFO3_PKT_SEL_FP_MCAST_DATA BIT(9)
378 #define RX_MPDU_START_INFO3_PKT_SEL_FP_CTRL_BAR BIT(10)
384 #define RX_MPDU_START_INFO4_PRE_DELIM_ERR_WARN BIT(24)
385 #define RX_MPDU_START_INFO4_FIRST_DELIM_ERR BIT(25)
388 #define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8)
389 #define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9)
391 #define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12)
392 #define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13)
393 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14)
394 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15)
396 #define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28)
397 #define RX_MPDU_START_INFO5_BAR_FRAME BIT(29)
400 #define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14)
401 #define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15)
402 #define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16)
403 #define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17)
404 #define RX_MPDU_START_INFO6_POWER_MGMT BIT(18)
405 #define RX_MPDU_START_INFO6_NON_QOS BIT(19)
406 #define RX_MPDU_START_INFO6_NULL_DATA BIT(20)
407 #define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21)
408 #define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22)
409 #define RX_MPDU_START_INFO6_MORE_DATA BIT(23)
410 #define RX_MPDU_START_INFO6_EOSP BIT(24)
411 #define RX_MPDU_START_INFO6_FRAGMENT BIT(25)
412 #define RX_MPDU_START_INFO6_ORDER BIT(26)
413 #define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27)
414 #define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28)
415 #define RX_MPDU_START_INFO6_DIRECTED BIT(29)
417 #define RX_MPDU_START_RAW_MPDU BIT(0)
447 #define RX_MPDU_START_INFO7_FLOW_ID_TOEPLITZ BIT(7)
448 #define RX_MPDU_START_INFO7_PKT_SEL_FP_UCAST_DATA BIT(8)
449 #define RX_MPDU_START_INFO7_PKT_SEL_FP_MCAST_DATA BIT(9)
450 #define RX_MPDU_START_INFO7_PKT_SEL_FP_CTRL_BAR BIT(10)
456 #define RX_MPDU_START_INFO8_PRE_DELIM_ERR_WARN BIT(24)
457 #define RX_MPDU_START_INFO8_FIRST_DELIM_ERR BIT(25)
459 #define RX_MPDU_START_INFO9_EPD_EN BIT(0)
460 #define RX_MPDU_START_INFO9_ALL_FRAME_ENCPD BIT(1)
464 #define RX_MPDU_START_INFO9_BSSID_HIT BIT(10)
470 #define RX_MPDU_START_INFO10_NDP_FRAME BIT(9)
471 #define RX_MPDU_START_INFO10_PHY_ERR BIT(10)
472 #define RX_MPDU_START_INFO10_PHY_ERR_MPDU_HDR BIT(11)
473 #define RX_MPDU_START_INFO10_PROTO_VER_ERR BIT(12)
474 #define RX_MPDU_START_INFO10_AST_LOOKUP_VALID BIT(13)
476 #define RX_MPDU_START_INFO11_MPDU_FCTRL_VALID BIT(0)
477 #define RX_MPDU_START_INFO11_MPDU_DUR_VALID BIT(1)
478 #define RX_MPDU_START_INFO11_MAC_ADDR1_VALID BIT(2)
479 #define RX_MPDU_START_INFO11_MAC_ADDR2_VALID BIT(3)
480 #define RX_MPDU_START_INFO11_MAC_ADDR3_VALID BIT(4)
481 #define RX_MPDU_START_INFO11_MAC_ADDR4_VALID BIT(5)
482 #define RX_MPDU_START_INFO11_MPDU_SEQ_CTRL_VALID BIT(6)
483 #define RX_MPDU_START_INFO11_MPDU_QOS_CTRL_VALID BIT(7)
484 #define RX_MPDU_START_INFO11_MPDU_HT_CTRL_VALID BIT(8)
485 #define RX_MPDU_START_INFO11_ENCRYPT_INFO_VALID BIT(9)
487 #define RX_MPDU_START_INFO11_MORE_FRAG_FLAG BIT(14)
488 #define RX_MPDU_START_INFO11_FROM_DS BIT(16)
489 #define RX_MPDU_START_INFO11_TO_DS BIT(17)
490 #define RX_MPDU_START_INFO11_ENCRYPTED BIT(18)
491 #define RX_MPDU_START_INFO11_MPDU_RETRY BIT(19)
495 #define RX_MPDU_START_INFO12_NEW_PEER_ENTRY BIT(8)
496 #define RX_MPDU_START_INFO12_DECRYPT_NEEDED BIT(9)
498 #define RX_MPDU_START_INFO12_VLAN_TAG_C_PADDING BIT(12)
499 #define RX_MPDU_START_INFO12_VLAN_TAG_S_PADDING BIT(13)
500 #define RX_MPDU_START_INFO12_STRIP_VLAN_TAG_C BIT(14)
501 #define RX_MPDU_START_INFO12_STRIP_VLAN_TAG_S BIT(15)
503 #define RX_MPDU_START_INFO12_AMPDU_FLAG BIT(28)
504 #define RX_MPDU_START_INFO12_BAR_FRAME BIT(29)
505 #define RX_MPDU_START_INFO12_RAW_MPDU BIT(30)
508 #define RX_MPDU_START_INFO13_FIRST_MPDU BIT(14)
509 #define RX_MPDU_START_INFO13_MCAST_BCAST BIT(15)
510 #define RX_MPDU_START_INFO13_AST_IDX_NOT_FOUND BIT(16)
511 #define RX_MPDU_START_INFO13_AST_IDX_TIMEOUT BIT(17)
512 #define RX_MPDU_START_INFO13_POWER_MGMT BIT(18)
513 #define RX_MPDU_START_INFO13_NON_QOS BIT(19)
514 #define RX_MPDU_START_INFO13_NULL_DATA BIT(20)
515 #define RX_MPDU_START_INFO13_MGMT_TYPE BIT(21)
516 #define RX_MPDU_START_INFO13_CTRL_TYPE BIT(22)
517 #define RX_MPDU_START_INFO13_MORE_DATA BIT(23)
518 #define RX_MPDU_START_INFO13_EOSP BIT(24)
519 #define RX_MPDU_START_INFO13_FRAGMENT BIT(25)
520 #define RX_MPDU_START_INFO13_ORDER BIT(26)
521 #define RX_MPDU_START_INFO13_UAPSD_TRIGGER BIT(27)
522 #define RX_MPDU_START_INFO13_ENCRYPT_REQUIRED BIT(28)
523 #define RX_MPDU_START_INFO13_DIRECTED BIT(29)
524 #define RX_MPDU_START_INFO13_AMSDU_PRESENT BIT(30)
602 * RXPCU detected a version error in the frame control field.
605 * AST based lookup for this frame has found a valid result.
608 * A ppdu counter value that PHY increments for every PPDU
614 * RXPCU. A value of 0xFFFF indicates an invalid AST index.
617 * This field indicates a unique peer identifier. It is set equal
632 * Protected bit from the frame control.
635 * Retry bit from frame control. Only valid when first_msdu is set.
651 * Indicates a Mesh (11s) STA.
682 * Indicates that a delimiter FCS error was found in between the
683 * previous MPDU and this MPDU. Note that this is just a warning,
689 * Indicates that the first delimiter had a FCS failure.
700 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
701 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that
702 * reason only needs to evaluate this bit and non of the other ones
720 * received MPDU in the PPDU and this MPDU gets filtered-in,
729 * Received frame was part of an A-MPDU.
732 * Received frame is a BAR frame
775 #define RX_MSDU_START_INFO1_RSVD_1A BIT(14)
776 #define RX_MSDU_START_INFO1_IPSEC_ESP BIT(15)
778 #define RX_MSDU_START_INFO1_IPSEC_AH BIT(23)
783 #define RX_MSDU_START_INFO2_IPV4 BIT(10)
784 #define RX_MSDU_START_INFO2_IPV6 BIT(11)
785 #define RX_MSDU_START_INFO2_TCP BIT(12)
786 #define RX_MSDU_START_INFO2_UDP BIT(13)
787 #define RX_MSDU_START_INFO2_IP_FRAG BIT(14)
788 #define RX_MSDU_START_INFO2_TCP_ONLY_ACK BIT(15)
789 #define RX_MSDU_START_INFO2_DA_IS_BCAST_MCAST BIT(16)
791 #define RX_MSDU_START_INFO2_IP_FIXED_HDR_VALID BIT(19)
792 #define RX_MSDU_START_INFO2_IP_EXTN_HDR_VALID BIT(20)
793 #define RX_MSDU_START_INFO2_IP_TCP_UDP_HDR_VALID BIT(21)
794 #define RX_MSDU_START_INFO2_MESH_CTRL_PRESENT BIT(22)
795 #define RX_MSDU_START_INFO2_LDPC BIT(23)
801 #define RX_MSDU_START_INFO3_STBC BIT(12)
860 * A ppdu counter value that PHY increments for every PPDU
870 * Depending upon mode bit, this field either indicates the
880 * Depending upon mode bit, this field either indicates the
889 * Indicates the MSDU number within a MPDU. This value is
912 * Indicates that either the IP More frag bit is set or IP frag
913 * number is non-zero. If set indicates that this is a fragmented
917 * Set if only the TCP Ack bit is set in the TCP flags and if
925 * 0 - Toeplitz hash of 2-tuple (IP source address, IP
927 * 1 - Toeplitz hash of 4-tuple (IP source address,
930 * 2 - Toeplitz of flow_id
931 * 3 - Zero is used
934 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
943 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
952 * For IPv4, this is the 8 bit protocol field set). For IPv6 this
953 * is the 8 bit next_header field.
956 * Controlled by RxOLE register - If register bit set to 0,
957 * Toeplitz hash is computed over 2-tuple IPv4 or IPv6 src/dest
958 * addresses; otherwise, toeplitz hash is computed over 4-tuple
962 * Toeplitz hash of 5-tuple
964 * destination port, L4 protocol} in case of non-IPSec.
966 * In case of IPSec - Toeplitz hash of 4-tuple
1004 * Bitmap, with each bit indicating if the related spatial
1009 * 0 - spatial stream not used for this reception
1010 * 1 - spatial stream used for this reception
1026 #define RX_MSDU_END_INFO1_CCND_TRUNCATE BIT(14)
1027 #define RX_MSDU_END_INFO1_CCND_CCE_DIS BIT(15)
1031 #define RX_MSDU_END_INFO2_FIRST_MSDU BIT(14)
1032 #define RX_MSDU_END_INFO2_FIRST_MSDU_WCN6855 BIT(28)
1033 #define RX_MSDU_END_INFO2_LAST_MSDU BIT(15)
1034 #define RX_MSDU_END_INFO2_LAST_MSDU_WCN6855 BIT(29)
1035 #define RX_MSDU_END_INFO2_SA_IDX_TIMEOUT BIT(16)
1036 #define RX_MSDU_END_INFO2_DA_IDX_TIMEOUT BIT(17)
1037 #define RX_MSDU_END_INFO2_MSDU_LIMIT_ERR BIT(18)
1038 #define RX_MSDU_END_INFO2_FLOW_IDX_TIMEOUT BIT(19)
1039 #define RX_MSDU_END_INFO2_FLOW_IDX_INVALID BIT(20)
1040 #define RX_MSDU_END_INFO2_WIFI_PARSER_ERR BIT(21)
1041 #define RX_MSDU_END_INFO2_AMSDU_PARSET_ERR BIT(22)
1042 #define RX_MSDU_END_INFO2_SA_IS_VALID BIT(23)
1043 #define RX_MSDU_END_INFO2_DA_IS_VALID BIT(24)
1044 #define RX_MSDU_END_INFO2_DA_IS_MCBC BIT(25)
1048 #define RX_MSDU_END_INFO3_LRO_ELIGIBLE BIT(9)
1052 #define RX_MSDU_END_INFO4_DA_OFFSET_VALID BIT(12)
1053 #define RX_MSDU_END_INFO4_SA_OFFSET_VALID BIT(13)
1056 #define RX_MSDU_END_INFO5_MSDU_DROP BIT(0)
1112 #define RX_MSDU_END_INFO2_DA_OFFSET_VALID BIT(12)
1113 #define RX_MSDU_END_INFO2_SA_OFFSET_VALID BIT(13)
1116 #define RX_MSDU_END_INFO4_SA_IDX_TIMEOUT BIT(0)
1117 #define RX_MSDU_END_INFO4_DA_IDX_TIMEOUT BIT(1)
1118 #define RX_MSDU_END_INFO4_MSDU_LIMIT_ERR BIT(2)
1119 #define RX_MSDU_END_INFO4_FLOW_IDX_TIMEOUT BIT(3)
1120 #define RX_MSDU_END_INFO4_FLOW_IDX_INVALID BIT(4)
1121 #define RX_MSDU_END_INFO4_WIFI_PARSER_ERR BIT(5)
1122 #define RX_MSDU_END_INFO4_AMSDU_PARSER_ERR BIT(6)
1123 #define RX_MSDU_END_INFO4_SA_IS_VALID BIT(7)
1124 #define RX_MSDU_END_INFO4_DA_IS_VALID BIT(8)
1125 #define RX_MSDU_END_INFO4_DA_IS_MCBC BIT(9)
1127 #define RX_MSDU_END_INFO4_FIRST_MSDU BIT(12)
1128 #define RX_MSDU_END_INFO4_LAST_MSDU BIT(13)
1131 #define RX_MSDU_END_INFO6_FLOW_AGGR_CONTN BIT(8)
1132 #define RX_MSDU_END_INFO6_FISA_TIMEOUT BIT(9)
1172 * A ppdu counter value that PHY increments for every PPDU
1180 * The value of the computed TCP/UDP checksum. A mode bit
1202 * A-MPDU delimiter or the preamble length field for non-A-MPDU
1206 * Indicates the first MSDU of A-MSDU. If both first_msdu and
1207 * last_msdu are set in the MSDU then this is a non-aggregated MSDU
1208 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
1212 * Indicates the last MSDU of the A-MSDU. MPDU end status is only
1226 * decapsulated but will be DMA'ed in RAW format as a single MSDU.
1236 * A-MSDU could not be properly de-agregated.
1239 * Indicates that OLE found a valid SA entry.
1242 * Indicates that OLE found a valid DA entry.
1246 * was a Multicast of Broadcast address.
1250 * always start of a Dword boundary.
1253 * 32 bit CRC computed out of IP v6 extension headers.
1279 * of a dynamic A-MSDU when DA is compressed.
1283 * of a dynamic A-MSDU when SA is compressed.
1286 * The 16-bit type value indicating the type of L3 later
1329 #define RX_MPDU_END_INFO1_UNSUP_KTYPE_SHORT_FRAME BIT(11)
1330 #define RX_MPDU_END_INFO1_RX_IN_TX_DECRYPT_BYT BIT(12)
1331 #define RX_MPDU_END_INFO1_OVERFLOW_ERR BIT(13)
1332 #define RX_MPDU_END_INFO1_MPDU_LEN_ERR BIT(14)
1333 #define RX_MPDU_END_INFO1_TKIP_MIC_ERR BIT(15)
1334 #define RX_MPDU_END_INFO1_DECRYPT_ERR BIT(16)
1335 #define RX_MPDU_END_INFO1_UNENCRYPTED_FRAME_ERR BIT(17)
1336 #define RX_MPDU_END_INFO1_PN_FIELDS_VALID BIT(18)
1337 #define RX_MPDU_END_INFO1_FCS_ERR BIT(19)
1338 #define RX_MPDU_END_INFO1_MSDU_LEN_ERR BIT(20)
1342 #define RX_MPDU_END_INFO1_RX_BITMAP_NOT_UPD BIT(28)
1362 * A ppdu counter value that PHY increments for every PPDU
1366 * This bit will be '1' when WEP or TKIP or WAPI key type is
1368 * packet without decryption to RxOLE after setting this bit.
1388 * Set by Rx crypto when crypto detected a TKIP MIC error for
1392 * Set by RX CRYPTO when CRYPTO detected a decrypt error for this
1393 * MPDU or CRYPTO received an encrypted frame, but did not get a
1401 * Set by RX CRYPTO to indicate that there is a valid PN field