Lines Matching +full:hw +full:- +full:timeout +full:- +full:ms

1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
12 #define ATH11K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0)
13 #define ATH11K_5GHZ_5150_5350 REG_RULE(5150 - 10, 5350 + 10, 80, 0, 30,\
15 #define ATH11K_5GHZ_5725_5850 REG_RULE(5725 - 10, 5850 + 10, 80, 0, 30,\
36 regd = rcu_dereference_rtnl(ar->hw->wiphy->regd); in ath11k_regdom_changes()
44 return memcmp(regd->alpha2, alpha2, 2) != 0; in ath11k_regdom_changes()
50 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); in ath11k_reg_notifier() local
52 struct ath11k *ar = hw->priv; in ath11k_reg_notifier()
55 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_reg_notifier()
58 if (request->initiator == NL80211_REGDOM_SET_BY_DRIVER) { in ath11k_reg_notifier()
59 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_reg_notifier()
61 if (ar->state != ATH11K_STATE_ON) in ath11k_reg_notifier()
66 ath11k_warn(ar->ab, "failed to update channel list: %d\n", ret); in ath11k_reg_notifier()
76 if (!(request->initiator == NL80211_REGDOM_SET_BY_USER && in ath11k_reg_notifier()
77 request->user_reg_hint_type == NL80211_USER_REG_HINT_USER)) { in ath11k_reg_notifier()
78 ath11k_warn(ar->ab, "Unexpected Regulatory event for this wiphy\n"); in ath11k_reg_notifier()
83 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_reg_notifier()
88 if (!ath11k_regdom_changes(ar, request->alpha2)) { in ath11k_reg_notifier()
89 ath11k_dbg(ar->ab, ATH11K_DBG_REG, "Country is already set\n"); in ath11k_reg_notifier()
97 if (ar->ab->hw_params.current_cc_support) { in ath11k_reg_notifier()
98 memcpy(&ar->alpha2, request->alpha2, 2); in ath11k_reg_notifier()
101 ath11k_warn(ar->ab, in ath11k_reg_notifier()
105 memcpy(&init_country_param.cc_info.alpha2, request->alpha2, 2); in ath11k_reg_notifier()
110 ath11k_warn(ar->ab, in ath11k_reg_notifier()
115 ar->regdom_set_by_user = true; in ath11k_reg_notifier()
123 struct ieee80211_hw *hw = ar->hw; in ath11k_reg_update_chan_list() local
129 if (ar->state == ATH11K_STATE_RESTARTING) in ath11k_reg_update_chan_list()
132 bands = hw->wiphy->bands; in ath11k_reg_update_chan_list()
137 for (i = 0; i < bands[band]->n_channels; i++) { in ath11k_reg_update_chan_list()
138 if (bands[band]->channels[i].flags & in ath11k_reg_update_chan_list()
147 return -EINVAL; in ath11k_reg_update_chan_list()
152 return -ENOMEM; in ath11k_reg_update_chan_list()
154 params->pdev_id = ar->pdev->pdev_id; in ath11k_reg_update_chan_list()
155 params->nallchans = num_channels; in ath11k_reg_update_chan_list()
157 ch = params->ch_param; in ath11k_reg_update_chan_list()
163 for (i = 0; i < bands[band]->n_channels; i++) { in ath11k_reg_update_chan_list()
164 channel = &bands[band]->channels[i]; in ath11k_reg_update_chan_list()
166 if (channel->flags & IEEE80211_CHAN_DISABLED) in ath11k_reg_update_chan_list()
170 ch->allow_ht = true; in ath11k_reg_update_chan_list()
171 ch->allow_vht = true; in ath11k_reg_update_chan_list()
172 ch->allow_he = true; in ath11k_reg_update_chan_list()
174 ch->dfs_set = in ath11k_reg_update_chan_list()
175 !!(channel->flags & IEEE80211_CHAN_RADAR); in ath11k_reg_update_chan_list()
176 ch->is_chan_passive = !!(channel->flags & in ath11k_reg_update_chan_list()
178 ch->is_chan_passive |= ch->dfs_set; in ath11k_reg_update_chan_list()
179 ch->mhz = channel->center_freq; in ath11k_reg_update_chan_list()
180 ch->cfreq1 = channel->center_freq; in ath11k_reg_update_chan_list()
181 ch->minpower = 0; in ath11k_reg_update_chan_list()
182 ch->maxpower = channel->max_power * 2; in ath11k_reg_update_chan_list()
183 ch->maxregpower = channel->max_reg_power * 2; in ath11k_reg_update_chan_list()
184 ch->antennamax = channel->max_antenna_gain * 2; in ath11k_reg_update_chan_list()
187 if (channel->band == NL80211_BAND_2GHZ) in ath11k_reg_update_chan_list()
188 ch->phy_mode = MODE_11G; in ath11k_reg_update_chan_list()
190 ch->phy_mode = MODE_11A; in ath11k_reg_update_chan_list()
192 if (channel->band == NL80211_BAND_6GHZ && in ath11k_reg_update_chan_list()
194 ch->psc_channel = true; in ath11k_reg_update_chan_list()
196 ath11k_dbg(ar->ab, ATH11K_DBG_WMI, in ath11k_reg_update_chan_list()
198 i, params->nallchans, in ath11k_reg_update_chan_list()
199 ch->mhz, ch->maxpower, ch->maxregpower, in ath11k_reg_update_chan_list()
200 ch->antennamax, ch->phy_mode); in ath11k_reg_update_chan_list()
210 spin_lock_bh(&ar->data_lock); in ath11k_reg_update_chan_list()
211 list_add_tail(&params->list, &ar->channel_update_queue); in ath11k_reg_update_chan_list()
212 spin_unlock_bh(&ar->data_lock); in ath11k_reg_update_chan_list()
214 queue_work(ar->ab->workqueue, &ar->channel_update_work); in ath11k_reg_update_chan_list()
233 for (i = 0; i < regd_orig->n_reg_rules; i++) in ath11k_copy_regd()
234 memcpy(&regd_copy->reg_rules[i], &regd_orig->reg_rules[i], in ath11k_copy_regd()
244 ab = ar->ab; in ath11k_regd_update()
245 pdev_id = ar->pdev_idx; in ath11k_regd_update()
247 spin_lock_bh(&ab->base_lock); in ath11k_regd_update()
250 if (ab->new_regd[pdev_id]) { in ath11k_regd_update()
251 regd = ab->new_regd[pdev_id]; in ath11k_regd_update()
258 if (ab->default_regd[pdev_id]) { in ath11k_regd_update()
259 regd = ab->default_regd[pdev_id]; in ath11k_regd_update()
268 ret = -EINVAL; in ath11k_regd_update()
269 spin_unlock_bh(&ab->base_lock); in ath11k_regd_update()
273 regd_len = sizeof(*regd) + (regd->n_reg_rules * in ath11k_regd_update()
280 spin_unlock_bh(&ab->base_lock); in ath11k_regd_update()
283 ret = -ENOMEM; in ath11k_regd_update()
287 ret = regulatory_set_wiphy_regd(ar->hw->wiphy, regd_copy); in ath11k_regd_update()
363 start_freq1 = rule1->freq_range.start_freq_khz; in ath11k_reg_can_intersect()
364 start_freq2 = rule2->freq_range.start_freq_khz; in ath11k_reg_can_intersect()
366 end_freq1 = rule1->freq_range.end_freq_khz; in ath11k_reg_can_intersect()
367 end_freq2 = rule2->freq_range.end_freq_khz; in ath11k_reg_can_intersect()
392 start_freq1 = rule1->freq_range.start_freq_khz; in ath11k_reg_intersect_rules()
393 start_freq2 = rule2->freq_range.start_freq_khz; in ath11k_reg_intersect_rules()
395 end_freq1 = rule1->freq_range.end_freq_khz; in ath11k_reg_intersect_rules()
396 end_freq2 = rule2->freq_range.end_freq_khz; in ath11k_reg_intersect_rules()
398 new_rule->freq_range.start_freq_khz = max_t(u32, start_freq1, in ath11k_reg_intersect_rules()
400 new_rule->freq_range.end_freq_khz = min_t(u32, end_freq1, end_freq2); in ath11k_reg_intersect_rules()
402 freq_diff = new_rule->freq_range.end_freq_khz - in ath11k_reg_intersect_rules()
403 new_rule->freq_range.start_freq_khz; in ath11k_reg_intersect_rules()
404 max_bw = min_t(u32, rule1->freq_range.max_bandwidth_khz, in ath11k_reg_intersect_rules()
405 rule2->freq_range.max_bandwidth_khz); in ath11k_reg_intersect_rules()
406 new_rule->freq_range.max_bandwidth_khz = min_t(u32, max_bw, freq_diff); in ath11k_reg_intersect_rules()
408 new_rule->power_rule.max_antenna_gain = in ath11k_reg_intersect_rules()
409 min_t(u32, rule1->power_rule.max_antenna_gain, in ath11k_reg_intersect_rules()
410 rule2->power_rule.max_antenna_gain); in ath11k_reg_intersect_rules()
412 new_rule->power_rule.max_eirp = min_t(u32, rule1->power_rule.max_eirp, in ath11k_reg_intersect_rules()
413 rule2->power_rule.max_eirp); in ath11k_reg_intersect_rules()
416 new_rule->flags = rule1->flags | rule2->flags; in ath11k_reg_intersect_rules()
418 if ((rule1->flags & NL80211_RRF_PSD) && (rule2->flags & NL80211_RRF_PSD)) in ath11k_reg_intersect_rules()
419 new_rule->psd = min_t(s8, rule1->psd, rule2->psd); in ath11k_reg_intersect_rules()
421 new_rule->flags &= ~NL80211_RRF_PSD; in ath11k_reg_intersect_rules()
423 /* To be safe, lts use the max cac timeout of both rules */ in ath11k_reg_intersect_rules()
424 new_rule->dfs_cac_ms = max_t(u32, rule1->dfs_cac_ms, in ath11k_reg_intersect_rules()
425 rule2->dfs_cac_ms); in ath11k_reg_intersect_rules()
437 num_old_regd_rules = default_regd->n_reg_rules; in ath11k_regd_intersect()
438 num_curr_regd_rules = curr_regd->n_reg_rules; in ath11k_regd_intersect()
443 old_rule = default_regd->reg_rules + i; in ath11k_regd_intersect()
445 curr_rule = curr_regd->reg_rules + j; in ath11k_regd_intersect()
464 * default regdomain. Also MAX of the dfs cac timeout is selected. in ath11k_regd_intersect()
466 new_regd->n_reg_rules = num_new_regd_rules; in ath11k_regd_intersect()
467 memcpy(new_regd->alpha2, curr_regd->alpha2, sizeof(new_regd->alpha2)); in ath11k_regd_intersect()
468 new_regd->dfs_region = curr_regd->dfs_region; in ath11k_regd_intersect()
469 new_rule = new_regd->reg_rules; in ath11k_regd_intersect()
472 old_rule = default_regd->reg_rules + i; in ath11k_regd_intersect()
474 curr_rule = curr_regd->reg_rules + j; in ath11k_regd_intersect()
507 bw = end_freq - start_freq; in ath11k_reg_adjust_bw()
527 reg_rule->freq_range.start_freq_khz = MHZ_TO_KHZ(start_freq); in ath11k_reg_update_rule()
528 reg_rule->freq_range.end_freq_khz = MHZ_TO_KHZ(end_freq); in ath11k_reg_update_rule()
529 reg_rule->freq_range.max_bandwidth_khz = MHZ_TO_KHZ(bw); in ath11k_reg_update_rule()
530 reg_rule->power_rule.max_antenna_gain = DBI_TO_MBI(ant_gain); in ath11k_reg_update_rule()
531 reg_rule->power_rule.max_eirp = DBM_TO_MBM(reg_pwr); in ath11k_reg_update_rule()
532 reg_rule->psd = psd; in ath11k_reg_update_rule()
533 reg_rule->flags = reg_flags; in ath11k_reg_update_rule()
550 i--; in ath11k_reg_update_weather_radar_band()
553 bw = ath11k_reg_adjust_bw(reg_rule->start_freq, in ath11k_reg_update_weather_radar_band()
558 ath11k_reg_update_rule(regd->reg_rules + i, in ath11k_reg_update_weather_radar_band()
559 reg_rule->start_freq, in ath11k_reg_update_weather_radar_band()
561 reg_rule->ant_gain, reg_rule->reg_power, in ath11k_reg_update_weather_radar_band()
562 reg_rule->psd_eirp, flags); in ath11k_reg_update_weather_radar_band()
565 "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n", in ath11k_reg_update_weather_radar_band()
566 i + 1, reg_rule->start_freq, in ath11k_reg_update_weather_radar_band()
567 ETSI_WEATHER_RADAR_BAND_LOW, bw, reg_rule->ant_gain, in ath11k_reg_update_weather_radar_band()
568 reg_rule->reg_power, regd->reg_rules[i].dfs_cac_ms, in ath11k_reg_update_weather_radar_band()
573 start_freq = max_t(u32, reg_rule->start_freq, in ath11k_reg_update_weather_radar_band()
575 end_freq = min_t(u32, reg_rule->end_freq, ETSI_WEATHER_RADAR_BAND_HIGH); in ath11k_reg_update_weather_radar_band()
581 ath11k_reg_update_rule(regd->reg_rules + i, start_freq, in ath11k_reg_update_weather_radar_band()
582 end_freq, bw, reg_rule->ant_gain, in ath11k_reg_update_weather_radar_band()
583 reg_rule->reg_power, reg_rule->psd_eirp, flags); in ath11k_reg_update_weather_radar_band()
585 regd->reg_rules[i].dfs_cac_ms = ETSI_WEATHER_RADAR_BAND_CAC_TIMEOUT; in ath11k_reg_update_weather_radar_band()
588 "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n", in ath11k_reg_update_weather_radar_band()
590 reg_rule->ant_gain, reg_rule->reg_power, in ath11k_reg_update_weather_radar_band()
591 regd->reg_rules[i].dfs_cac_ms, flags); in ath11k_reg_update_weather_radar_band()
596 reg_rule->end_freq, max_bw); in ath11k_reg_update_weather_radar_band()
600 ath11k_reg_update_rule(regd->reg_rules + i, in ath11k_reg_update_weather_radar_band()
602 reg_rule->end_freq, bw, in ath11k_reg_update_weather_radar_band()
603 reg_rule->ant_gain, reg_rule->reg_power, in ath11k_reg_update_weather_radar_band()
604 reg_rule->psd_eirp, flags); in ath11k_reg_update_weather_radar_band()
607 "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n", in ath11k_reg_update_weather_radar_band()
609 reg_rule->end_freq, bw, reg_rule->ant_gain, in ath11k_reg_update_weather_radar_band()
610 reg_rule->reg_power, regd->reg_rules[i].dfs_cac_ms, in ath11k_reg_update_weather_radar_band()
646 num_rules = reg_info->num_5ghz_reg_rules + reg_info->num_2ghz_reg_rules; in ath11k_reg_build_regd()
648 if (reg_info->is_ext_reg_event) { in ath11k_reg_build_regd()
657 reg_6ghz_number = reg_info->num_6ghz_rules_client in ath11k_reg_build_regd()
662 reg_6ghz_number = reg_info->num_6ghz_rules_client in ath11k_reg_build_regd()
666 reg_rule_6ghz = reg_info->reg_rules_6ghz_client_ptr in ath11k_reg_build_regd()
668 max_bw_6ghz = reg_info->max_bw_6ghz_client in ath11k_reg_build_regd()
671 reg_6ghz_number = reg_info->num_6ghz_rules_ap[WMI_REG_INDOOR_AP]; in ath11k_reg_build_regd()
673 reg_info->reg_rules_6ghz_ap_ptr[WMI_REG_INDOOR_AP]; in ath11k_reg_build_regd()
674 max_bw_6ghz = reg_info->max_bw_6ghz_ap[WMI_REG_INDOOR_AP]; in ath11k_reg_build_regd()
684 if (reg_info->dfs_region == ATH11K_DFS_REG_ETSI) in ath11k_reg_build_regd()
693 memcpy(tmp_regd->alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1); in ath11k_reg_build_regd()
694 memcpy(alpha2, reg_info->alpha2, REG_ALPHA2_LEN + 1); in ath11k_reg_build_regd()
696 tmp_regd->dfs_region = ath11k_map_fw_dfs_region(reg_info->dfs_region); in ath11k_reg_build_regd()
700 alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region), in ath11k_reg_build_regd()
701 reg_info->dfs_region, num_rules); in ath11k_reg_build_regd()
706 if (reg_info->num_2ghz_reg_rules && in ath11k_reg_build_regd()
707 (i < reg_info->num_2ghz_reg_rules)) { in ath11k_reg_build_regd()
708 reg_rule = reg_info->reg_rules_2ghz_ptr + i; in ath11k_reg_build_regd()
709 max_bw = min_t(u16, reg_rule->max_bw, in ath11k_reg_build_regd()
710 reg_info->max_bw_2ghz); in ath11k_reg_build_regd()
712 } else if (reg_info->num_5ghz_reg_rules && in ath11k_reg_build_regd()
713 (j < reg_info->num_5ghz_reg_rules)) { in ath11k_reg_build_regd()
714 reg_rule = reg_info->reg_rules_5ghz_ptr + j++; in ath11k_reg_build_regd()
715 max_bw = min_t(u16, reg_rule->max_bw, in ath11k_reg_build_regd()
716 reg_info->max_bw_5ghz); in ath11k_reg_build_regd()
725 } else if (reg_info->is_ext_reg_event && reg_6ghz_number && in ath11k_reg_build_regd()
728 max_bw = min_t(u16, reg_rule->max_bw, max_bw_6ghz); in ath11k_reg_build_regd()
730 if (reg_rule->psd_flag) in ath11k_reg_build_regd()
736 flags |= ath11k_map_fw_reg_flags(reg_rule->flags); in ath11k_reg_build_regd()
737 flags |= ath11k_map_fw_phy_flags(reg_info->phybitmap); in ath11k_reg_build_regd()
739 ath11k_reg_update_rule(tmp_regd->reg_rules + i, in ath11k_reg_build_regd()
740 reg_rule->start_freq, in ath11k_reg_build_regd()
741 reg_rule->end_freq, max_bw, in ath11k_reg_build_regd()
742 reg_rule->ant_gain, reg_rule->reg_power, in ath11k_reg_build_regd()
743 reg_rule->psd_eirp, flags); in ath11k_reg_build_regd()
745 /* Update dfs cac timeout if the dfs domain is ETSI and the in ath11k_reg_build_regd()
747 * Default value of '0' corresponds to 60s timeout, so no in ath11k_reg_build_regd()
751 reg_info->dfs_region == ATH11K_DFS_REG_ETSI && in ath11k_reg_build_regd()
752 (reg_rule->end_freq > ETSI_WEATHER_RADAR_BAND_LOW && in ath11k_reg_build_regd()
753 reg_rule->start_freq < ETSI_WEATHER_RADAR_BAND_HIGH)){ in ath11k_reg_build_regd()
760 if (reg_info->is_ext_reg_event) { in ath11k_reg_build_regd()
762 "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d) (%d, %d)\n", in ath11k_reg_build_regd()
763 i + 1, reg_rule->start_freq, reg_rule->end_freq, in ath11k_reg_build_regd()
764 max_bw, reg_rule->ant_gain, reg_rule->reg_power, in ath11k_reg_build_regd()
765 tmp_regd->reg_rules[i].dfs_cac_ms, flags, in ath11k_reg_build_regd()
766 reg_rule->psd_flag, reg_rule->psd_eirp); in ath11k_reg_build_regd()
769 "\t%d. (%d - %d @ %d) (%d, %d) (%d ms) (FLAGS %d)\n", in ath11k_reg_build_regd()
770 i + 1, reg_rule->start_freq, reg_rule->end_freq, in ath11k_reg_build_regd()
771 max_bw, reg_rule->ant_gain, reg_rule->reg_power, in ath11k_reg_build_regd()
772 tmp_regd->reg_rules[i].dfs_cac_ms, in ath11k_reg_build_regd()
777 tmp_regd->n_reg_rules = i; in ath11k_reg_build_regd()
780 default_regd = ab->default_regd[reg_info->phy_id]; in ath11k_reg_build_regd()
809 spin_lock_bh(&ar->data_lock); in ath11k_regd_update_chan_list_work()
810 list_splice_tail_init(&ar->channel_update_queue, &local_update_list); in ath11k_regd_update_chan_list_work()
811 spin_unlock_bh(&ar->data_lock); in ath11k_regd_update_chan_list_work()
816 if (ar->state_11d != ATH11K_11D_IDLE) { in ath11k_regd_update_chan_list_work()
817 left = wait_for_completion_timeout(&ar->completed_11d_scan, in ath11k_regd_update_chan_list_work()
820 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_regd_update_chan_list_work()
822 ar->state_11d = ATH11K_11D_IDLE; in ath11k_regd_update_chan_list_work()
825 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_regd_update_chan_list_work()
829 if ((ar->scan.state == ATH11K_SCAN_STARTING || in ath11k_regd_update_chan_list_work()
830 ar->scan.state == ATH11K_SCAN_RUNNING)) { in ath11k_regd_update_chan_list_work()
831 left = wait_for_completion_timeout(&ar->scan.completed, in ath11k_regd_update_chan_list_work()
834 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_regd_update_chan_list_work()
835 "failed to receive hw scan complete: timed out\n"); in ath11k_regd_update_chan_list_work()
837 ath11k_dbg(ar->ab, ATH11K_DBG_REG, in ath11k_regd_update_chan_list_work()
838 "reg hw scan wait left time %d\n", left); in ath11k_regd_update_chan_list_work()
842 list_del(&params->list); in ath11k_regd_update_chan_list_work()
864 * reg rules. It means multi-interface concurrency in the same ath11k is in ath11k_reg_get_ar_vdev_type()
868 arvif = list_first_entry_or_null(&ar->arvifs, struct ath11k_vif, list); in ath11k_reg_get_ar_vdev_type()
870 return arvif->vdev_type; in ath11k_reg_get_ar_vdev_type()
887 if (reg_info->status_code != REG_SET_CC_STATUS_PASS) { in ath11k_reg_handle_chan_list()
893 return -EINVAL; in ath11k_reg_handle_chan_list()
896 pdev_idx = reg_info->phy_id; in ath11k_reg_handle_chan_list()
901 spin_lock_bh(&ab->base_lock); in ath11k_reg_handle_chan_list()
902 if (test_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags) && in ath11k_reg_handle_chan_list()
903 ab->default_regd[pdev_idx]) { in ath11k_reg_handle_chan_list()
904 spin_unlock_bh(&ab->base_lock); in ath11k_reg_handle_chan_list()
907 spin_unlock_bh(&ab->base_lock); in ath11k_reg_handle_chan_list()
909 if (pdev_idx >= ab->num_radios) { in ath11k_reg_handle_chan_list()
918 if (ab->hw_params.single_pdev_only && in ath11k_reg_handle_chan_list()
919 pdev_idx < ab->hw_params.num_rxdma_per_pdev) in ath11k_reg_handle_chan_list()
925 * stop-start after mac registration. in ath11k_reg_handle_chan_list()
927 if (ab->default_regd[pdev_idx] && !ab->new_regd[pdev_idx] && in ath11k_reg_handle_chan_list()
928 !memcmp((char *)ab->default_regd[pdev_idx]->alpha2, in ath11k_reg_handle_chan_list()
929 (char *)reg_info->alpha2, 2)) in ath11k_reg_handle_chan_list()
936 if (ab->default_regd[pdev_idx] && in ath11k_reg_handle_chan_list()
938 ab->default_regd[pdev_idx]->alpha2) && in ath11k_reg_handle_chan_list()
939 !ath11k_reg_is_world_alpha((char *)reg_info->alpha2)) in ath11k_reg_handle_chan_list()
942 ar = ab->pdevs[pdev_idx].ar; in ath11k_reg_handle_chan_list()
956 ath11k_reg_reset_info(&ab->reg_info_store[pdev_idx]); in ath11k_reg_handle_chan_list()
957 ab->reg_info_store[pdev_idx] = *reg_info; in ath11k_reg_handle_chan_list()
960 spin_lock_bh(&ab->base_lock); in ath11k_reg_handle_chan_list()
961 if (ab->default_regd[pdev_idx]) { in ath11k_reg_handle_chan_list()
969 ar = ab->pdevs[pdev_idx].ar; in ath11k_reg_handle_chan_list()
970 kfree(ab->new_regd[pdev_idx]); in ath11k_reg_handle_chan_list()
971 ab->new_regd[pdev_idx] = regd; in ath11k_reg_handle_chan_list()
972 queue_work(ab->workqueue, &ar->regd_update_work); in ath11k_reg_handle_chan_list()
977 ab->default_regd[pdev_idx] = regd; in ath11k_reg_handle_chan_list()
979 ab->dfs_region = reg_info->dfs_region; in ath11k_reg_handle_chan_list()
980 spin_unlock_bh(&ab->base_lock); in ath11k_reg_handle_chan_list()
997 return -EINVAL; in ath11k_reg_handle_chan_list()
1019 ar->hw->wiphy->regulatory_flags = REGULATORY_WIPHY_SELF_MANAGED; in ath11k_reg_init()
1020 ar->hw->wiphy->flags |= WIPHY_FLAG_NOTIFY_REGDOM_BY_DRIVER; in ath11k_reg_init()
1021 ar->hw->wiphy->reg_notifier = ath11k_reg_notifier; in ath11k_reg_init()
1031 kfree(reg_info->reg_rules_2ghz_ptr); in ath11k_reg_reset_info()
1032 kfree(reg_info->reg_rules_5ghz_ptr); in ath11k_reg_reset_info()
1035 kfree(reg_info->reg_rules_6ghz_ap_ptr[i]); in ath11k_reg_reset_info()
1038 kfree(reg_info->reg_rules_6ghz_client_ptr[i][j]); in ath11k_reg_reset_info()
1048 for (i = 0; i < ab->num_radios; i++) in ath11k_reg_free()
1049 ath11k_reg_reset_info(&ab->reg_info_store[i]); in ath11k_reg_free()
1051 kfree(ab->reg_info_store); in ath11k_reg_free()
1052 ab->reg_info_store = NULL; in ath11k_reg_free()
1054 for (i = 0; i < ab->hw_params.max_radios; i++) { in ath11k_reg_free()
1055 kfree(ab->default_regd[i]); in ath11k_reg_free()
1056 kfree(ab->new_regd[i]); in ath11k_reg_free()
1064 memcpy(&set_current_param.alpha2, ar->alpha2, 2); in ath11k_reg_set_cc()