Lines Matching +full:host2wbm +full:- +full:desc +full:- +full:feed
1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
12 #include <linux/dma-mapping.h>
28 { .compatible = "qcom,ipq8074-wifi",
31 { .compatible = "qcom,ipq6018-wifi",
34 { .compatible = "qcom,wcn6750-wifi",
37 { .compatible = "qcom,ipq5018-wifi",
48 "misc-pulse1",
49 "misc-latch",
50 "sw-exception",
64 "host2wbm-desc-feed",
65 "host2reo-re-injection",
66 "host2reo-command",
67 "host2rxdma-monitor-ring3",
68 "host2rxdma-monitor-ring2",
69 "host2rxdma-monitor-ring1",
70 "reo2ost-exception",
71 "wbm2host-rx-release",
72 "reo2host-status",
73 "reo2host-destination-ring4",
74 "reo2host-destination-ring3",
75 "reo2host-destination-ring2",
76 "reo2host-destination-ring1",
77 "rxdma2host-monitor-destination-mac3",
78 "rxdma2host-monitor-destination-mac2",
79 "rxdma2host-monitor-destination-mac1",
80 "ppdu-end-interrupts-mac3",
81 "ppdu-end-interrupts-mac2",
82 "ppdu-end-interrupts-mac1",
83 "rxdma2host-monitor-status-ring-mac3",
84 "rxdma2host-monitor-status-ring-mac2",
85 "rxdma2host-monitor-status-ring-mac1",
86 "host2rxdma-host-buf-ring-mac3",
87 "host2rxdma-host-buf-ring-mac2",
88 "host2rxdma-host-buf-ring-mac1",
89 "rxdma2host-destination-ring-mac3",
90 "rxdma2host-destination-ring-mac2",
91 "rxdma2host-destination-ring-mac1",
92 "host2tcl-input-ring4",
93 "host2tcl-input-ring3",
94 "host2tcl-input-ring2",
95 "host2tcl-input-ring1",
96 "wbm2host-tx-completions-ring3",
97 "wbm2host-tx-completions-ring2",
98 "wbm2host-tx-completions-ring1",
99 "tcl2host-status-ring",
102 /* enum ext_irq_num - irq numbers that can be used by external modules
147 return ab->pci.msi.irqs[vector];
174 iowrite32(value, ab->mem + window_start +
186 val = ioread32(ab->mem + window_start +
201 return ioread32(ab->mem + offset);
206 iowrite32(value, ab->mem + offset);
213 for (i = 0; i < ab->hw_params.ce_count; i++) {
214 struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
219 tasklet_kill(&ce_pipe->intr_tq);
227 for (i = 0; i < irq_grp->num_irq; i++)
228 disable_irq_nosync(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
236 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
240 if (irq_grp->napi_enabled) {
241 napi_synchronize(&irq_grp->napi);
242 napi_disable(&irq_grp->napi);
243 irq_grp->napi_enabled = false;
252 for (i = 0; i < irq_grp->num_irq; i++)
253 enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
275 const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
278 ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
279 ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
280 ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
282 ce_attr = &ab->hw_params.host_ce_config[ce_id];
283 if (ce_attr->src_nentries)
286 if (ce_attr->dest_nentries) {
296 const struct ce_ie_addr *ce_ie_addr = ab->hw_params.ce_ie_addr;
299 ie1_reg_addr = ce_ie_addr->ie1_reg_addr + ATH11K_CE_OFFSET(ab);
300 ie2_reg_addr = ce_ie_addr->ie2_reg_addr + ATH11K_CE_OFFSET(ab);
301 ie3_reg_addr = ce_ie_addr->ie3_reg_addr + ATH11K_CE_OFFSET(ab);
303 ce_attr = &ab->hw_params.host_ce_config[ce_id];
304 if (ce_attr->src_nentries)
307 if (ce_attr->dest_nentries) {
319 for (i = 0; i < ab->hw_params.ce_count; i++) {
324 synchronize_irq(ab->irq_num[irq_idx]);
334 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
336 for (j = 0; j < irq_grp->num_irq; j++) {
337 irq_idx = irq_grp->irqs[j];
338 synchronize_irq(ab->irq_num[irq_idx]);
347 for (i = 0; i < ab->hw_params.ce_count; i++) {
358 for (i = 0; i < ab->hw_params.ce_count; i++) {
378 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
380 if (!irq_grp->napi_enabled) {
381 napi_enable(&irq_grp->napi);
382 irq_grp->napi_enabled = true;
396 if (!test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
400 timer_delete_sync(&ab->rx_replenish_retry);
409 ret = rproc_boot(ab_ahb->tgt_rproc);
420 rproc_shutdown(ab_ahb->tgt_rproc);
425 struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
427 cfg->tgt_ce_len = ab->hw_params.target_ce_count;
428 cfg->tgt_ce = ab->hw_params.target_ce_config;
429 cfg->svc_to_ce_map_len = ab->hw_params.svc_to_ce_map_len;
430 cfg->svc_to_ce_map = ab->hw_params.svc_to_ce_map;
431 ab->qmi.service_ins_id = ab->hw_params.qmi_service_ins_id;
439 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
441 for (j = 0; j < irq_grp->num_irq; j++)
442 free_irq(ab->irq_num[irq_grp->irqs[j]], irq_grp);
444 netif_napi_del(&irq_grp->napi);
445 free_netdev(irq_grp->napi_ndev);
454 if (ab->hw_params.hybrid_bus_type)
457 for (i = 0; i < ab->hw_params.ce_count; i++) {
461 free_irq(ab->irq_num[irq_idx], &ab->ce.ce_pipe[i]);
471 ath11k_ce_per_engine_service(ce_pipe->ab, ce_pipe->pipe_num);
473 ath11k_ahb_ce_irq_enable(ce_pipe->ab, ce_pipe->pipe_num);
481 ce_pipe->timestamp = jiffies;
483 ath11k_ahb_ce_irq_disable(ce_pipe->ab, ce_pipe->pipe_num);
485 tasklet_schedule(&ce_pipe->intr_tq);
495 struct ath11k_base *ab = irq_grp->ab;
515 irq_grp->timestamp = jiffies;
519 napi_schedule(&irq_grp->napi);
526 struct ath11k_hw_params *hw = &ab->hw_params;
532 struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
535 irq_grp->ab = ab;
536 irq_grp->grp_id = i;
538 irq_grp->napi_ndev = alloc_netdev_dummy(0);
539 if (!irq_grp->napi_ndev)
540 return -ENOMEM;
542 netif_napi_add(irq_grp->napi_ndev, &irq_grp->napi,
546 if (ab->hw_params.ring_mask->tx[i] & BIT(j)) {
547 irq_grp->irqs[num_irq++] =
548 wbm2host_tx_completions_ring1 - j;
551 if (ab->hw_params.ring_mask->rx[i] & BIT(j)) {
552 irq_grp->irqs[num_irq++] =
553 reo2host_destination_ring1 - j;
556 if (ab->hw_params.ring_mask->rx_err[i] & BIT(j))
557 irq_grp->irqs[num_irq++] = reo2host_exception;
559 if (ab->hw_params.ring_mask->rx_wbm_rel[i] & BIT(j))
560 irq_grp->irqs[num_irq++] = wbm2host_rx_release;
562 if (ab->hw_params.ring_mask->reo_status[i] & BIT(j))
563 irq_grp->irqs[num_irq++] = reo2host_status;
565 if (j < ab->hw_params.max_radios) {
566 if (ab->hw_params.ring_mask->rxdma2host[i] & BIT(j)) {
567 irq_grp->irqs[num_irq++] =
568 rxdma2host_destination_ring_mac1 -
572 if (ab->hw_params.ring_mask->host2rxdma[i] & BIT(j)) {
573 irq_grp->irqs[num_irq++] =
574 host2rxdma_host_buf_ring_mac1 -
578 if (ab->hw_params.ring_mask->rx_mon_status[i] & BIT(j)) {
579 irq_grp->irqs[num_irq++] =
580 ppdu_end_interrupts_mac1 -
582 irq_grp->irqs[num_irq++] =
583 rxdma2host_monitor_status_ring_mac1 -
588 irq_grp->num_irq = num_irq;
590 for (j = 0; j < irq_grp->num_irq; j++) {
591 int irq_idx = irq_grp->irqs[j];
593 irq = platform_get_irq_byname(ab->pdev,
595 ab->irq_num[irq_idx] = irq;
615 if (ab->hw_params.hybrid_bus_type)
619 for (i = 0; i < ab->hw_params.ce_count; i++) {
620 struct ath11k_ce_pipe *ce_pipe = &ab->ce.ce_pipe[i];
627 tasklet_setup(&ce_pipe->intr_tq, ath11k_ahb_ce_tasklet);
628 irq = platform_get_irq_byname(ab->pdev, irq_name[irq_idx]);
635 ab->irq_num[irq_idx] = irq;
651 for (i = 0; i < ab->hw_params.svc_to_ce_map_len; i++) {
652 entry = &ab->hw_params.svc_to_ce_map[i];
654 if (__le32_to_cpu(entry->service_id) != service_id)
657 switch (__le32_to_cpu(entry->pipedir)) {
662 *dl_pipe = __le32_to_cpu(entry->pipenum);
667 *ul_pipe = __le32_to_cpu(entry->pipenum);
673 *dl_pipe = __le32_to_cpu(entry->pipenum);
674 *ul_pipe = __le32_to_cpu(entry->pipenum);
682 return -ENOENT;
694 if (!device_may_wakeup(ab->dev))
695 return -EPERM;
697 wake_irq = ab->irq_num[ATH11K_PCI_IRQ_CE0_OFFSET + ATH11K_PCI_CE_WAKE_IRQ];
705 value = u32_encode_bits(ab_ahb->smp2p_info.seq_no++,
710 ret = qcom_smem_state_update_bits(ab_ahb->smp2p_info.smem_state,
729 if (!device_may_wakeup(ab->dev))
730 return -EPERM;
732 wake_irq = ab->irq_num[ATH11K_PCI_IRQ_CE0_OFFSET + ATH11K_PCI_CE_WAKE_IRQ];
740 reinit_completion(&ab->wow.wakeup_completed);
742 value = u32_encode_bits(ab_ahb->smp2p_info.seq_no++,
747 ret = qcom_smem_state_update_bits(ab_ahb->smp2p_info.smem_state,
754 ret = wait_for_completion_timeout(&ab->wow.wakeup_completed, 3 * HZ);
757 return -ETIMEDOUT;
800 struct device *dev = ab->dev;
804 if (of_property_read_u32(dev->of_node, "qcom,rproc", &rproc_phandle)) {
806 return -ENOENT;
812 return -EPROBE_DEFER;
814 ab_ahb->tgt_rproc = prproc;
821 struct platform_device *pdev = ab->pdev;
838 return -ENOENT;
841 msi_addr_pa = res->start;
842 msi_addr_iova = dma_map_resource(ab->dev, msi_addr_pa, PAGE_SIZE,
844 if (dma_mapping_error(ab->dev, msi_addr_iova))
845 return -ENOMEM;
847 ab->pci.msi.addr_lo = lower_32_bits(msi_addr_iova);
848 ab->pci.msi.addr_hi = upper_32_bits(msi_addr_iova);
850 ret = of_property_read_u32_index(ab->dev->of_node, "interrupts", 1, &int_prop);
854 ab->pci.msi.ep_base_data = int_prop + 32;
856 for (i = 0; i < ab->pci.msi.config->total_vectors; i++) {
861 ab->pci.msi.irqs[i] = ret;
864 set_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &ab->dev_flags);
873 if (!ab->hw_params.smp2p_wow_exit)
876 ab_ahb->smp2p_info.smem_state = qcom_smem_state_get(ab->dev, "wlan-smp2p-out",
877 &ab_ahb->smp2p_info.smem_bit);
878 if (IS_ERR(ab_ahb->smp2p_info.smem_state)) {
880 PTR_ERR(ab_ahb->smp2p_info.smem_state));
881 return PTR_ERR(ab_ahb->smp2p_info.smem_state);
891 if (!ab->hw_params.smp2p_wow_exit)
894 qcom_smem_state_put(ab_ahb->smp2p_info.smem_state);
899 struct platform_device *pdev = ab->pdev;
903 if (ab->hw_params.hybrid_bus_type)
908 dev_err(&pdev->dev, "ioremap error\n");
912 ab->mem = mem;
913 ab->mem_len = resource_size(mem_res);
921 struct device *dev = ab->dev;
926 node = of_parse_phandle(dev->of_node, "memory-region", 0);
928 return -ENOENT;
937 ab_ahb->fw.msa_paddr = r.start;
938 ab_ahb->fw.msa_size = resource_size(&r);
940 node = of_parse_phandle(dev->of_node, "memory-region", 1);
942 return -ENOENT;
951 ab_ahb->fw.ce_paddr = r.start;
952 ab_ahb->fw.ce_size = resource_size(&r);
959 const struct ce_remap *ce_remap = ab->hw_params.ce_remap;
960 struct platform_device *pdev = ab->pdev;
964 ab->mem_ce = ab->mem;
972 ab->mem_ce = ioremap(ce_remap->base, ce_remap->size);
973 if (!ab->mem_ce) {
974 dev_err(&pdev->dev, "ce ioremap error\n");
975 return -ENOMEM;
983 if (ab->hw_params.ce_remap)
984 iounmap(ab->mem_ce);
990 struct device *host_dev = ab->dev;
1000 if (!ab->hw_params.fixed_fw_mem)
1003 node = of_get_child_by_name(host_dev->of_node, "wifi-firmware");
1005 ab_ahb->fw.use_tz = true;
1015 info.fwnode = &node->fwnode;
1017 info.name = node->name;
1026 ret = of_dma_configure(&pdev->dev, node, true);
1032 ab_ahb->fw.dev = &pdev->dev;
1034 iommu_dom = iommu_paging_domain_alloc(ab_ahb->fw.dev);
1041 ret = iommu_attach_device(iommu_dom, ab_ahb->fw.dev);
1047 ret = iommu_map(iommu_dom, ab_ahb->fw.msa_paddr,
1048 ab_ahb->fw.msa_paddr, ab_ahb->fw.msa_size,
1055 ret = iommu_map(iommu_dom, ab_ahb->fw.ce_paddr,
1056 ab_ahb->fw.ce_paddr, ab_ahb->fw.ce_size,
1063 ab_ahb->fw.use_tz = false;
1064 ab_ahb->fw.iommu_domain = iommu_dom;
1070 iommu_unmap(iommu_dom, ab_ahb->fw.msa_paddr, ab_ahb->fw.msa_size);
1073 iommu_detach_device(iommu_dom, ab_ahb->fw.dev);
1094 if (!ab->hw_params.fixed_fw_mem)
1097 if (ab_ahb->fw.use_tz)
1100 iommu = ab_ahb->fw.iommu_domain;
1102 unmapped_size = iommu_unmap(iommu, ab_ahb->fw.msa_paddr, ab_ahb->fw.msa_size);
1103 if (unmapped_size != ab_ahb->fw.msa_size)
1107 unmapped_size = iommu_unmap(iommu, ab_ahb->fw.ce_paddr, ab_ahb->fw.ce_size);
1108 if (unmapped_size != ab_ahb->fw.ce_size)
1112 iommu_detach_device(iommu, ab_ahb->fw.dev);
1115 platform_device_unregister(to_platform_device(ab_ahb->fw.dev));
1128 hw_rev = (uintptr_t)device_get_match_data(&pdev->dev);
1142 dev_err(&pdev->dev, "unsupported device type %d\n", hw_rev);
1143 return -EOPNOTSUPP;
1146 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1148 dev_err(&pdev->dev, "failed to set 32-bit consistent dma\n");
1152 ab = ath11k_core_alloc(&pdev->dev, sizeof(struct ath11k_ahb),
1155 dev_err(&pdev->dev, "failed to allocate ath11k base\n");
1156 return -ENOMEM;
1159 ab->hif.ops = hif_ops;
1160 ab->pdev = pdev;
1161 ab->hw_rev = hw_rev;
1162 ab->fw_mode = ATH11K_FIRMWARE_MODE_NORMAL;
1251 if (test_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags)) {
1252 left = wait_for_completion_timeout(&ab->driver_recovery,
1258 set_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags);
1259 cancel_work_sync(&ab->restart_work);
1260 cancel_work_sync(&ab->qmi.event_work);
1265 struct platform_device *pdev = ab->pdev;
1282 if (test_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags)) {
1307 if (!(test_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags)))