Lines Matching +full:msb +full:- +full:-
1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.
13 #include "wmi-ops.h"
216 .msb = 0x00000010,
222 .msb = 0x00000012,
228 .msb = 0x00000000,
270 .msb = 0x00000000,
276 .msb = 0x0000000f,
295 .msb = 0x0000000f,
348 .msb = 0x00000010,
354 .msb = 0x00000011,
360 .msb = 0x0000000f,
379 .msb = 0x00000003,
385 .msb = 0x00000000,
392 .msb = 0x00000000,
424 .msb = 0x0000001f,
430 .msb = 0x0000000f,
449 .msb = 0x0000000f,
557 survey->filled |= SURVEY_INFO_TIME | in ath10k_hw_fill_survey_time()
560 wraparound_type = ar->hw_params.cc_wraparound_type; in ath10k_hw_fill_survey_time()
567 survey->filled &= ~SURVEY_INFO_TIME_BUSY; in ath10k_hw_fill_survey_time()
582 cc -= cc_prev - cc_fix; in ath10k_hw_fill_survey_time()
583 rcc -= rcc_prev - rcc_fix; in ath10k_hw_fill_survey_time()
585 survey->time = CCNT_TO_MSEC(ar, cc); in ath10k_hw_fill_survey_time()
586 survey->time_busy = CCNT_TO_MSEC(ar, rcc); in ath10k_hw_fill_survey_time()
606 mutex_lock(&ar->conf_mutex); in ath10k_hw_qca988x_set_coverage_class()
609 if ((ar->state != ATH10K_STATE_ON) && in ath10k_hw_qca988x_set_coverage_class()
610 (ar->state != ATH10K_STATE_RESTARTED)) { in ath10k_hw_qca988x_set_coverage_class()
611 spin_lock_bh(&ar->data_lock); in ath10k_hw_qca988x_set_coverage_class()
613 ar->fw_coverage.coverage_class = value; in ath10k_hw_qca988x_set_coverage_class()
614 spin_unlock_bh(&ar->data_lock); in ath10k_hw_qca988x_set_coverage_class()
630 value = ar->fw_coverage.coverage_class; in ath10k_hw_qca988x_set_coverage_class()
635 if (value == ar->fw_coverage.coverage_class && in ath10k_hw_qca988x_set_coverage_class()
636 slottime_reg == ar->fw_coverage.reg_slottime_conf && in ath10k_hw_qca988x_set_coverage_class()
637 timeout_reg == ar->fw_coverage.reg_ack_cts_timeout_conf && in ath10k_hw_qca988x_set_coverage_class()
638 phyclk_reg == ar->fw_coverage.reg_phyclk) in ath10k_hw_qca988x_set_coverage_class()
642 if (slottime_reg != ar->fw_coverage.reg_slottime_conf) in ath10k_hw_qca988x_set_coverage_class()
643 ar->fw_coverage.reg_slottime_orig = slottime_reg; in ath10k_hw_qca988x_set_coverage_class()
644 if (timeout_reg != ar->fw_coverage.reg_ack_cts_timeout_conf) in ath10k_hw_qca988x_set_coverage_class()
645 ar->fw_coverage.reg_ack_cts_timeout_orig = timeout_reg; in ath10k_hw_qca988x_set_coverage_class()
646 ar->fw_coverage.reg_phyclk = phyclk_reg; in ath10k_hw_qca988x_set_coverage_class()
649 slottime_reg = ar->fw_coverage.reg_slottime_orig; in ath10k_hw_qca988x_set_coverage_class()
650 timeout_reg = ar->fw_coverage.reg_ack_cts_timeout_orig; in ath10k_hw_qca988x_set_coverage_class()
719 spin_lock_bh(&ar->data_lock); in ath10k_hw_qca988x_set_coverage_class()
720 ar->fw_coverage.coverage_class = value; in ath10k_hw_qca988x_set_coverage_class()
721 spin_unlock_bh(&ar->data_lock); in ath10k_hw_qca988x_set_coverage_class()
723 ar->fw_coverage.reg_slottime_conf = slottime_reg; in ath10k_hw_qca988x_set_coverage_class()
724 ar->fw_coverage.reg_ack_cts_timeout_conf = timeout_reg; in ath10k_hw_qca988x_set_coverage_class()
727 mutex_unlock(&ar->conf_mutex); in ath10k_hw_qca988x_set_coverage_class()
731 * ath10k_hw_qca6174_enable_pll_clock() - enable the qca6174 hw pll clock
750 hw = &ar->hw_params; in ath10k_hw_qca6174_enable_pll_clock()
752 if (ar->regs->core_clk_div_address == 0 || in ath10k_hw_qca6174_enable_pll_clock()
753 ar->regs->cpu_pll_init_address == 0 || in ath10k_hw_qca6174_enable_pll_clock()
754 ar->regs->cpu_speed_address == 0) in ath10k_hw_qca6174_enable_pll_clock()
755 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
757 clk_div_addr = ar->regs->core_clk_div_address; in ath10k_hw_qca6174_enable_pll_clock()
758 pll_init_addr = ar->regs->cpu_pll_init_address; in ath10k_hw_qca6174_enable_pll_clock()
759 speed_addr = ar->regs->cpu_speed_address; in ath10k_hw_qca6174_enable_pll_clock()
765 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
769 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
771 hw_clk = &hw->hw_clk[MS(reg_val, EFUSE_XTAL_SEL)]; in ath10k_hw_qca6174_enable_pll_clock()
777 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
780 reg_val |= (SM(hw_clk->rnfrac, BB_PLL_CONFIG_FRAC) | in ath10k_hw_qca6174_enable_pll_clock()
781 SM(hw_clk->outdiv, BB_PLL_CONFIG_OUTDIV)); in ath10k_hw_qca6174_enable_pll_clock()
784 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
790 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
793 reg_val |= SM(hw_clk->settle_time, WLAN_PLL_SETTLE_TIME); in ath10k_hw_qca6174_enable_pll_clock()
796 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
802 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
808 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
815 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
821 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
823 reg_val |= (SM(hw_clk->refdiv, WLAN_PLL_CONTROL_REFDIV) | in ath10k_hw_qca6174_enable_pll_clock()
824 SM(hw_clk->div, WLAN_PLL_CONTROL_DIV) | in ath10k_hw_qca6174_enable_pll_clock()
828 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
836 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
841 wait_limit--; in ath10k_hw_qca6174_enable_pll_clock()
847 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
853 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
859 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
867 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
872 wait_limit--; in ath10k_hw_qca6174_enable_pll_clock()
878 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
884 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
890 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
896 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
901 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
908 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
911 ret = ath10k_bmi_write_memory(ar, speed_addr, &hw->target_cpu_freq, in ath10k_hw_qca6174_enable_pll_clock()
912 sizeof(hw->target_cpu_freq)); in ath10k_hw_qca6174_enable_pll_clock()
914 return -EINVAL; in ath10k_hw_qca6174_enable_pll_clock()
922 static void ath10k_hw_map_target_mem(struct ath10k *ar, u32 msb) in ath10k_hw_map_target_mem() argument
926 ath10k_hif_write32(ar, address, msb); in ath10k_hw_map_target_mem()
949 size = REGION_ACCESS_SIZE_LIMIT - addr; in ath10k_hw_diag_segment_msb_download()
950 remain_size = length - size; in ath10k_hw_diag_segment_msb_download()
960 /* Change msb to the next memory region*/ in ath10k_hw_diag_segment_msb_download()
986 /* Change msb to DRAM */ in ath10k_hw_diag_segment_msb_download()
998 /* Needs to change MSB for memory write */ in ath10k_hw_diag_segment_download()
1020 return -EINVAL; in ath10k_hw_diag_fast_download()
1026 if (__le32_to_cpu(hdr->magic_num) != BMI_SGMTFILE_MAGIC_NUM) { in ath10k_hw_diag_fast_download()
1029 hdr->magic_num); in ath10k_hw_diag_fast_download()
1030 return -EINVAL; in ath10k_hw_diag_fast_download()
1033 if (hdr->file_flags != 0) { in ath10k_hw_diag_fast_download()
1036 hdr->file_flags); in ath10k_hw_diag_fast_download()
1037 return -EINVAL; in ath10k_hw_diag_fast_download()
1040 metadata = (struct bmi_segmented_metadata *)hdr->data; in ath10k_hw_diag_fast_download()
1041 left = length - sizeof(*hdr); in ath10k_hw_diag_fast_download()
1047 ret = -EINVAL; in ath10k_hw_diag_fast_download()
1050 base_addr = __le32_to_cpu(metadata->addr); in ath10k_hw_diag_fast_download()
1051 base_len = __le32_to_cpu(metadata->length); in ath10k_hw_diag_fast_download()
1052 buf = metadata->data; in ath10k_hw_diag_fast_download()
1053 left -= sizeof(*metadata); in ath10k_hw_diag_fast_download()
1072 ret = -EINVAL; in ath10k_hw_diag_fast_download()
1080 ret = -EINVAL; in ath10k_hw_diag_fast_download()
1100 left -= base_len; in ath10k_hw_diag_fast_download()
1111 return (resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_DATA_RSSI); in ath10k_htt_tx_rssi_enable()
1116 return (resp->data_tx_completion.flags2 & in ath10k_htt_tx_rssi_enable_wcn3990()
1125 if (resp->data_tx_completion.flags2 & HTT_TX_DATA_APPEND_RETRIES) in ath10k_get_htt_tx_data_rssi_pad()
1129 if (resp->data_tx_completion.flags2 & HTT_TX_DATA_APPEND_TIMESTAMP) in ath10k_get_htt_tx_data_rssi_pad()