Lines Matching +full:tx +full:- +full:freq
1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
41 struct ath10k *ar = hw->priv; in __ath10k_htt_tx_txq_recalc()
43 struct ath10k_vif *arvif = (void *)txq->vif->drv_priv; in __ath10k_htt_tx_txq_recalc()
51 lockdep_assert_held(&ar->htt.tx_lock); in __ath10k_htt_tx_txq_recalc()
53 if (!ar->htt.tx_q_state.enabled) in __ath10k_htt_tx_txq_recalc()
56 if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH_PULL) in __ath10k_htt_tx_txq_recalc()
59 if (txq->sta) { in __ath10k_htt_tx_txq_recalc()
60 arsta = (void *)txq->sta->drv_priv; in __ath10k_htt_tx_txq_recalc()
61 peer_id = arsta->peer_id; in __ath10k_htt_tx_txq_recalc()
63 peer_id = arvif->peer_id; in __ath10k_htt_tx_txq_recalc()
66 tid = txq->tid; in __ath10k_htt_tx_txq_recalc()
73 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || in __ath10k_htt_tx_txq_recalc()
74 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { in __ath10k_htt_tx_txq_recalc()
80 ar->htt.tx_q_state.vaddr->count[tid][peer_id] = count; in __ath10k_htt_tx_txq_recalc()
81 ar->htt.tx_q_state.vaddr->map[tid][idx] &= ~bit; in __ath10k_htt_tx_txq_recalc()
82 ar->htt.tx_q_state.vaddr->map[tid][idx] |= count ? bit : 0; in __ath10k_htt_tx_txq_recalc()
84 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx txq state update peer_id %u tid %u count %u\n", in __ath10k_htt_tx_txq_recalc()
93 lockdep_assert_held(&ar->htt.tx_lock); in __ath10k_htt_tx_txq_sync()
95 if (!ar->htt.tx_q_state.enabled) in __ath10k_htt_tx_txq_sync()
98 if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH_PULL) in __ath10k_htt_tx_txq_sync()
101 seq = le32_to_cpu(ar->htt.tx_q_state.vaddr->seq); in __ath10k_htt_tx_txq_sync()
103 ar->htt.tx_q_state.vaddr->seq = cpu_to_le32(seq); in __ath10k_htt_tx_txq_sync()
105 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx txq state update commit seq %u\n", in __ath10k_htt_tx_txq_sync()
108 size = sizeof(*ar->htt.tx_q_state.vaddr); in __ath10k_htt_tx_txq_sync()
109 dma_sync_single_for_device(ar->dev, in __ath10k_htt_tx_txq_sync()
110 ar->htt.tx_q_state.paddr, in __ath10k_htt_tx_txq_sync()
118 struct ath10k *ar = hw->priv; in ath10k_htt_tx_txq_recalc()
120 spin_lock_bh(&ar->htt.tx_lock); in ath10k_htt_tx_txq_recalc()
122 spin_unlock_bh(&ar->htt.tx_lock); in ath10k_htt_tx_txq_recalc()
127 spin_lock_bh(&ar->htt.tx_lock); in ath10k_htt_tx_txq_sync()
129 spin_unlock_bh(&ar->htt.tx_lock); in ath10k_htt_tx_txq_sync()
135 struct ath10k *ar = hw->priv; in ath10k_htt_tx_txq_update()
137 spin_lock_bh(&ar->htt.tx_lock); in ath10k_htt_tx_txq_update()
140 spin_unlock_bh(&ar->htt.tx_lock); in ath10k_htt_tx_txq_update()
145 lockdep_assert_held(&htt->tx_lock); in ath10k_htt_tx_dec_pending()
147 htt->num_pending_tx--; in ath10k_htt_tx_dec_pending()
148 if (htt->num_pending_tx == htt->max_num_pending_tx - 1) in ath10k_htt_tx_dec_pending()
149 ath10k_mac_tx_unlock(htt->ar, ATH10K_TX_PAUSE_Q_FULL); in ath10k_htt_tx_dec_pending()
151 if (htt->num_pending_tx == 0) in ath10k_htt_tx_dec_pending()
152 wake_up(&htt->empty_tx_wq); in ath10k_htt_tx_dec_pending()
157 lockdep_assert_held(&htt->tx_lock); in ath10k_htt_tx_inc_pending()
159 if (htt->num_pending_tx >= htt->max_num_pending_tx) in ath10k_htt_tx_inc_pending()
160 return -EBUSY; in ath10k_htt_tx_inc_pending()
162 htt->num_pending_tx++; in ath10k_htt_tx_inc_pending()
163 if (htt->num_pending_tx == htt->max_num_pending_tx) in ath10k_htt_tx_inc_pending()
164 ath10k_mac_tx_lock(htt->ar, ATH10K_TX_PAUSE_Q_FULL); in ath10k_htt_tx_inc_pending()
172 struct ath10k *ar = htt->ar; in ath10k_htt_tx_mgmt_inc_pending()
174 lockdep_assert_held(&htt->tx_lock); in ath10k_htt_tx_mgmt_inc_pending()
176 if (!is_mgmt || !ar->hw_params.max_probe_resp_desc_thres) in ath10k_htt_tx_mgmt_inc_pending()
180 ar->hw_params.max_probe_resp_desc_thres < htt->num_pending_mgmt_tx) in ath10k_htt_tx_mgmt_inc_pending()
181 return -EBUSY; in ath10k_htt_tx_mgmt_inc_pending()
183 htt->num_pending_mgmt_tx++; in ath10k_htt_tx_mgmt_inc_pending()
190 lockdep_assert_held(&htt->tx_lock); in ath10k_htt_tx_mgmt_dec_pending()
192 if (!htt->ar->hw_params.max_probe_resp_desc_thres) in ath10k_htt_tx_mgmt_dec_pending()
195 htt->num_pending_mgmt_tx--; in ath10k_htt_tx_mgmt_dec_pending()
200 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_msdu_id()
203 spin_lock_bh(&htt->tx_lock); in ath10k_htt_tx_alloc_msdu_id()
204 ret = idr_alloc(&htt->pending_tx, skb, 0, in ath10k_htt_tx_alloc_msdu_id()
205 htt->max_num_pending_tx, GFP_ATOMIC); in ath10k_htt_tx_alloc_msdu_id()
206 spin_unlock_bh(&htt->tx_lock); in ath10k_htt_tx_alloc_msdu_id()
208 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", ret); in ath10k_htt_tx_alloc_msdu_id()
215 struct ath10k *ar = htt->ar; in ath10k_htt_tx_free_msdu_id()
217 lockdep_assert_held(&htt->tx_lock); in ath10k_htt_tx_free_msdu_id()
219 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx free msdu_id %u\n", msdu_id); in ath10k_htt_tx_free_msdu_id()
221 idr_remove(&htt->pending_tx, msdu_id); in ath10k_htt_tx_free_msdu_id()
226 struct ath10k *ar = htt->ar; in ath10k_htt_tx_free_cont_txbuf_32()
229 if (!htt->txbuf.vaddr_txbuff_32) in ath10k_htt_tx_free_cont_txbuf_32()
232 size = htt->txbuf.size; in ath10k_htt_tx_free_cont_txbuf_32()
233 dma_free_coherent(ar->dev, size, htt->txbuf.vaddr_txbuff_32, in ath10k_htt_tx_free_cont_txbuf_32()
234 htt->txbuf.paddr); in ath10k_htt_tx_free_cont_txbuf_32()
235 htt->txbuf.vaddr_txbuff_32 = NULL; in ath10k_htt_tx_free_cont_txbuf_32()
240 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_cont_txbuf_32()
243 size = htt->max_num_pending_tx * in ath10k_htt_tx_alloc_cont_txbuf_32()
246 htt->txbuf.vaddr_txbuff_32 = dma_alloc_coherent(ar->dev, size, in ath10k_htt_tx_alloc_cont_txbuf_32()
247 &htt->txbuf.paddr, in ath10k_htt_tx_alloc_cont_txbuf_32()
249 if (!htt->txbuf.vaddr_txbuff_32) in ath10k_htt_tx_alloc_cont_txbuf_32()
250 return -ENOMEM; in ath10k_htt_tx_alloc_cont_txbuf_32()
252 htt->txbuf.size = size; in ath10k_htt_tx_alloc_cont_txbuf_32()
259 struct ath10k *ar = htt->ar; in ath10k_htt_tx_free_cont_txbuf_64()
262 if (!htt->txbuf.vaddr_txbuff_64) in ath10k_htt_tx_free_cont_txbuf_64()
265 size = htt->txbuf.size; in ath10k_htt_tx_free_cont_txbuf_64()
266 dma_free_coherent(ar->dev, size, htt->txbuf.vaddr_txbuff_64, in ath10k_htt_tx_free_cont_txbuf_64()
267 htt->txbuf.paddr); in ath10k_htt_tx_free_cont_txbuf_64()
268 htt->txbuf.vaddr_txbuff_64 = NULL; in ath10k_htt_tx_free_cont_txbuf_64()
273 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_cont_txbuf_64()
276 size = htt->max_num_pending_tx * in ath10k_htt_tx_alloc_cont_txbuf_64()
279 htt->txbuf.vaddr_txbuff_64 = dma_alloc_coherent(ar->dev, size, in ath10k_htt_tx_alloc_cont_txbuf_64()
280 &htt->txbuf.paddr, in ath10k_htt_tx_alloc_cont_txbuf_64()
282 if (!htt->txbuf.vaddr_txbuff_64) in ath10k_htt_tx_alloc_cont_txbuf_64()
283 return -ENOMEM; in ath10k_htt_tx_alloc_cont_txbuf_64()
285 htt->txbuf.size = size; in ath10k_htt_tx_alloc_cont_txbuf_64()
294 if (!htt->frag_desc.vaddr_desc_32) in ath10k_htt_tx_free_cont_frag_desc_32()
297 size = htt->max_num_pending_tx * in ath10k_htt_tx_free_cont_frag_desc_32()
300 dma_free_coherent(htt->ar->dev, in ath10k_htt_tx_free_cont_frag_desc_32()
302 htt->frag_desc.vaddr_desc_32, in ath10k_htt_tx_free_cont_frag_desc_32()
303 htt->frag_desc.paddr); in ath10k_htt_tx_free_cont_frag_desc_32()
305 htt->frag_desc.vaddr_desc_32 = NULL; in ath10k_htt_tx_free_cont_frag_desc_32()
310 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_cont_frag_desc_32()
313 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_tx_alloc_cont_frag_desc_32()
316 size = htt->max_num_pending_tx * in ath10k_htt_tx_alloc_cont_frag_desc_32()
318 htt->frag_desc.vaddr_desc_32 = dma_alloc_coherent(ar->dev, size, in ath10k_htt_tx_alloc_cont_frag_desc_32()
319 &htt->frag_desc.paddr, in ath10k_htt_tx_alloc_cont_frag_desc_32()
321 if (!htt->frag_desc.vaddr_desc_32) { in ath10k_htt_tx_alloc_cont_frag_desc_32()
323 return -ENOMEM; in ath10k_htt_tx_alloc_cont_frag_desc_32()
325 htt->frag_desc.size = size; in ath10k_htt_tx_alloc_cont_frag_desc_32()
334 if (!htt->frag_desc.vaddr_desc_64) in ath10k_htt_tx_free_cont_frag_desc_64()
337 size = htt->max_num_pending_tx * in ath10k_htt_tx_free_cont_frag_desc_64()
340 dma_free_coherent(htt->ar->dev, in ath10k_htt_tx_free_cont_frag_desc_64()
342 htt->frag_desc.vaddr_desc_64, in ath10k_htt_tx_free_cont_frag_desc_64()
343 htt->frag_desc.paddr); in ath10k_htt_tx_free_cont_frag_desc_64()
345 htt->frag_desc.vaddr_desc_64 = NULL; in ath10k_htt_tx_free_cont_frag_desc_64()
350 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_cont_frag_desc_64()
353 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_tx_alloc_cont_frag_desc_64()
356 size = htt->max_num_pending_tx * in ath10k_htt_tx_alloc_cont_frag_desc_64()
359 htt->frag_desc.vaddr_desc_64 = dma_alloc_coherent(ar->dev, size, in ath10k_htt_tx_alloc_cont_frag_desc_64()
360 &htt->frag_desc.paddr, in ath10k_htt_tx_alloc_cont_frag_desc_64()
362 if (!htt->frag_desc.vaddr_desc_64) { in ath10k_htt_tx_alloc_cont_frag_desc_64()
364 return -ENOMEM; in ath10k_htt_tx_alloc_cont_frag_desc_64()
366 htt->frag_desc.size = size; in ath10k_htt_tx_alloc_cont_frag_desc_64()
373 struct ath10k *ar = htt->ar; in ath10k_htt_tx_free_txq()
377 ar->running_fw->fw_file.fw_features)) in ath10k_htt_tx_free_txq()
380 size = sizeof(*htt->tx_q_state.vaddr); in ath10k_htt_tx_free_txq()
382 dma_unmap_single(ar->dev, htt->tx_q_state.paddr, size, DMA_TO_DEVICE); in ath10k_htt_tx_free_txq()
383 kfree(htt->tx_q_state.vaddr); in ath10k_htt_tx_free_txq()
388 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_txq()
393 ar->running_fw->fw_file.fw_features)) in ath10k_htt_tx_alloc_txq()
396 htt->tx_q_state.num_peers = HTT_TX_Q_STATE_NUM_PEERS; in ath10k_htt_tx_alloc_txq()
397 htt->tx_q_state.num_tids = HTT_TX_Q_STATE_NUM_TIDS; in ath10k_htt_tx_alloc_txq()
398 htt->tx_q_state.type = HTT_Q_DEPTH_TYPE_BYTES; in ath10k_htt_tx_alloc_txq()
400 size = sizeof(*htt->tx_q_state.vaddr); in ath10k_htt_tx_alloc_txq()
401 htt->tx_q_state.vaddr = kzalloc(size, GFP_KERNEL); in ath10k_htt_tx_alloc_txq()
402 if (!htt->tx_q_state.vaddr) in ath10k_htt_tx_alloc_txq()
403 return -ENOMEM; in ath10k_htt_tx_alloc_txq()
405 htt->tx_q_state.paddr = dma_map_single(ar->dev, htt->tx_q_state.vaddr, in ath10k_htt_tx_alloc_txq()
407 ret = dma_mapping_error(ar->dev, htt->tx_q_state.paddr); in ath10k_htt_tx_alloc_txq()
410 kfree(htt->tx_q_state.vaddr); in ath10k_htt_tx_alloc_txq()
411 return -EIO; in ath10k_htt_tx_alloc_txq()
419 WARN_ON(!kfifo_is_empty(&htt->txdone_fifo)); in ath10k_htt_tx_free_txdone_fifo()
420 kfifo_free(&htt->txdone_fifo); in ath10k_htt_tx_free_txdone_fifo()
428 size = roundup_pow_of_two(htt->max_num_pending_tx); in ath10k_htt_tx_alloc_txdone_fifo()
429 ret = kfifo_alloc(&htt->txdone_fifo, size, GFP_KERNEL); in ath10k_htt_tx_alloc_txdone_fifo()
435 struct ath10k *ar = htt->ar; in ath10k_htt_tx_alloc_buf()
440 ath10k_err(ar, "failed to alloc cont tx buffer: %d\n", ret); in ath10k_htt_tx_alloc_buf()
478 struct ath10k *ar = htt->ar; in ath10k_htt_tx_start()
481 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n", in ath10k_htt_tx_start()
482 htt->max_num_pending_tx); in ath10k_htt_tx_start()
484 spin_lock_init(&htt->tx_lock); in ath10k_htt_tx_start()
485 idr_init(&htt->pending_tx); in ath10k_htt_tx_start()
487 if (htt->tx_mem_allocated) in ath10k_htt_tx_start()
490 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) in ath10k_htt_tx_start()
497 htt->tx_mem_allocated = true; in ath10k_htt_tx_start()
502 idr_destroy(&htt->pending_tx); in ath10k_htt_tx_start()
510 struct ath10k_htt *htt = &ar->htt; in ath10k_htt_tx_clean_up_pending()
525 if (!htt->tx_mem_allocated) in ath10k_htt_tx_destroy()
532 htt->tx_mem_allocated = false; in ath10k_htt_tx_destroy()
537 ath10k_htc_stop_hl(htt->ar); in ath10k_htt_flush_tx_queue()
538 idr_for_each(&htt->pending_tx, ath10k_htt_tx_clean_up_pending, htt->ar); in ath10k_htt_flush_tx_queue()
544 idr_destroy(&htt->pending_tx); in ath10k_htt_tx_stop()
555 queue_work(ar->workqueue, &ar->bundle_tx_work); in ath10k_htt_op_ep_tx_credits()
560 struct ath10k_htt *htt = &ar->htt; in ath10k_htt_htc_tx_complete()
567 if (htt->disable_tx_comp) { in ath10k_htt_htc_tx_complete()
568 htt_hdr = (struct htt_cmd_hdr *)skb->data; in ath10k_htt_htc_tx_complete()
569 msg_type = htt_hdr->msg_type; in ath10k_htt_htc_tx_complete()
573 (skb->data + sizeof(*htt_hdr)); in ath10k_htt_htc_tx_complete()
574 flags1 = __le16_to_cpu(desc_hdr->flags1); in ath10k_htt_htc_tx_complete()
582 if ((!htt->disable_tx_comp) || (msg_type != HTT_H2T_MSG_TYPE_TX_FRM)) in ath10k_htt_htc_tx_complete()
586 "htt tx complete msdu id:%u ,flags1:%x\n", in ath10k_htt_htc_tx_complete()
587 __le16_to_cpu(desc_hdr->id), flags1); in ath10k_htt_htc_tx_complete()
593 tx_done.msdu_id = __le16_to_cpu(desc_hdr->id); in ath10k_htt_htc_tx_complete()
594 ath10k_txrx_tx_unref(&ar->htt, &tx_done); in ath10k_htt_htc_tx_complete()
605 struct ath10k *ar = htt->ar; in ath10k_htt_h2t_ver_req_msg()
611 len += sizeof(cmd->hdr); in ath10k_htt_h2t_ver_req_msg()
612 len += sizeof(cmd->ver_req); in ath10k_htt_h2t_ver_req_msg()
616 return -ENOMEM; in ath10k_htt_h2t_ver_req_msg()
619 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_h2t_ver_req_msg()
620 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ; in ath10k_htt_h2t_ver_req_msg()
622 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_h2t_ver_req_msg()
634 struct ath10k *ar = htt->ar; in ath10k_htt_h2t_stats_req()
640 len += sizeof(cmd->hdr); in ath10k_htt_h2t_stats_req()
641 len += sizeof(cmd->stats_req); in ath10k_htt_h2t_stats_req()
645 return -ENOMEM; in ath10k_htt_h2t_stats_req()
648 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_h2t_stats_req()
649 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_STATS_REQ; in ath10k_htt_h2t_stats_req()
651 req = &cmd->stats_req; in ath10k_htt_h2t_stats_req()
658 memcpy(req->upload_types, &mask, 3); in ath10k_htt_h2t_stats_req()
659 memcpy(req->reset_types, &reset_mask, 3); in ath10k_htt_h2t_stats_req()
660 req->stat_type = HTT_STATS_REQ_CFG_STAT_TYPE_INVALID; in ath10k_htt_h2t_stats_req()
661 req->cookie_lsb = cpu_to_le32(cookie & 0xffffffff); in ath10k_htt_h2t_stats_req()
662 req->cookie_msb = cpu_to_le32((cookie & 0xffffffff00000000ULL) >> 32); in ath10k_htt_h2t_stats_req()
664 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_h2t_stats_req()
677 struct ath10k *ar = htt->ar; in ath10k_htt_send_frag_desc_bank_cfg_32()
684 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_send_frag_desc_bank_cfg_32()
687 if (!htt->frag_desc.paddr) { in ath10k_htt_send_frag_desc_bank_cfg_32()
689 return -EINVAL; in ath10k_htt_send_frag_desc_bank_cfg_32()
692 size = sizeof(cmd->hdr) + sizeof(cmd->frag_desc_bank_cfg32); in ath10k_htt_send_frag_desc_bank_cfg_32()
695 return -ENOMEM; in ath10k_htt_send_frag_desc_bank_cfg_32()
698 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_send_frag_desc_bank_cfg_32()
699 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG; in ath10k_htt_send_frag_desc_bank_cfg_32()
702 info |= SM(htt->tx_q_state.type, in ath10k_htt_send_frag_desc_bank_cfg_32()
706 ar->running_fw->fw_file.fw_features)) in ath10k_htt_send_frag_desc_bank_cfg_32()
709 cfg = &cmd->frag_desc_bank_cfg32; in ath10k_htt_send_frag_desc_bank_cfg_32()
710 cfg->info = info; in ath10k_htt_send_frag_desc_bank_cfg_32()
711 cfg->num_banks = 1; in ath10k_htt_send_frag_desc_bank_cfg_32()
712 cfg->desc_size = sizeof(struct htt_msdu_ext_desc); in ath10k_htt_send_frag_desc_bank_cfg_32()
713 cfg->bank_base_addrs[0] = __cpu_to_le32(htt->frag_desc.paddr); in ath10k_htt_send_frag_desc_bank_cfg_32()
714 cfg->bank_id[0].bank_min_id = 0; in ath10k_htt_send_frag_desc_bank_cfg_32()
715 cfg->bank_id[0].bank_max_id = __cpu_to_le16(htt->max_num_pending_tx - in ath10k_htt_send_frag_desc_bank_cfg_32()
718 cfg->q_state.paddr = cpu_to_le32(htt->tx_q_state.paddr); in ath10k_htt_send_frag_desc_bank_cfg_32()
719 cfg->q_state.num_peers = cpu_to_le16(htt->tx_q_state.num_peers); in ath10k_htt_send_frag_desc_bank_cfg_32()
720 cfg->q_state.num_tids = cpu_to_le16(htt->tx_q_state.num_tids); in ath10k_htt_send_frag_desc_bank_cfg_32()
721 cfg->q_state.record_size = HTT_TX_Q_STATE_ENTRY_SIZE; in ath10k_htt_send_frag_desc_bank_cfg_32()
722 cfg->q_state.record_multiplier = HTT_TX_Q_STATE_ENTRY_MULTIPLIER; in ath10k_htt_send_frag_desc_bank_cfg_32()
726 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_send_frag_desc_bank_cfg_32()
739 struct ath10k *ar = htt->ar; in ath10k_htt_send_frag_desc_bank_cfg_64()
746 if (!ar->hw_params.continuous_frag_desc) in ath10k_htt_send_frag_desc_bank_cfg_64()
749 if (!htt->frag_desc.paddr) { in ath10k_htt_send_frag_desc_bank_cfg_64()
751 return -EINVAL; in ath10k_htt_send_frag_desc_bank_cfg_64()
754 size = sizeof(cmd->hdr) + sizeof(cmd->frag_desc_bank_cfg64); in ath10k_htt_send_frag_desc_bank_cfg_64()
757 return -ENOMEM; in ath10k_htt_send_frag_desc_bank_cfg_64()
760 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_send_frag_desc_bank_cfg_64()
761 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG; in ath10k_htt_send_frag_desc_bank_cfg_64()
764 info |= SM(htt->tx_q_state.type, in ath10k_htt_send_frag_desc_bank_cfg_64()
768 ar->running_fw->fw_file.fw_features)) in ath10k_htt_send_frag_desc_bank_cfg_64()
771 cfg = &cmd->frag_desc_bank_cfg64; in ath10k_htt_send_frag_desc_bank_cfg_64()
772 cfg->info = info; in ath10k_htt_send_frag_desc_bank_cfg_64()
773 cfg->num_banks = 1; in ath10k_htt_send_frag_desc_bank_cfg_64()
774 cfg->desc_size = sizeof(struct htt_msdu_ext_desc_64); in ath10k_htt_send_frag_desc_bank_cfg_64()
775 cfg->bank_base_addrs[0] = __cpu_to_le64(htt->frag_desc.paddr); in ath10k_htt_send_frag_desc_bank_cfg_64()
776 cfg->bank_id[0].bank_min_id = 0; in ath10k_htt_send_frag_desc_bank_cfg_64()
777 cfg->bank_id[0].bank_max_id = __cpu_to_le16(htt->max_num_pending_tx - in ath10k_htt_send_frag_desc_bank_cfg_64()
780 cfg->q_state.paddr = cpu_to_le32(htt->tx_q_state.paddr); in ath10k_htt_send_frag_desc_bank_cfg_64()
781 cfg->q_state.num_peers = cpu_to_le16(htt->tx_q_state.num_peers); in ath10k_htt_send_frag_desc_bank_cfg_64()
782 cfg->q_state.num_tids = cpu_to_le16(htt->tx_q_state.num_tids); in ath10k_htt_send_frag_desc_bank_cfg_64()
783 cfg->q_state.record_size = HTT_TX_Q_STATE_ENTRY_SIZE; in ath10k_htt_send_frag_desc_bank_cfg_64()
784 cfg->q_state.record_multiplier = HTT_TX_Q_STATE_ENTRY_MULTIPLIER; in ath10k_htt_send_frag_desc_bank_cfg_64()
788 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_send_frag_desc_bank_cfg_64()
802 ath10k_htt_rx_desc_get_offsets(hw, &rx_ring->offsets); in ath10k_htt_fill_rx_desc_offset_32()
808 ath10k_htt_rx_desc_get_offsets(hw, &rx_ring->offsets); in ath10k_htt_fill_rx_desc_offset_64()
813 struct ath10k *ar = htt->ar; in ath10k_htt_send_rx_ring_cfg_32()
814 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_send_rx_ring_cfg_32()
825 * the HW expects the buffer to be an integral number of 4-byte in ath10k_htt_send_rx_ring_cfg_32()
831 len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup_32.hdr) in ath10k_htt_send_rx_ring_cfg_32()
835 return -ENOMEM; in ath10k_htt_send_rx_ring_cfg_32()
839 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_send_rx_ring_cfg_32()
840 ring = &cmd->rx_setup_32.rings[0]; in ath10k_htt_send_rx_ring_cfg_32()
842 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG; in ath10k_htt_send_rx_ring_cfg_32()
843 cmd->rx_setup_32.hdr.num_rings = 1; in ath10k_htt_send_rx_ring_cfg_32()
864 fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); in ath10k_htt_send_rx_ring_cfg_32()
866 ring->fw_idx_shadow_reg_paddr = in ath10k_htt_send_rx_ring_cfg_32()
867 __cpu_to_le32(htt->rx_ring.alloc_idx.paddr); in ath10k_htt_send_rx_ring_cfg_32()
868 ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr); in ath10k_htt_send_rx_ring_cfg_32()
869 ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size); in ath10k_htt_send_rx_ring_cfg_32()
870 ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE); in ath10k_htt_send_rx_ring_cfg_32()
871 ring->flags = __cpu_to_le16(flags); in ath10k_htt_send_rx_ring_cfg_32()
872 ring->fw_idx_init_val = __cpu_to_le16(fw_idx); in ath10k_htt_send_rx_ring_cfg_32()
875 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_send_rx_ring_cfg_32()
886 struct ath10k *ar = htt->ar; in ath10k_htt_send_rx_ring_cfg_64()
887 struct ath10k_hw_params *hw = &ar->hw_params; in ath10k_htt_send_rx_ring_cfg_64()
897 /* HW expects the buffer to be an integral number of 4-byte in ath10k_htt_send_rx_ring_cfg_64()
903 len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup_64.hdr) in ath10k_htt_send_rx_ring_cfg_64()
907 return -ENOMEM; in ath10k_htt_send_rx_ring_cfg_64()
911 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_send_rx_ring_cfg_64()
912 ring = &cmd->rx_setup_64.rings[0]; in ath10k_htt_send_rx_ring_cfg_64()
914 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG; in ath10k_htt_send_rx_ring_cfg_64()
915 cmd->rx_setup_64.hdr.num_rings = 1; in ath10k_htt_send_rx_ring_cfg_64()
935 fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); in ath10k_htt_send_rx_ring_cfg_64()
937 ring->fw_idx_shadow_reg_paddr = __cpu_to_le64(htt->rx_ring.alloc_idx.paddr); in ath10k_htt_send_rx_ring_cfg_64()
938 ring->rx_ring_base_paddr = __cpu_to_le64(htt->rx_ring.base_paddr); in ath10k_htt_send_rx_ring_cfg_64()
939 ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size); in ath10k_htt_send_rx_ring_cfg_64()
940 ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE); in ath10k_htt_send_rx_ring_cfg_64()
941 ring->flags = __cpu_to_le16(flags); in ath10k_htt_send_rx_ring_cfg_64()
942 ring->fw_idx_init_val = __cpu_to_le16(fw_idx); in ath10k_htt_send_rx_ring_cfg_64()
945 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_send_rx_ring_cfg_64()
956 struct ath10k *ar = htt->ar; in ath10k_htt_send_rx_ring_cfg_hl()
966 * the HW expects the buffer to be an integral number of 4-byte in ath10k_htt_send_rx_ring_cfg_hl()
972 len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup_32.hdr) in ath10k_htt_send_rx_ring_cfg_hl()
976 return -ENOMEM; in ath10k_htt_send_rx_ring_cfg_hl()
980 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_send_rx_ring_cfg_hl()
981 ring = &cmd->rx_setup_32.rings[0]; in ath10k_htt_send_rx_ring_cfg_hl()
983 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG; in ath10k_htt_send_rx_ring_cfg_hl()
984 cmd->rx_setup_32.hdr.num_rings = 1; in ath10k_htt_send_rx_ring_cfg_hl()
992 ring->rx_ring_len = __cpu_to_le16(HTT_RX_RING_SIZE_MIN); in ath10k_htt_send_rx_ring_cfg_hl()
993 ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE); in ath10k_htt_send_rx_ring_cfg_hl()
994 ring->flags = __cpu_to_le16(flags); in ath10k_htt_send_rx_ring_cfg_hl()
996 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_send_rx_ring_cfg_hl()
1009 struct ath10k *ar = htt->ar; in ath10k_htt_h2t_aggr_cfg_msg_32()
1019 return -EINVAL; in ath10k_htt_h2t_aggr_cfg_msg_32()
1022 return -EINVAL; in ath10k_htt_h2t_aggr_cfg_msg_32()
1024 len = sizeof(cmd->hdr); in ath10k_htt_h2t_aggr_cfg_msg_32()
1025 len += sizeof(cmd->aggr_conf); in ath10k_htt_h2t_aggr_cfg_msg_32()
1029 return -ENOMEM; in ath10k_htt_h2t_aggr_cfg_msg_32()
1032 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_h2t_aggr_cfg_msg_32()
1033 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_AGGR_CFG; in ath10k_htt_h2t_aggr_cfg_msg_32()
1035 aggr_conf = &cmd->aggr_conf; in ath10k_htt_h2t_aggr_cfg_msg_32()
1036 aggr_conf->max_num_ampdu_subframes = max_subfrms_ampdu; in ath10k_htt_h2t_aggr_cfg_msg_32()
1037 aggr_conf->max_num_amsdu_subframes = max_subfrms_amsdu; in ath10k_htt_h2t_aggr_cfg_msg_32()
1040 aggr_conf->max_num_amsdu_subframes, in ath10k_htt_h2t_aggr_cfg_msg_32()
1041 aggr_conf->max_num_ampdu_subframes); in ath10k_htt_h2t_aggr_cfg_msg_32()
1043 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_h2t_aggr_cfg_msg_32()
1056 struct ath10k *ar = htt->ar; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1066 return -EINVAL; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1069 return -EINVAL; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1071 len = sizeof(cmd->hdr); in ath10k_htt_h2t_aggr_cfg_msg_v2()
1072 len += sizeof(cmd->aggr_conf_v2); in ath10k_htt_h2t_aggr_cfg_msg_v2()
1076 return -ENOMEM; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1079 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1080 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_AGGR_CFG; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1082 aggr_conf = &cmd->aggr_conf_v2; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1083 aggr_conf->max_num_ampdu_subframes = max_subfrms_ampdu; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1084 aggr_conf->max_num_amsdu_subframes = max_subfrms_amsdu; in ath10k_htt_h2t_aggr_cfg_msg_v2()
1087 aggr_conf->max_num_amsdu_subframes, in ath10k_htt_h2t_aggr_cfg_msg_v2()
1088 aggr_conf->max_num_ampdu_subframes); in ath10k_htt_h2t_aggr_cfg_msg_v2()
1090 ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); in ath10k_htt_h2t_aggr_cfg_msg_v2()
1111 /* Response IDs are echo-ed back only for host driver convenience in ath10k_htt_tx_fetch_resp()
1115 len += sizeof(cmd->hdr); in ath10k_htt_tx_fetch_resp()
1116 len += sizeof(cmd->tx_fetch_resp); in ath10k_htt_tx_fetch_resp()
1117 len += sizeof(cmd->tx_fetch_resp.records[0]) * num_records; in ath10k_htt_tx_fetch_resp()
1121 return -ENOMEM; in ath10k_htt_tx_fetch_resp()
1124 cmd = (struct htt_cmd *)skb->data; in ath10k_htt_tx_fetch_resp()
1125 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FETCH_RESP; in ath10k_htt_tx_fetch_resp()
1126 cmd->tx_fetch_resp.resp_id = cpu_to_le16(resp_id); in ath10k_htt_tx_fetch_resp()
1127 cmd->tx_fetch_resp.fetch_seq_num = fetch_seq_num; in ath10k_htt_tx_fetch_resp()
1128 cmd->tx_fetch_resp.num_records = cpu_to_le16(num_records); in ath10k_htt_tx_fetch_resp()
1129 cmd->tx_fetch_resp.token = token; in ath10k_htt_tx_fetch_resp()
1131 memcpy(cmd->tx_fetch_resp.records, records, in ath10k_htt_tx_fetch_resp()
1134 ret = ath10k_htc_send(&ar->htc, ar->htt.eid, skb); in ath10k_htt_tx_fetch_resp()
1154 if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN) { in ath10k_htt_tx_get_vdev_id()
1155 return ar->scan.vdev_id; in ath10k_htt_tx_get_vdev_id()
1156 } else if (cb->vif) { in ath10k_htt_tx_get_vdev_id()
1157 arvif = (void *)cb->vif->drv_priv; in ath10k_htt_tx_get_vdev_id()
1158 return arvif->vdev_id; in ath10k_htt_tx_get_vdev_id()
1159 } else if (ar->monitor_started) { in ath10k_htt_tx_get_vdev_id()
1160 return ar->monitor_vdev_id; in ath10k_htt_tx_get_vdev_id()
1168 struct ieee80211_hdr *hdr = (void *)skb->data; in ath10k_htt_tx_get_tid()
1171 if (!is_eth && ieee80211_is_mgmt(hdr->frame_control)) in ath10k_htt_tx_get_tid()
1173 else if (cb->flags & ATH10K_SKB_F_QOS) in ath10k_htt_tx_get_tid()
1174 return skb->priority & IEEE80211_QOS_CTL_TID_MASK; in ath10k_htt_tx_get_tid()
1181 struct ath10k *ar = htt->ar; in ath10k_htt_mgmt_tx()
1182 struct device *dev = ar->dev; in ath10k_htt_mgmt_tx()
1188 int msdu_id = -1; in ath10k_htt_mgmt_tx()
1191 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data; in ath10k_htt_mgmt_tx()
1193 len += sizeof(cmd->hdr); in ath10k_htt_mgmt_tx()
1194 len += sizeof(cmd->mgmt_tx); in ath10k_htt_mgmt_tx()
1202 if ((ieee80211_is_action(hdr->frame_control) || in ath10k_htt_mgmt_tx()
1203 ieee80211_is_deauth(hdr->frame_control) || in ath10k_htt_mgmt_tx()
1204 ieee80211_is_disassoc(hdr->frame_control)) && in ath10k_htt_mgmt_tx()
1205 ieee80211_has_protected(hdr->frame_control)) { in ath10k_htt_mgmt_tx()
1206 peer_addr = hdr->addr1; in ath10k_htt_mgmt_tx()
1210 if (skb_cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP || in ath10k_htt_mgmt_tx()
1211 skb_cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) in ath10k_htt_mgmt_tx()
1220 res = -ENOMEM; in ath10k_htt_mgmt_tx()
1224 skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len, in ath10k_htt_mgmt_tx()
1226 res = dma_mapping_error(dev, skb_cb->paddr); in ath10k_htt_mgmt_tx()
1228 res = -EIO; in ath10k_htt_mgmt_tx()
1233 cmd = (struct htt_cmd *)txdesc->data; in ath10k_htt_mgmt_tx()
1236 cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_MGMT_TX; in ath10k_htt_mgmt_tx()
1237 cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr); in ath10k_htt_mgmt_tx()
1238 cmd->mgmt_tx.len = __cpu_to_le32(msdu->len); in ath10k_htt_mgmt_tx()
1239 cmd->mgmt_tx.desc_id = __cpu_to_le32(msdu_id); in ath10k_htt_mgmt_tx()
1240 cmd->mgmt_tx.vdev_id = __cpu_to_le32(vdev_id); in ath10k_htt_mgmt_tx()
1241 memcpy(cmd->mgmt_tx.hdr, msdu->data, in ath10k_htt_mgmt_tx()
1242 min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN)); in ath10k_htt_mgmt_tx()
1244 res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc); in ath10k_htt_mgmt_tx()
1251 if (ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) in ath10k_htt_mgmt_tx()
1252 dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); in ath10k_htt_mgmt_tx()
1256 spin_lock_bh(&htt->tx_lock); in ath10k_htt_mgmt_tx()
1258 spin_unlock_bh(&htt->tx_lock); in ath10k_htt_mgmt_tx()
1271 struct ath10k *ar = htt->ar; in ath10k_htt_tx_hl()
1285 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data; in ath10k_htt_tx_hl()
1287 if ((ieee80211_is_action(hdr->frame_control) || in ath10k_htt_tx_hl()
1288 ieee80211_is_deauth(hdr->frame_control) || in ath10k_htt_tx_hl()
1289 ieee80211_is_disassoc(hdr->frame_control)) && in ath10k_htt_tx_hl()
1290 ieee80211_has_protected(hdr->frame_control)) { in ath10k_htt_tx_hl()
1295 data_len = msdu->len; in ath10k_htt_tx_hl()
1310 if (htt->disable_tx_comp) in ath10k_htt_tx_hl()
1315 if (skb_cb->flags & ATH10K_SKB_F_NO_HWCRYPT) in ath10k_htt_tx_hl()
1320 if (msdu->ip_summed == CHECKSUM_PARTIAL && in ath10k_htt_tx_hl()
1321 !test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { in ath10k_htt_tx_hl()
1326 /* Prepend the HTT header and TX desc struct to the data message in ath10k_htt_tx_hl()
1332 ath10k_dbg(htt->ar, ATH10K_DBG_HTT, in ath10k_htt_tx_hl()
1338 ath10k_warn(htt->ar, "htt hl tx: Unable to realloc skb!\n"); in ath10k_htt_tx_hl()
1339 res = -ENOMEM; in ath10k_htt_tx_hl()
1344 if (ar->bus_param.hl_msdu_ids) { in ath10k_htt_tx_hl()
1356 * reference by one to avoid a use-after-free case and a double in ath10k_htt_tx_hl()
1363 cmd_hdr = (struct htt_cmd_hdr *)msdu->data; in ath10k_htt_tx_hl()
1364 tx_desc = (struct htt_data_tx_desc *)(msdu->data + sizeof(*cmd_hdr)); in ath10k_htt_tx_hl()
1366 cmd_hdr->msg_type = HTT_H2T_MSG_TYPE_TX_FRM; in ath10k_htt_tx_hl()
1367 tx_desc->flags0 = flags0; in ath10k_htt_tx_hl()
1368 tx_desc->flags1 = __cpu_to_le16(flags1); in ath10k_htt_tx_hl()
1369 tx_desc->len = __cpu_to_le16(data_len); in ath10k_htt_tx_hl()
1370 tx_desc->id = __cpu_to_le16(msdu_id); in ath10k_htt_tx_hl()
1371 tx_desc->frags_paddr = 0; /* always zero */ in ath10k_htt_tx_hl()
1375 tx_desc->peerid = __cpu_to_le32(HTT_INVALID_PEERID); in ath10k_htt_tx_hl()
1377 res = ath10k_htc_send_hl(&htt->ar->htc, htt->eid, msdu); in ath10k_htt_tx_hl()
1387 struct ath10k *ar = htt->ar; in ath10k_htt_tx_32()
1388 struct device *dev = ar->dev; in ath10k_htt_tx_32()
1401 u16 freq = 0; in ath10k_htt_tx_32() local
1413 prefetch_len = min(htt->prefetch_len, msdu->len); in ath10k_htt_tx_32()
1416 txbuf = htt->txbuf.vaddr_txbuff_32 + msdu_id; in ath10k_htt_tx_32()
1417 txbuf_paddr = htt->txbuf.paddr + in ath10k_htt_tx_32()
1421 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data; in ath10k_htt_tx_32()
1423 if ((ieee80211_is_action(hdr->frame_control) || in ath10k_htt_tx_32()
1424 ieee80211_is_deauth(hdr->frame_control) || in ath10k_htt_tx_32()
1425 ieee80211_is_disassoc(hdr->frame_control)) && in ath10k_htt_tx_32()
1426 ieee80211_has_protected(hdr->frame_control)) { in ath10k_htt_tx_32()
1428 } else if (!(skb_cb->flags & ATH10K_SKB_F_NO_HWCRYPT) && in ath10k_htt_tx_32()
1430 ieee80211_has_protected(hdr->frame_control)) { in ath10k_htt_tx_32()
1435 skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len, in ath10k_htt_tx_32()
1437 res = dma_mapping_error(dev, skb_cb->paddr); in ath10k_htt_tx_32()
1439 res = -EIO; in ath10k_htt_tx_32()
1443 if (unlikely(info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) in ath10k_htt_tx_32()
1444 freq = ar->scan.roc_freq; in ath10k_htt_tx_32()
1452 if (ar->hw_params.continuous_frag_desc) { in ath10k_htt_tx_32()
1453 ext_desc_t = htt->frag_desc.vaddr_desc_32; in ath10k_htt_tx_32()
1460 __cpu_to_le32(skb_cb->paddr); in ath10k_htt_tx_32()
1462 frags[0].tword_addr.len_16 = __cpu_to_le16(msdu->len); in ath10k_htt_tx_32()
1464 frags_paddr = htt->frag_desc.paddr + in ath10k_htt_tx_32()
1467 frags = txbuf->frags; in ath10k_htt_tx_32()
1469 __cpu_to_le32(skb_cb->paddr); in ath10k_htt_tx_32()
1470 frags[0].dword_addr.len = __cpu_to_le32(msdu->len); in ath10k_htt_tx_32()
1483 frags_paddr = skb_cb->paddr; in ath10k_htt_tx_32()
1487 /* Normally all commands go through HTC which manages tx credits for in ath10k_htt_tx_32()
1488 * each endpoint and notifies when tx is completed. in ath10k_htt_tx_32()
1495 * received. That's why HTC tx completion handler itself is ignored by in ath10k_htt_tx_32()
1498 * There is simply no point in pushing HTT TX_FRM through HTC tx path in ath10k_htt_tx_32()
1504 txbuf->htc_hdr.eid = htt->eid; in ath10k_htt_tx_32()
1505 txbuf->htc_hdr.len = __cpu_to_le16(sizeof(txbuf->cmd_hdr) + in ath10k_htt_tx_32()
1506 sizeof(txbuf->cmd_tx) + in ath10k_htt_tx_32()
1508 txbuf->htc_hdr.flags = 0; in ath10k_htt_tx_32()
1510 if (skb_cb->flags & ATH10K_SKB_F_NO_HWCRYPT) in ath10k_htt_tx_32()
1515 if (msdu->ip_summed == CHECKSUM_PARTIAL && in ath10k_htt_tx_32()
1516 !test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { in ath10k_htt_tx_32()
1519 if (ar->hw_params.continuous_frag_desc) in ath10k_htt_tx_32()
1520 ext_desc->flags |= HTT_MSDU_CHECKSUM_ENABLE; in ath10k_htt_tx_32()
1523 /* Prevent firmware from sending up tx inspection requests. There's in ath10k_htt_tx_32()
1525 * it to simply rely a regular tx completion with discard status. in ath10k_htt_tx_32()
1529 txbuf->cmd_hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM; in ath10k_htt_tx_32()
1530 txbuf->cmd_tx.flags0 = flags0; in ath10k_htt_tx_32()
1531 txbuf->cmd_tx.flags1 = __cpu_to_le16(flags1); in ath10k_htt_tx_32()
1532 txbuf->cmd_tx.len = __cpu_to_le16(msdu->len); in ath10k_htt_tx_32()
1533 txbuf->cmd_tx.id = __cpu_to_le16(msdu_id); in ath10k_htt_tx_32()
1534 txbuf->cmd_tx.frags_paddr = __cpu_to_le32(frags_paddr); in ath10k_htt_tx_32()
1536 txbuf->cmd_tx.offchan_tx.peerid = in ath10k_htt_tx_32()
1538 txbuf->cmd_tx.offchan_tx.freq = in ath10k_htt_tx_32()
1539 __cpu_to_le16(freq); in ath10k_htt_tx_32()
1541 txbuf->cmd_tx.peerid = in ath10k_htt_tx_32()
1545 trace_ath10k_htt_tx(ar, msdu_id, msdu->len, vdev_id, tid); in ath10k_htt_tx_32()
1547 …"htt tx flags0 %u flags1 %u len %d id %u frags_paddr %pad, msdu_paddr %pad vdev %u tid %u freq %u\… in ath10k_htt_tx_32()
1548 flags0, flags1, msdu->len, msdu_id, &frags_paddr, in ath10k_htt_tx_32()
1549 &skb_cb->paddr, vdev_id, tid, freq); in ath10k_htt_tx_32()
1550 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt tx msdu: ", in ath10k_htt_tx_32()
1551 msdu->data, msdu->len); in ath10k_htt_tx_32()
1552 trace_ath10k_tx_hdr(ar, msdu->data, msdu->len); in ath10k_htt_tx_32()
1553 trace_ath10k_tx_payload(ar, msdu->data, msdu->len); in ath10k_htt_tx_32()
1557 sg_items[0].vaddr = &txbuf->htc_hdr; in ath10k_htt_tx_32()
1559 sizeof(txbuf->frags); in ath10k_htt_tx_32()
1560 sg_items[0].len = sizeof(txbuf->htc_hdr) + in ath10k_htt_tx_32()
1561 sizeof(txbuf->cmd_hdr) + in ath10k_htt_tx_32()
1562 sizeof(txbuf->cmd_tx); in ath10k_htt_tx_32()
1566 sg_items[1].vaddr = msdu->data; in ath10k_htt_tx_32()
1567 sg_items[1].paddr = skb_cb->paddr; in ath10k_htt_tx_32()
1570 res = ath10k_hif_tx_sg(htt->ar, in ath10k_htt_tx_32()
1571 htt->ar->htc.endpoint[htt->eid].ul_pipe_id, in ath10k_htt_tx_32()
1579 dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); in ath10k_htt_tx_32()
1581 spin_lock_bh(&htt->tx_lock); in ath10k_htt_tx_32()
1583 spin_unlock_bh(&htt->tx_lock); in ath10k_htt_tx_32()
1592 struct ath10k *ar = htt->ar; in ath10k_htt_tx_64()
1593 struct device *dev = ar->dev; in ath10k_htt_tx_64()
1606 u16 freq = 0; in ath10k_htt_tx_64() local
1618 prefetch_len = min(htt->prefetch_len, msdu->len); in ath10k_htt_tx_64()
1621 txbuf = htt->txbuf.vaddr_txbuff_64 + msdu_id; in ath10k_htt_tx_64()
1622 txbuf_paddr = htt->txbuf.paddr + in ath10k_htt_tx_64()
1626 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data; in ath10k_htt_tx_64()
1628 if ((ieee80211_is_action(hdr->frame_control) || in ath10k_htt_tx_64()
1629 ieee80211_is_deauth(hdr->frame_control) || in ath10k_htt_tx_64()
1630 ieee80211_is_disassoc(hdr->frame_control)) && in ath10k_htt_tx_64()
1631 ieee80211_has_protected(hdr->frame_control)) { in ath10k_htt_tx_64()
1633 } else if (!(skb_cb->flags & ATH10K_SKB_F_NO_HWCRYPT) && in ath10k_htt_tx_64()
1635 ieee80211_has_protected(hdr->frame_control)) { in ath10k_htt_tx_64()
1640 skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len, in ath10k_htt_tx_64()
1642 res = dma_mapping_error(dev, skb_cb->paddr); in ath10k_htt_tx_64()
1644 res = -EIO; in ath10k_htt_tx_64()
1648 if (unlikely(info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) in ath10k_htt_tx_64()
1649 freq = ar->scan.roc_freq; in ath10k_htt_tx_64()
1657 if (ar->hw_params.continuous_frag_desc) { in ath10k_htt_tx_64()
1658 ext_desc_t = htt->frag_desc.vaddr_desc_64; in ath10k_htt_tx_64()
1665 __cpu_to_le32(skb_cb->paddr); in ath10k_htt_tx_64()
1667 __cpu_to_le16(upper_32_bits(skb_cb->paddr)); in ath10k_htt_tx_64()
1668 frags[0].tword_addr.len_16 = __cpu_to_le16(msdu->len); in ath10k_htt_tx_64()
1670 frags_paddr = htt->frag_desc.paddr + in ath10k_htt_tx_64()
1673 frags = txbuf->frags; in ath10k_htt_tx_64()
1675 __cpu_to_le32(skb_cb->paddr); in ath10k_htt_tx_64()
1677 __cpu_to_le16(upper_32_bits(skb_cb->paddr)); in ath10k_htt_tx_64()
1678 frags[0].tword_addr.len_16 = __cpu_to_le16(msdu->len); in ath10k_htt_tx_64()
1690 frags_paddr = skb_cb->paddr; in ath10k_htt_tx_64()
1694 /* Normally all commands go through HTC which manages tx credits for in ath10k_htt_tx_64()
1695 * each endpoint and notifies when tx is completed. in ath10k_htt_tx_64()
1702 * received. That's why HTC tx completion handler itself is ignored by in ath10k_htt_tx_64()
1705 * There is simply no point in pushing HTT TX_FRM through HTC tx path in ath10k_htt_tx_64()
1711 txbuf->htc_hdr.eid = htt->eid; in ath10k_htt_tx_64()
1712 txbuf->htc_hdr.len = __cpu_to_le16(sizeof(txbuf->cmd_hdr) + in ath10k_htt_tx_64()
1713 sizeof(txbuf->cmd_tx) + in ath10k_htt_tx_64()
1715 txbuf->htc_hdr.flags = 0; in ath10k_htt_tx_64()
1717 if (skb_cb->flags & ATH10K_SKB_F_NO_HWCRYPT) in ath10k_htt_tx_64()
1722 if (msdu->ip_summed == CHECKSUM_PARTIAL && in ath10k_htt_tx_64()
1723 !test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { in ath10k_htt_tx_64()
1726 if (ar->hw_params.continuous_frag_desc) { in ath10k_htt_tx_64()
1727 memset(ext_desc->tso_flag, 0, sizeof(ext_desc->tso_flag)); in ath10k_htt_tx_64()
1728 ext_desc->tso_flag[3] |= in ath10k_htt_tx_64()
1733 /* Prevent firmware from sending up tx inspection requests. There's in ath10k_htt_tx_64()
1735 * it to simply rely a regular tx completion with discard status. in ath10k_htt_tx_64()
1739 txbuf->cmd_hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM; in ath10k_htt_tx_64()
1740 txbuf->cmd_tx.flags0 = flags0; in ath10k_htt_tx_64()
1741 txbuf->cmd_tx.flags1 = __cpu_to_le16(flags1); in ath10k_htt_tx_64()
1742 txbuf->cmd_tx.len = __cpu_to_le16(msdu->len); in ath10k_htt_tx_64()
1743 txbuf->cmd_tx.id = __cpu_to_le16(msdu_id); in ath10k_htt_tx_64()
1746 txbuf->cmd_tx.frags_paddr = __cpu_to_le64(frags_paddr); in ath10k_htt_tx_64()
1748 txbuf->cmd_tx.offchan_tx.peerid = in ath10k_htt_tx_64()
1750 txbuf->cmd_tx.offchan_tx.freq = in ath10k_htt_tx_64()
1751 __cpu_to_le16(freq); in ath10k_htt_tx_64()
1753 txbuf->cmd_tx.peerid = in ath10k_htt_tx_64()
1757 trace_ath10k_htt_tx(ar, msdu_id, msdu->len, vdev_id, tid); in ath10k_htt_tx_64()
1759 …"htt tx flags0 %u flags1 %u len %d id %u frags_paddr %pad, msdu_paddr %pad vdev %u tid %u freq %u\… in ath10k_htt_tx_64()
1760 flags0, flags1, msdu->len, msdu_id, &frags_paddr, in ath10k_htt_tx_64()
1761 &skb_cb->paddr, vdev_id, tid, freq); in ath10k_htt_tx_64()
1762 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt tx msdu: ", in ath10k_htt_tx_64()
1763 msdu->data, msdu->len); in ath10k_htt_tx_64()
1764 trace_ath10k_tx_hdr(ar, msdu->data, msdu->len); in ath10k_htt_tx_64()
1765 trace_ath10k_tx_payload(ar, msdu->data, msdu->len); in ath10k_htt_tx_64()
1769 sg_items[0].vaddr = &txbuf->htc_hdr; in ath10k_htt_tx_64()
1771 sizeof(txbuf->frags); in ath10k_htt_tx_64()
1772 sg_items[0].len = sizeof(txbuf->htc_hdr) + in ath10k_htt_tx_64()
1773 sizeof(txbuf->cmd_hdr) + in ath10k_htt_tx_64()
1774 sizeof(txbuf->cmd_tx); in ath10k_htt_tx_64()
1778 sg_items[1].vaddr = msdu->data; in ath10k_htt_tx_64()
1779 sg_items[1].paddr = skb_cb->paddr; in ath10k_htt_tx_64()
1782 res = ath10k_hif_tx_sg(htt->ar, in ath10k_htt_tx_64()
1783 htt->ar->htc.endpoint[htt->eid].ul_pipe_id, in ath10k_htt_tx_64()
1791 dma_unmap_single(dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); in ath10k_htt_tx_64()
1793 spin_lock_bh(&htt->tx_lock); in ath10k_htt_tx_64()
1795 spin_unlock_bh(&htt->tx_lock); in ath10k_htt_tx_64()
1832 struct ath10k *ar = htt->ar; in ath10k_htt_set_tx_ops()
1834 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) in ath10k_htt_set_tx_ops()
1835 htt->tx_ops = &htt_tx_ops_hl; in ath10k_htt_set_tx_ops()
1836 else if (ar->hw_params.target_64bit) in ath10k_htt_set_tx_ops()
1837 htt->tx_ops = &htt_tx_ops_64; in ath10k_htt_set_tx_ops()
1839 htt->tx_ops = &htt_tx_ops_32; in ath10k_htt_set_tx_ops()