49 #define sca_out(value, reg, card)    writeb(value, (card)->scabase + (reg))  macro
147 	sca_out(0, DSR_RX(port->chan), card);  in sca_init_port()
148 	sca_out(0, DSR_TX(port->chan), card);  in sca_init_port()
151 	sca_out(DCR_ABORT, DCR_RX(port->chan), card);  in sca_init_port()
152 	sca_out(DCR_ABORT, DCR_TX(port->chan), card);  in sca_init_port()
162 	sca_out(DCR_CLEAR_EOF, DCR_RX(port->chan), card);  in sca_init_port()
163 	sca_out(DCR_CLEAR_EOF, DCR_TX(port->chan), card);  in sca_init_port()
167 	sca_out(0x14, DMR_RX(port->chan), card); /* Chain mode, Multi-frame */  in sca_init_port()
168 	sca_out(DIR_EOME, DIR_RX(port->chan), card); /* enable interrupts */  in sca_init_port()
169 	sca_out(DSR_DE, DSR_RX(port->chan), card); /* DMA enable */  in sca_init_port()
172 	sca_out(0x14, DMR_TX(port->chan), card); /* Chain mode, Multi-frame */  in sca_init_port()
173 	sca_out(DIR_EOME, DIR_TX(port->chan), card); /* enable interrupts */  in sca_init_port()
188 		sca_out(ST1_CDCD, msci + ST1, card);  in sca_msci_intr()
232 	sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,  in sca_rx_done()
273 	sca_out(DSR_DE, DSR_RX(port->chan), card);  in sca_rx_done()
290 	sca_out((stat & (DSR_EOT | DSR_EOM | DSR_BOF | DSR_COF)) | DSR_DWE,  in sca_tx_done()
394 	sca_out(port->tmc, msci + TMCR, card);  in sca_set_port()
395 	sca_out(port->tmc, msci + TMCT, card);  in sca_set_port()
398 	sca_out(port->rxs, msci + RXS, card);  in sca_set_port()
399 	sca_out(port->txs, msci + TXS, card);  in sca_set_port()
406 	sca_out(md2, msci + MD2, card);  in sca_set_port()
453 	sca_out(CMD_RESET, msci + CMD, card);  in sca_open()
454 	sca_out(md0, msci + MD0, card);  in sca_open()
455 	sca_out(0x00, msci + MD1, card); /* no address field check */  in sca_open()
456 	sca_out(md2, msci + MD2, card);  in sca_open()
457 	sca_out(0x7E, msci + IDL, card); /* flag character 0x7E */  in sca_open()
459 	sca_out(CTL_IDLE | CTL_URCT | CTL_URSKP, msci + CTL, card);  in sca_open()
460 	sca_out(0x0F, msci + RNR, card); /* +1=RX DMA activation condition */  in sca_open()
461 	sca_out(0x3C, msci + TFS, card); /* +1 = TX start */  in sca_open()
462 	sca_out(0x38, msci + TCR, card); /* =Critical TX DMA activ condition */  in sca_open()
463 	sca_out(0x38, msci + TNR0, card); /* =TX DMA activation condition */  in sca_open()
464 	sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/  in sca_open()
472 	sca_out(port->tmc, msci + TMCR, card);  in sca_open()
473 	sca_out(port->tmc, msci + TMCT, card);  in sca_open()
474 	sca_out(port->rxs, msci + RXS, card);  in sca_open()
475 	sca_out(port->txs, msci + TXS, card);  in sca_open()
476 	sca_out(CMD_TX_ENABLE, msci + CMD, card);  in sca_open()
477 	sca_out(CMD_RX_ENABLE, msci + CMD, card);  in sca_open()
490 	sca_out(CMD_RESET, get_msci(port) + CMD, port->card);  in sca_close()
593 	sca_out(DSR_DE, DSR_TX(port->chan), card); /* Enable TX DMA */  in sca_xmit()
625 	sca_out(wait_states, WCRL, card); /* Wait Control */  in sca_init()
626 	sca_out(wait_states, WCRM, card);  in sca_init()
627 	sca_out(wait_states, WCRH, card);  in sca_init()
629 	sca_out(0, DMER, card);	/* DMA Master disable */  in sca_init()
630 	sca_out(0x03, PCR, card); /* DMA priority */  in sca_init()
631 	sca_out(0, DSR_RX(0), card); /* DMA disable - to halt state */  in sca_init()
632 	sca_out(0, DSR_TX(0), card);  in sca_init()
633 	sca_out(0, DSR_RX(1), card);  in sca_init()
634 	sca_out(0, DSR_TX(1), card);  in sca_init()
635 	sca_out(DMER_DME, DMER, card); /* DMA Master enable */  in sca_init()