Lines Matching +full:pef2256 +full:- +full:codec
1 // SPDX-License-Identifier: GPL-2.0
3 * PEF2256 also known as FALC56 driver
10 #include <linux/framer/pef2256.h>
12 #include <linux/framer/framer-provider.h>
24 #include "pef2256-regs.h"
36 struct pef2256 { struct
54 static u8 pef2256_read8(struct pef2256 *pef2256, int offset) in pef2256_read8() argument
58 regmap_read(pef2256->regmap, offset, &val); in pef2256_read8()
62 static void pef2256_write8(struct pef2256 *pef2256, int offset, u8 val) in pef2256_write8() argument
64 regmap_write(pef2256->regmap, offset, val); in pef2256_write8()
67 static void pef2256_clrbits8(struct pef2256 *pef2256, int offset, u8 clr) in pef2256_clrbits8() argument
69 regmap_clear_bits(pef2256->regmap, offset, clr); in pef2256_clrbits8()
72 static void pef2256_setbits8(struct pef2256 *pef2256, int offset, u8 set) in pef2256_setbits8() argument
74 regmap_set_bits(pef2256->regmap, offset, set); in pef2256_setbits8()
77 static void pef2256_clrsetbits8(struct pef2256 *pef2256, int offset, u8 clr, u8 set) in pef2256_clrsetbits8() argument
79 regmap_update_bits(pef2256->regmap, offset, clr | set, set); in pef2256_clrsetbits8()
82 enum pef2256_version pef2256_get_version(struct pef2256 *pef2256) in pef2256_get_version() argument
87 vstr = pef2256_read8(pef2256, PEF2256_VSTR); in pef2256_get_version()
88 wid = pef2256_read8(pef2256, PEF2256_WID); in pef2256_get_version()
111 dev_err(pef2256->dev, "Unknown version (0x%02x, 0x%02x)\n", vstr, wid); in pef2256_get_version()
158 static int pef2256_setup_gcm(struct pef2256 *pef2256) in pef2256_setup_gcm() argument
165 mclk_rate = clk_get_rate(pef2256->mclk); in pef2256_setup_gcm()
186 dev_err(pef2256->dev, "Unsupported v2.x MCLK rate %lu\n", mclk_rate); in pef2256_setup_gcm()
187 return -EINVAL; in pef2256_setup_gcm()
192 if (pef2256->version == PEF2256_VERSION_1_2) { in pef2256_setup_gcm()
201 pef2256_write8(pef2256, PEF2256_GCM(i + 1), *(gcm + i)); in pef2256_setup_gcm()
206 static int pef2256_setup_e1_line(struct pef2256 *pef2256) in pef2256_setup_e1_line() argument
210 /* RCLK output : DPLL clock, DCO-X enabled, DCO-X internal ref clock */ in pef2256_setup_e1_line()
211 pef2256_write8(pef2256, PEF2256_CMR1, 0x00); in pef2256_setup_e1_line()
216 * DCO-X center frequency enabled in pef2256_setup_e1_line()
218 pef2256_write8(pef2256, PEF2256_CMR2, PEF2256_CMR2_DCOXC); in pef2256_setup_e1_line()
220 if (pef2256->is_subordinate) { in pef2256_setup_e1_line()
222 pef2256_clrsetbits8(pef2256, PEF2256_CMR1, PEF2256_CMR1_RS_MASK, in pef2256_setup_e1_line()
226 /* slave mode, local loop off, mode short-haul in pef2256_setup_e1_line()
227 * In v2.x, bit3 is a forced 1 bit in the datasheet -> Need to be set. in pef2256_setup_e1_line()
229 if (pef2256->version == PEF2256_VERSION_1_2) in pef2256_setup_e1_line()
230 pef2256_write8(pef2256, PEF2256_LIM0, 0x00); in pef2256_setup_e1_line()
232 pef2256_write8(pef2256, PEF2256_LIM0, PEF2256_2X_LIM0_BIT3); in pef2256_setup_e1_line()
235 if (!pef2256->is_subordinate) in pef2256_setup_e1_line()
236 pef2256_setbits8(pef2256, PEF2256_LIM0, PEF2256_LIM0_MAS); in pef2256_setup_e1_line()
239 pef2256_write8(pef2256, PEF2256_LIM1, 0x00); in pef2256_setup_e1_line()
242 if (pef2256->version == PEF2256_VERSION_1_2) in pef2256_setup_e1_line()
243 pef2256_clrsetbits8(pef2256, PEF2256_LIM1, PEF2256_12_LIM1_RIL_MASK, in pef2256_setup_e1_line()
246 pef2256_clrsetbits8(pef2256, PEF2256_LIM1, PEF2256_2X_LIM1_RIL_MASK, in pef2256_setup_e1_line()
252 if (pef2256->version == PEF2256_VERSION_1_2) in pef2256_setup_e1_line()
253 pef2256_write8(pef2256, PEF2256_XPM0, 0x7B); in pef2256_setup_e1_line()
255 pef2256_write8(pef2256, PEF2256_XPM0, 0x9C); in pef2256_setup_e1_line()
256 pef2256_write8(pef2256, PEF2256_XPM1, 0x03); in pef2256_setup_e1_line()
257 pef2256_write8(pef2256, PEF2256_XPM2, 0x00); in pef2256_setup_e1_line()
260 pef2256_write8(pef2256, PEF2256_FMR0, PEF2256_FMR0_XC_HDB3 | PEF2256_FMR0_RC_HDB3); in pef2256_setup_e1_line()
268 switch (pef2256->frame_type) { in pef2256_setup_e1_line()
281 dev_err(pef2256->dev, "Unsupported frame type %d\n", pef2256->frame_type); in pef2256_setup_e1_line()
282 return -EINVAL; in pef2256_setup_e1_line()
284 pef2256_clrsetbits8(pef2256, PEF2256_FMR1, PEF2256_FMR1_XFS, fmr1); in pef2256_setup_e1_line()
285 pef2256_write8(pef2256, PEF2256_FMR2, fmr2); in pef2256_setup_e1_line()
287 if (!pef2256->is_subordinate) { in pef2256_setup_e1_line()
289 pef2256_write8(pef2256, PEF2256_GPC1, PEF2256_GPC1_CSFP_SEC_IN_HIGH); in pef2256_setup_e1_line()
292 pef2256_write8(pef2256, PEF2256_GPC1, PEF2256_GPC1_CSFP_FSC_OUT_HIGH); in pef2256_setup_e1_line()
298 pef2256_write8(pef2256, PEF2256_PC5, 0x00); in pef2256_setup_e1_line()
299 pef2256_write8(pef2256, PEF2256_PC6, 0x00); in pef2256_setup_e1_line()
302 pef2256_setbits8(pef2256, PEF2256_PC5, PEF2256_PC5_CRP); in pef2256_setup_e1_line()
307 static void pef2256_setup_e1_los(struct pef2256 *pef2256) in pef2256_setup_e1_los() argument
310 pef2256_write8(pef2256, PEF2256_PCD, 10); in pef2256_setup_e1_los()
312 pef2256_write8(pef2256, PEF2256_PCR, 21); in pef2256_setup_e1_los()
314 pef2256_write8(pef2256, PEF2256_LIM2, PEF2256_LIM2_SLT_THR50); in pef2256_setup_e1_los()
315 if (pef2256->is_subordinate) { in pef2256_setup_e1_los()
316 /* Loop-timed */ in pef2256_setup_e1_los()
317 pef2256_setbits8(pef2256, PEF2256_LIM2, PEF2256_LIM2_ELT); in pef2256_setup_e1_los()
321 static int pef2256_setup_e1_system(struct pef2256 *pef2256) in pef2256_setup_e1_system() argument
330 pef2256_write8(pef2256, PEF2256_SIC1, 0x00); in pef2256_setup_e1_system()
331 pef2256_write8(pef2256, PEF2256_SIC2, 0x00); in pef2256_setup_e1_system()
332 pef2256_write8(pef2256, PEF2256_SIC3, 0x00); in pef2256_setup_e1_system()
334 if (pef2256->is_subordinate) { in pef2256_setup_e1_system()
336 pef2256_clrsetbits8(pef2256, PEF2256_SIC1, PEF2256_SIC1_XBS_MASK, in pef2256_setup_e1_system()
340 if (pef2256->version != PEF2256_VERSION_1_2) { in pef2256_setup_e1_system()
341 /* during inactive channel phase switch RDO/RSIG into tri-state */ in pef2256_setup_e1_system()
342 pef2256_setbits8(pef2256, PEF2256_SIC3, PEF2256_SIC3_RTRI); in pef2256_setup_e1_system()
345 if (pef2256->is_tx_falling_edge) { in pef2256_setup_e1_system()
347 pef2256_clrsetbits8(pef2256, PEF2256_SIC3, PEF2256_SIC3_RESX, PEF2256_SIC3_RESR); in pef2256_setup_e1_system()
350 pef2256_clrsetbits8(pef2256, PEF2256_SIC3, PEF2256_SIC3_RESR, PEF2256_SIC3_RESX); in pef2256_setup_e1_system()
354 pef2256_write8(pef2256, PEF2256_XC0, 0); in pef2256_setup_e1_system()
355 pef2256_write8(pef2256, PEF2256_XC1, 4); in pef2256_setup_e1_system()
357 pef2256_write8(pef2256, PEF2256_RC0, 0); in pef2256_setup_e1_system()
358 pef2256_write8(pef2256, PEF2256_RC1, 4); in pef2256_setup_e1_system()
361 switch (pef2256->sysclk_rate) { in pef2256_setup_e1_system()
375 dev_err(pef2256->dev, "Unsupported sysclk rate %lu\n", pef2256->sysclk_rate); in pef2256_setup_e1_system()
376 return -EINVAL; in pef2256_setup_e1_system()
378 pef2256_clrsetbits8(pef2256, PEF2256_SIC1, PEF2256_SIC1_SSC_MASK, sic1); in pef2256_setup_e1_system()
381 switch (pef2256->data_rate) { in pef2256_setup_e1_system()
399 dev_err(pef2256->dev, "Unsupported data rate %u\n", pef2256->data_rate); in pef2256_setup_e1_system()
400 return -EINVAL; in pef2256_setup_e1_system()
402 pef2256_clrsetbits8(pef2256, PEF2256_FMR1, PEF2256_FMR1_SSD_MASK, fmr1); in pef2256_setup_e1_system()
403 pef2256_clrsetbits8(pef2256, PEF2256_SIC1, PEF2256_SIC1_SSD_MASK, sic1); in pef2256_setup_e1_system()
406 pef2256_clrsetbits8(pef2256, PEF2256_SIC2, PEF2256_SIC2_SICS_MASK, in pef2256_setup_e1_system()
407 PEF2256_SIC2_SICS(pef2256->channel_phase)); in pef2256_setup_e1_system()
412 static void pef2256_setup_e1_signaling(struct pef2256 *pef2256) in pef2256_setup_e1_signaling() argument
415 pef2256_write8(pef2256, PEF2256_XSW, PEF2256_XSW_XY(0x1F)); in pef2256_setup_e1_signaling()
418 pef2256_write8(pef2256, PEF2256_XSP, 0x00); in pef2256_setup_e1_signaling()
420 if (pef2256->is_subordinate) { in pef2256_setup_e1_signaling()
422 pef2256_setbits8(pef2256, PEF2256_XSW, PEF2256_XSW_XTM); in pef2256_setup_e1_signaling()
425 /* Si-Bit, Spare bit For International, FAS word */ in pef2256_setup_e1_signaling()
426 pef2256_setbits8(pef2256, PEF2256_XSW, PEF2256_XSW_XSIS); in pef2256_setup_e1_signaling()
427 pef2256_setbits8(pef2256, PEF2256_XSP, PEF2256_XSP_XSIF); in pef2256_setup_e1_signaling()
430 pef2256_write8(pef2256, PEF2256_TSWM, 0x00); in pef2256_setup_e1_signaling()
433 static void pef2256_setup_e1_errors(struct pef2256 *pef2256) in pef2256_setup_e1_errors() argument
436 pef2256_setbits8(pef2256, PEF2256_FMR1, PEF2256_FMR1_ECM); in pef2256_setup_e1_errors()
439 pef2256_setbits8(pef2256, PEF2256_GCR, PEF2256_GCR_ECMC); in pef2256_setup_e1_errors()
442 pef2256_setbits8(pef2256, PEF2256_RC0, PEF2256_RC0_SWD); in pef2256_setup_e1_errors()
445 pef2256_setbits8(pef2256, PEF2256_RC0, PEF2256_RC0_ASY4); in pef2256_setup_e1_errors()
448 static int pef2256_setup_e1(struct pef2256 *pef2256) in pef2256_setup_e1() argument
453 ret = pef2256_setup_gcm(pef2256); in pef2256_setup_e1()
458 pef2256_write8(pef2256, PEF2256_FMR1, 0x00); in pef2256_setup_e1()
461 pef2256_write8(pef2256, PEF2256_GCR, 0x00); in pef2256_setup_e1()
464 ret = pef2256_setup_e1_line(pef2256); in pef2256_setup_e1()
468 /* Setup Loss-of-signal detection and recovery */ in pef2256_setup_e1()
469 pef2256_setup_e1_los(pef2256); in pef2256_setup_e1()
472 ret = pef2256_setup_e1_system(pef2256); in pef2256_setup_e1()
477 pef2256_setup_e1_signaling(pef2256); in pef2256_setup_e1()
480 pef2256_setup_e1_errors(pef2256); in pef2256_setup_e1()
483 pef2256_setbits8(pef2256, PEF2256_GCR, PEF2256_GCR_SCI); in pef2256_setup_e1()
486 pef2256_read8(pef2256, PEF2256_ISR2); in pef2256_setup_e1()
487 pef2256_clrbits8(pef2256, PEF2256_IMR2, PEF2256_INT2_LOS | PEF2256_INT2_AIS); in pef2256_setup_e1()
490 pef2256_write8(pef2256, PEF2256_CMDR, PEF2256_CMDR_RRES | PEF2256_CMDR_XRES); in pef2256_setup_e1()
494 static void pef2256_isr_default_handler(struct pef2256 *pef2256, u8 nbr, u8 isr) in pef2256_isr_default_handler() argument
496 dev_warn_ratelimited(pef2256->dev, "ISR%u: 0x%02x not handled\n", nbr, isr); in pef2256_isr_default_handler()
499 static bool pef2256_is_carrier_on(struct pef2256 *pef2256) in pef2256_is_carrier_on() argument
503 frs0 = pef2256_read8(pef2256, PEF2256_FRS0); in pef2256_is_carrier_on()
507 static void pef2256_isr2_handler(struct pef2256 *pef2256, u8 nbr, u8 isr) in pef2256_isr2_handler() argument
512 carrier = pef2256_is_carrier_on(pef2256); in pef2256_isr2_handler()
513 if (atomic_xchg(&pef2256->carrier, carrier) != carrier) in pef2256_isr2_handler()
514 framer_notify_status_change(pef2256->framer); in pef2256_isr2_handler()
520 static void (*pef2256_isr_handler[])(struct pef2256 *, u8, u8) = { in pef2256_irq_handler()
528 struct pef2256 *pef2256 = (struct pef2256 *)priv; in pef2256_irq_handler() local
533 gis = pef2256_read8(pef2256, PEF2256_GIS); in pef2256_irq_handler()
537 isr = pef2256_read8(pef2256, PEF2256_ISR(n)); in pef2256_irq_handler()
538 pef2256_isr_handler[n](pef2256, n, isr); in pef2256_irq_handler()
545 static int pef2256_check_rates(struct pef2256 *pef2256, unsigned long sysclk_rate, in pef2256_check_rates() argument
557 dev_err(pef2256->dev, "Unsupported system clock rate %lu\n", sysclk_rate); in pef2256_check_rates()
558 return -EINVAL; in pef2256_check_rates()
565 dev_err(pef2256->dev, "Unsupported data rate %lu with system clock rate %lu\n", in pef2256_check_rates()
567 return -EINVAL; in pef2256_check_rates()
570 static int pef2556_of_parse(struct pef2256 *pef2256, struct device_node *np) in pef2556_of_parse() argument
574 pef2256->data_rate = 2048000; in pef2556_of_parse()
575 ret = of_property_read_u32(np, "lantiq,data-rate-bps", &pef2256->data_rate); in pef2556_of_parse()
576 if (ret && ret != -EINVAL) { in pef2556_of_parse()
577 dev_err(pef2256->dev, "%pOF: failed to read lantiq,data-rate-bps\n", np); in pef2556_of_parse()
581 ret = pef2256_check_rates(pef2256, pef2256->sysclk_rate, pef2256->data_rate); in pef2556_of_parse()
585 pef2256->is_tx_falling_edge = of_property_read_bool(np, "lantiq,clock-falling-edge"); in pef2556_of_parse()
587 pef2256->channel_phase = 0; in pef2556_of_parse()
588 ret = of_property_read_u8(np, "lantiq,channel-phase", &pef2256->channel_phase); in pef2556_of_parse()
589 if (ret && ret != -EINVAL) { in pef2556_of_parse()
590 dev_err(pef2256->dev, "%pOF: failed to read lantiq,channel-phase\n", in pef2556_of_parse()
594 if (pef2256->channel_phase >= pef2256->sysclk_rate / pef2256->data_rate) { in pef2556_of_parse()
595 dev_err(pef2256->dev, "%pOF: Invalid lantiq,channel-phase %u\n", in pef2556_of_parse()
596 np, pef2256->channel_phase); in pef2556_of_parse()
597 return -EINVAL; in pef2556_of_parse()
610 { .name = "lantiq-pef2256-pinctrl", },
613 static int pef2256_add_audio_devices(struct pef2256 *pef2256) in pef2256_add_audio_devices() argument
615 const char *compatible = "lantiq,pef2256-codec"; in pef2256_add_audio_devices()
622 for_each_available_child_of_node(pef2256->dev->of_node, np) { in pef2256_add_audio_devices()
632 return -ENOMEM; in pef2256_add_audio_devices()
635 audio_devs[i].name = "framer-codec"; in pef2256_add_audio_devices()
640 ret = mfd_add_devices(pef2256->dev, 0, audio_devs, count, NULL, 0, NULL); in pef2256_add_audio_devices()
647 struct pef2256 *pef2256 = framer_get_drvdata(framer); in pef2256_framer_get_status() local
649 status->link_is_on = !!atomic_read(&pef2256->carrier); in pef2256_framer_get_status()
655 struct pef2256 *pef2256 = framer_get_drvdata(framer); in pef2256_framer_set_config() local
657 if (config->iface != FRAMER_IFACE_E1) { in pef2256_framer_set_config()
658 dev_err(pef2256->dev, "Only E1 line is currently supported\n"); in pef2256_framer_set_config()
659 return -EOPNOTSUPP; in pef2256_framer_set_config()
662 switch (config->clock_type) { in pef2256_framer_set_config()
664 pef2256->is_subordinate = true; in pef2256_framer_set_config()
667 pef2256->is_subordinate = false; in pef2256_framer_set_config()
670 return -EINVAL; in pef2256_framer_set_config()
674 return pef2256_setup_e1(pef2256); in pef2256_framer_set_config()
679 struct pef2256 *pef2256 = framer_get_drvdata(framer); in pef2256_framer_get_config() local
681 config->iface = FRAMER_IFACE_E1; in pef2256_framer_get_config()
682 config->clock_type = pef2256->is_subordinate ? FRAMER_CLOCK_EXT : FRAMER_CLOCK_INT; in pef2256_framer_get_config()
683 config->line_clock_rate = 2048000; in pef2256_framer_get_config()
696 struct device_node *np = pdev->dev.of_node; in pef2256_probe()
699 struct pef2256 *pef2256; in pef2256_probe() local
705 pef2256 = devm_kzalloc(&pdev->dev, sizeof(*pef2256), GFP_KERNEL); in pef2256_probe()
706 if (!pef2256) in pef2256_probe()
707 return -ENOMEM; in pef2256_probe()
709 pef2256->dev = &pdev->dev; in pef2256_probe()
710 atomic_set(&pef2256->carrier, 0); in pef2256_probe()
712 pef2256->is_subordinate = true; in pef2256_probe()
713 pef2256->frame_type = PEF2256_FRAME_E1_DOUBLEFRAME; in pef2256_probe()
719 pef2256->regmap = devm_regmap_init_mmio(&pdev->dev, iomem, in pef2256_probe()
721 if (IS_ERR(pef2256->regmap)) { in pef2256_probe()
722 dev_err(&pdev->dev, "Failed to initialise Regmap (%ld)\n", in pef2256_probe()
723 PTR_ERR(pef2256->regmap)); in pef2256_probe()
724 return PTR_ERR(pef2256->regmap); in pef2256_probe()
727 pef2256->mclk = devm_clk_get_enabled(&pdev->dev, "mclk"); in pef2256_probe()
728 if (IS_ERR(pef2256->mclk)) in pef2256_probe()
729 return PTR_ERR(pef2256->mclk); in pef2256_probe()
731 pef2256->sclkr = devm_clk_get_enabled(&pdev->dev, "sclkr"); in pef2256_probe()
732 if (IS_ERR(pef2256->sclkr)) in pef2256_probe()
733 return PTR_ERR(pef2256->sclkr); in pef2256_probe()
735 pef2256->sclkx = devm_clk_get_enabled(&pdev->dev, "sclkx"); in pef2256_probe()
736 if (IS_ERR(pef2256->sclkx)) in pef2256_probe()
737 return PTR_ERR(pef2256->sclkx); in pef2256_probe()
743 sclkr_rate = clk_get_rate(pef2256->sclkr); in pef2256_probe()
744 sclkx_rate = clk_get_rate(pef2256->sclkx); in pef2256_probe()
746 dev_err(pef2256->dev, "clk rate mismatch. sclkr %lu Hz, sclkx %lu Hz\n", in pef2256_probe()
748 return -EINVAL; in pef2256_probe()
750 pef2256->sysclk_rate = sclkr_rate; in pef2256_probe()
753 pef2256->reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW); in pef2256_probe()
754 if (IS_ERR(pef2256->reset_gpio)) in pef2256_probe()
755 return PTR_ERR(pef2256->reset_gpio); in pef2256_probe()
756 if (pef2256->reset_gpio) { in pef2256_probe()
757 gpiod_set_value_cansleep(pef2256->reset_gpio, 1); in pef2256_probe()
759 gpiod_set_value_cansleep(pef2256->reset_gpio, 0); in pef2256_probe()
763 pef2256->version = pef2256_get_version(pef2256); in pef2256_probe()
764 switch (pef2256->version) { in pef2256_probe()
775 return -ENODEV; in pef2256_probe()
777 dev_info(pef2256->dev, "Version %s detected\n", version_txt); in pef2256_probe()
779 ret = pef2556_of_parse(pef2256, np); in pef2256_probe()
784 pef2256->framer = devm_framer_create(pef2256->dev, NULL, &pef2256_framer_ops); in pef2256_probe()
785 if (IS_ERR(pef2256->framer)) in pef2256_probe()
786 return PTR_ERR(pef2256->framer); in pef2256_probe()
788 framer_set_drvdata(pef2256->framer, pef2256); in pef2256_probe()
791 pef2256_write8(pef2256, PEF2256_IMR0, 0xff); in pef2256_probe()
792 pef2256_write8(pef2256, PEF2256_IMR1, 0xff); in pef2256_probe()
793 pef2256_write8(pef2256, PEF2256_IMR2, 0xff); in pef2256_probe()
794 pef2256_write8(pef2256, PEF2256_IMR3, 0xff); in pef2256_probe()
795 pef2256_write8(pef2256, PEF2256_IMR4, 0xff); in pef2256_probe()
796 pef2256_write8(pef2256, PEF2256_IMR5, 0xff); in pef2256_probe()
799 pef2256_read8(pef2256, PEF2256_ISR0); in pef2256_probe()
800 pef2256_read8(pef2256, PEF2256_ISR1); in pef2256_probe()
801 pef2256_read8(pef2256, PEF2256_ISR2); in pef2256_probe()
802 pef2256_read8(pef2256, PEF2256_ISR3); in pef2256_probe()
803 pef2256_read8(pef2256, PEF2256_ISR4); in pef2256_probe()
804 pef2256_read8(pef2256, PEF2256_ISR5); in pef2256_probe()
809 ret = devm_request_irq(pef2256->dev, irq, pef2256_irq_handler, 0, "pef2256", pef2256); in pef2256_probe()
813 platform_set_drvdata(pdev, pef2256); in pef2256_probe()
815 ret = mfd_add_devices(pef2256->dev, 0, pef2256_devs, in pef2256_probe()
818 dev_err(pef2256->dev, "add devices failed (%d)\n", ret); in pef2256_probe()
822 ret = pef2256_setup_e1(pef2256); in pef2256_probe()
826 framer_provider = devm_framer_provider_of_register(pef2256->dev, in pef2256_probe()
832 ret = pef2256_add_audio_devices(pef2256); in pef2256_probe()
834 dev_err(pef2256->dev, "add audio devices failed (%d)\n", ret); in pef2256_probe()
843 struct pef2256 *pef2256 = platform_get_drvdata(pdev); in pef2256_remove() local
846 pef2256_write8(pef2256, PEF2256_IMR0, 0xff); in pef2256_remove()
847 pef2256_write8(pef2256, PEF2256_IMR1, 0xff); in pef2256_remove()
848 pef2256_write8(pef2256, PEF2256_IMR2, 0xff); in pef2256_remove()
849 pef2256_write8(pef2256, PEF2256_IMR3, 0xff); in pef2256_remove()
850 pef2256_write8(pef2256, PEF2256_IMR4, 0xff); in pef2256_remove()
851 pef2256_write8(pef2256, PEF2256_IMR5, 0xff); in pef2256_remove()
855 { .compatible = "lantiq,pef2256" },
862 .name = "lantiq-pef2256",
870 struct regmap *pef2256_get_regmap(struct pef2256 *pef2256) in pef2256_get_regmap() argument
872 return pef2256->regmap; in pef2256_get_regmap()
877 MODULE_DESCRIPTION("PEF2256 driver");