1 // SPDX-License-Identifier: GPL-2.0+
23 #include <dt-bindings/net/qca-ar803x.h>
48 #define AT803X_PSSR				0x11	/*PHY-Specific Status Register*/
55 /* AT803x supports either the XTAL input pad, an internal PLL or the
57  * is only used for 25 MHz output, all other frequencies need the PLL.
61  * By default the PLL is only enabled if there is a link. Otherwise
62  * the PHY will go into low power state and disabled the PLL. You can
63  * set the PLL_ON bit (see debug register 0x1f) to keep the PLL always
78  * but doesn't support choosing between XTAL/PLL and DSP.
104 /* don't turn off internal PLL */
193 	context->bmcr = phy_read(phydev, MII_BMCR);  in at803x_context_save()
194 	context->advertise = phy_read(phydev, MII_ADVERTISE);  in at803x_context_save()
195 	context->control1000 = phy_read(phydev, MII_CTRL1000);  in at803x_context_save()
196 	context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE);  in at803x_context_save()
197 	context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED);  in at803x_context_save()
198 	context->led_control = phy_read(phydev, AT803X_LED_CONTROL);  in at803x_context_save()
205 	phy_write(phydev, MII_BMCR, context->bmcr);  in at803x_context_restore()
206 	phy_write(phydev, MII_ADVERTISE, context->advertise);  in at803x_context_restore()
207 	phy_write(phydev, MII_CTRL1000, context->control1000);  in at803x_context_restore()
208 	phy_write(phydev, AT803X_INTR_ENABLE, context->int_enable);  in at803x_context_restore()
209 	phy_write(phydev, AT803X_SMART_SPEED, context->smart_speed);  in at803x_context_restore()
210 	phy_write(phydev, AT803X_LED_CONTROL, context->led_control);  in at803x_context_restore()
238 	struct device_node *node = phydev->mdio.dev.of_node;  in at803x_parse_dt()
239 	struct at803x_priv *priv = phydev->priv;  in at803x_parse_dt()
247 	if (of_property_read_bool(node, "qca,disable-smarteee"))  in at803x_parse_dt()
248 		priv->flags |= AT803X_DISABLE_SMARTEEE;  in at803x_parse_dt()
250 	if (of_property_read_bool(node, "qca,disable-hibernation-mode"))  in at803x_parse_dt()
251 		priv->flags |= AT803X_DISABLE_HIBERNATION_MODE;  in at803x_parse_dt()
253 	if (!of_property_read_u32(node, "qca,smarteee-tw-us-1g", &tw)) {  in at803x_parse_dt()
255 			phydev_err(phydev, "invalid qca,smarteee-tw-us-1g\n");  in at803x_parse_dt()
256 			return -EINVAL;  in at803x_parse_dt()
258 		priv->smarteee_lpi_tw_1g = tw;  in at803x_parse_dt()
261 	if (!of_property_read_u32(node, "qca,smarteee-tw-us-100m", &tw)) {  in at803x_parse_dt()
263 			phydev_err(phydev, "invalid qca,smarteee-tw-us-100m\n");  in at803x_parse_dt()
264 			return -EINVAL;  in at803x_parse_dt()
266 		priv->smarteee_lpi_tw_100m = tw;  in at803x_parse_dt()
269 	ret = of_property_read_u32(node, "qca,clk-out-frequency", &freq);  in at803x_parse_dt()
285 			phydev_err(phydev, "invalid qca,clk-out-frequency\n");  in at803x_parse_dt()
286 			return -EINVAL;  in at803x_parse_dt()
289 		priv->clk_25m_reg |= FIELD_PREP(AT803X_CLK_OUT_MASK, sel);  in at803x_parse_dt()
290 		priv->clk_25m_mask |= AT803X_CLK_OUT_MASK;  in at803x_parse_dt()
293 	ret = of_property_read_u32(node, "qca,clk-out-strength", &strength);  in at803x_parse_dt()
295 		priv->clk_25m_mask |= AT803X_CLK_OUT_STRENGTH_MASK;  in at803x_parse_dt()
298 			priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_FULL;  in at803x_parse_dt()
301 			priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_HALF;  in at803x_parse_dt()
304 			priv->clk_25m_reg |= AT803X_CLK_OUT_STRENGTH_QUARTER;  in at803x_parse_dt()
307 			phydev_err(phydev, "invalid qca,clk-out-strength\n");  in at803x_parse_dt()
308 			return -EINVAL;  in at803x_parse_dt()
317 	struct device *dev = &phydev->mdio.dev;  in at803x_probe()
323 		return -ENOMEM;  in at803x_probe()
325 	phydev->priv = priv;  in at803x_probe()
336 	struct at803x_priv *priv = phydev->priv;  in at803x_get_features()
343 	if (phydev->drv->phy_id != ATH8031_PHY_ID)  in at803x_get_features()
357 	if (!priv->is_1000basex)  in at803x_get_features()
359 				   phydev->supported);  in at803x_get_features()
366 	struct at803x_priv *priv = phydev->priv;  in at803x_smarteee_config()
370 	if (priv->flags & AT803X_DISABLE_SMARTEEE)  in at803x_smarteee_config()
375 	if (priv->smarteee_lpi_tw_1g) {  in at803x_smarteee_config()
377 		val |= priv->smarteee_lpi_tw_1g << 8;  in at803x_smarteee_config()
379 	if (priv->smarteee_lpi_tw_100m) {  in at803x_smarteee_config()
381 		val |= priv->smarteee_lpi_tw_100m;  in at803x_smarteee_config()
398 	struct at803x_priv *priv = phydev->priv;  in at803x_clk_out_config()
400 	if (!priv->clk_25m_mask)  in at803x_clk_out_config()
404 			      priv->clk_25m_mask, priv->clk_25m_reg);  in at803x_clk_out_config()
409 	struct at803x_priv *priv = phydev->priv;  in at8031_pll_config()
411 	/* The default after hardware reset is PLL OFF. After a soft reset, the  in at8031_pll_config()
414 	if (priv->flags & AT803X_KEEP_PLL_ENABLED)  in at8031_pll_config()
424 	struct at803x_priv *priv = phydev->priv;  in at803x_hibernation_mode_config()
429 	if (!(priv->flags & AT803X_DISABLE_HIBERNATION_MODE) &&  in at803x_hibernation_mode_config()
430 	    !(phydev->dev_flags & PHY_F_RXC_ALWAYS_ON))  in at803x_hibernation_mode_config()
446 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in at803x_config_init()
447 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)  in at803x_config_init()
454 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||  in at803x_config_init()
455 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)  in at803x_config_init()
492 	if (phydev->state == PHY_NOLINK && phydev->mdio.reset_gpio) {  in at803x_link_change_notify()
510 	struct at803x_priv *priv = phydev->priv;  in at803x_config_aneg()
517 	if (priv->is_1000basex)  in at803x_config_aneg()
603 	 * auto-negotiating. Starting the test will restart the AN  in at803x_cable_test_get_status()
608 	while (pair_mask && retries--) {  in at803x_cable_test_get_status()
627 	/* Enable auto-negotiation, but advertise no capabilities, no link  in at803x_cable_test_autoneg()
628 	 * will be established. A restart of the auto-negotiation is not  in at803x_cable_test_autoneg()
680 	.of_match = of_match_ptr("vddio-regulator"),
693 	.of_match = of_match_ptr("vddh-regulator"),
703 	struct at803x_priv *priv = phydev->priv;  in at8031_register_regulators()
704 	struct device *dev = &phydev->mdio.dev;  in at8031_register_regulators()
710 	priv->vddio_rdev = devm_regulator_register(dev, &vddio_desc, &config);  in at8031_register_regulators()
711 	if (IS_ERR(priv->vddio_rdev)) {  in at8031_register_regulators()
713 		return PTR_ERR(priv->vddio_rdev);  in at8031_register_regulators()
716 	priv->vddh_rdev = devm_regulator_register(dev, &vddh_desc, &config);  in at8031_register_regulators()
717 	if (IS_ERR(priv->vddh_rdev)) {  in at8031_register_regulators()
719 		return PTR_ERR(priv->vddh_rdev);  in at8031_register_regulators()
741 	sfp_parse_support(phydev->sfp_bus, id, sfp_support, interfaces);  in at8031_sfp_insert()
743 	 * Mask out non-supported modes so the correct interface is picked.  in at8031_sfp_insert()
748 		dev_err(&phydev->mdio.dev, "incompatible SFP module inserted\n");  in at8031_sfp_insert()
749 		return -EINVAL;  in at8031_sfp_insert()
752 	iface = sfp_select_interface(phydev->sfp_bus, sfp_support);  in at8031_sfp_insert()
754 	/* Only 1000Base-X is supported by AR8031/8033 as the downstream SerDes  in at8031_sfp_insert()
756 	 * However, some copper modules detected as having a preferred SGMII  in at8031_sfp_insert()
757 	 * interface do default to and function in 1000Base-X mode, so just  in at8031_sfp_insert()
762 		dev_warn(&phydev->mdio.dev, "module may not function if 1000Base-X not supported\n");  in at8031_sfp_insert()
764 		return -EINVAL;  in at8031_sfp_insert()
779 	struct device_node *node = phydev->mdio.dev.of_node;  in at8031_parse_dt()
780 	struct at803x_priv *priv = phydev->priv;  in at8031_parse_dt()
783 	if (of_property_read_bool(node, "qca,keep-pll-enabled"))  in at8031_parse_dt()
784 		priv->flags |= AT803X_KEEP_PLL_ENABLED;  in at8031_parse_dt()
790 	ret = devm_regulator_get_enable_optional(&phydev->mdio.dev,  in at8031_parse_dt()
797 	/* Only AR8031/8033 support 1000Base-X for SFP modules */  in at8031_parse_dt()
812 	priv = phydev->priv;  in at8031_probe()
829 		priv->is_1000basex = true;  in at8031_probe()
833 		priv->is_fiber = true;  in at8031_probe()
847 	struct at803x_priv *priv = phydev->priv;  in at8031_config_init()
856 				priv->is_fiber ? AT803X_PAGE_FIBER :  in at8031_config_init()
874 	/* First setup MAC address and enable WOL interrupt */  in at8031_set_wol()
879 	if (wol->wolopts & WAKE_MAGIC)  in at8031_set_wol()
880 		/* Enable WOL function for 1588 */  in at8031_set_wol()
895 	struct at803x_priv *priv = phydev->priv;  in at8031_config_intr()
898 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED &&  in at8031_config_intr()
899 	    priv->is_fiber) {  in at8031_config_intr()
919 	struct at803x_priv *priv = phydev->priv;  in at8031_read_status()
922 	if (priv->is_1000basex)  in at8031_read_status()
953 	struct at803x_priv *priv = phydev->priv;  in at8035_parse_dt()
959 	if (priv->clk_25m_mask) {  in at8035_parse_dt()
971 		priv->clk_25m_reg &= AT8035_CLK_OUT_MASK;  in at8035_parse_dt()
972 		priv->clk_25m_mask &= AT8035_CLK_OUT_MASK;  in at8035_parse_dt()
1068 	.name			= "Qualcomm Atheros AR9331 built-in PHY",
1084 	.name			= "Qualcomm Atheros QCA9561 built-in PHY",