Lines Matching refs:val
21 int val; in genphy_c45_baset1_able() local
24 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able()
25 if (val < 0) in genphy_c45_baset1_able()
28 phydev->pma_extable = val; in genphy_c45_baset1_able()
401 int val; in genphy_c45_aneg_done() local
406 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done()
408 return val < 0 ? val : val & MDIO_AN_STAT1_COMPLETE ? 1 : 0; in genphy_c45_aneg_done()
423 int val, devad; in genphy_c45_read_link() local
427 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link()
428 if (val < 0) in genphy_c45_read_link()
429 return val; in genphy_c45_read_link()
434 if (val & MDIO_AN_CTRL1_RESTART) { in genphy_c45_read_link()
450 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
451 if (val < 0) in genphy_c45_read_link()
452 return val; in genphy_c45_read_link()
453 else if (val & MDIO_STAT1_LSTATUS) in genphy_c45_read_link()
457 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
458 if (val < 0) in genphy_c45_read_link()
459 return val; in genphy_c45_read_link()
461 if (!(val & MDIO_STAT1_LSTATUS)) in genphy_c45_read_link()
478 int val; in genphy_c45_baset1_read_lpa() local
480 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_baset1_read_lpa()
481 if (val < 0) in genphy_c45_baset1_read_lpa()
482 return val; in genphy_c45_baset1_read_lpa()
484 if (!(val & MDIO_AN_STAT1_COMPLETE)) { in genphy_c45_baset1_read_lpa()
497 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_L); in genphy_c45_baset1_read_lpa()
498 if (val < 0) in genphy_c45_baset1_read_lpa()
499 return val; in genphy_c45_baset1_read_lpa()
501 mii_t1_adv_l_mod_linkmode_t(phydev->lp_advertising, val); in genphy_c45_baset1_read_lpa()
502 phydev->pause = val & MDIO_AN_T1_ADV_L_PAUSE_CAP; in genphy_c45_baset1_read_lpa()
503 phydev->asym_pause = val & MDIO_AN_T1_ADV_L_PAUSE_ASYM; in genphy_c45_baset1_read_lpa()
505 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_M); in genphy_c45_baset1_read_lpa()
506 if (val < 0) in genphy_c45_baset1_read_lpa()
507 return val; in genphy_c45_baset1_read_lpa()
509 mii_t1_adv_m_mod_linkmode_t(phydev->lp_advertising, val); in genphy_c45_baset1_read_lpa()
526 int val; in genphy_c45_read_lpa() local
531 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa()
532 if (val < 0) in genphy_c45_read_lpa()
533 return val; in genphy_c45_read_lpa()
535 if (!(val & MDIO_AN_STAT1_COMPLETE)) { in genphy_c45_read_lpa()
547 val & MDIO_AN_STAT1_LPABLE); in genphy_c45_read_lpa()
550 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); in genphy_c45_read_lpa()
551 if (val < 0) in genphy_c45_read_lpa()
552 return val; in genphy_c45_read_lpa()
554 mii_adv_mod_linkmode_adv_t(phydev->lp_advertising, val); in genphy_c45_read_lpa()
555 phydev->pause = val & LPA_PAUSE_CAP; in genphy_c45_read_lpa()
556 phydev->asym_pause = val & LPA_PAUSE_ASYM; in genphy_c45_read_lpa()
559 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in genphy_c45_read_lpa()
560 if (val < 0) in genphy_c45_read_lpa()
561 return val; in genphy_c45_read_lpa()
563 mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, val); in genphy_c45_read_lpa()
576 int val; in genphy_c45_pma_baset1_read_master_slave() local
581 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1_CTRL); in genphy_c45_pma_baset1_read_master_slave()
582 if (val < 0) in genphy_c45_pma_baset1_read_master_slave()
583 return val; in genphy_c45_pma_baset1_read_master_slave()
585 if (val & MDIO_PMA_PMD_BT1_CTRL_CFG_MST) { in genphy_c45_pma_baset1_read_master_slave()
603 int val; in genphy_c45_read_pma() local
607 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_read_pma()
608 if (val < 0) in genphy_c45_read_pma()
609 return val; in genphy_c45_read_pma()
611 switch (val & MDIO_CTRL1_SPEEDSEL) { in genphy_c45_read_pma()
638 val = genphy_c45_pma_baset1_read_master_slave(phydev); in genphy_c45_read_pma()
639 if (val < 0) in genphy_c45_read_pma()
640 return val; in genphy_c45_read_pma()
653 int val; in genphy_c45_read_mdix() local
656 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_read_mdix()
658 if (val < 0) in genphy_c45_read_mdix()
659 return val; in genphy_c45_read_mdix()
661 switch (val) { in genphy_c45_read_mdix()
688 int val, changed = 0; in genphy_c45_write_eee_adv() local
691 val = linkmode_to_mii_eee_cap1_t(adv); in genphy_c45_write_eee_adv()
696 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
701 val); in genphy_c45_write_eee_adv()
702 if (val < 0) in genphy_c45_write_eee_adv()
703 return val; in genphy_c45_write_eee_adv()
704 if (val > 0) in genphy_c45_write_eee_adv()
709 val = linkmode_to_mii_eee_cap2_t(adv); in genphy_c45_write_eee_adv()
714 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
717 val); in genphy_c45_write_eee_adv()
718 if (val < 0) in genphy_c45_write_eee_adv()
719 return val; in genphy_c45_write_eee_adv()
720 if (val > 0) in genphy_c45_write_eee_adv()
726 val = linkmode_adv_to_mii_10base_t1_t(adv); in genphy_c45_write_eee_adv()
730 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
733 val); in genphy_c45_write_eee_adv()
734 if (val < 0) in genphy_c45_write_eee_adv()
735 return val; in genphy_c45_write_eee_adv()
736 if (val > 0) in genphy_c45_write_eee_adv()
750 int val; in genphy_c45_read_eee_adv() local
756 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in genphy_c45_read_eee_adv()
757 if (val < 0) in genphy_c45_read_eee_adv()
758 return val; in genphy_c45_read_eee_adv()
760 mii_eee_cap1_mod_linkmode_t(adv, val); in genphy_c45_read_eee_adv()
767 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV2); in genphy_c45_read_eee_adv()
768 if (val < 0) in genphy_c45_read_eee_adv()
769 return val; in genphy_c45_read_eee_adv()
771 mii_eee_cap2_mod_linkmode_adv_t(adv, val); in genphy_c45_read_eee_adv()
779 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10BT1_AN_CTRL); in genphy_c45_read_eee_adv()
780 if (val < 0) in genphy_c45_read_eee_adv()
781 return val; in genphy_c45_read_eee_adv()
783 mii_10base_t1_adv_mod_linkmode_t(adv, val); in genphy_c45_read_eee_adv()
797 int val; in genphy_c45_read_eee_lpa() local
803 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in genphy_c45_read_eee_lpa()
804 if (val < 0) in genphy_c45_read_eee_lpa()
805 return val; in genphy_c45_read_eee_lpa()
807 mii_eee_cap1_mod_linkmode_t(lpa, val); in genphy_c45_read_eee_lpa()
814 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2); in genphy_c45_read_eee_lpa()
815 if (val < 0) in genphy_c45_read_eee_lpa()
816 return val; in genphy_c45_read_eee_lpa()
818 mii_eee_cap2_mod_linkmode_adv_t(lpa, val); in genphy_c45_read_eee_lpa()
826 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10BT1_AN_STAT); in genphy_c45_read_eee_lpa()
827 if (val < 0) in genphy_c45_read_eee_lpa()
828 return val; in genphy_c45_read_eee_lpa()
830 mii_10base_t1_adv_mod_linkmode_t(lpa, val); in genphy_c45_read_eee_lpa()
842 int val; in genphy_c45_read_eee_cap1() local
847 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in genphy_c45_read_eee_cap1()
848 if (val < 0) in genphy_c45_read_eee_cap1()
849 return val; in genphy_c45_read_eee_cap1()
856 if (val == 0xffff) in genphy_c45_read_eee_cap1()
859 mii_eee_cap1_mod_linkmode_t(phydev->supported_eee, val); in genphy_c45_read_eee_cap1()
876 int val; in genphy_c45_read_eee_cap2() local
881 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE2); in genphy_c45_read_eee_cap2()
882 if (val < 0) in genphy_c45_read_eee_cap2()
883 return val; in genphy_c45_read_eee_cap2()
886 if (val == 0xffff) in genphy_c45_read_eee_cap2()
889 mii_eee_cap2_mod_linkmode_sup_t(phydev->supported_eee, val); in genphy_c45_read_eee_cap2()
900 int val; in genphy_c45_read_eee_abilities() local
907 val = genphy_c45_read_eee_cap1(phydev); in genphy_c45_read_eee_abilities()
908 if (val) in genphy_c45_read_eee_abilities()
909 return val; in genphy_c45_read_eee_abilities()
914 val = genphy_c45_read_eee_cap2(phydev); in genphy_c45_read_eee_abilities()
915 if (val) in genphy_c45_read_eee_abilities()
916 return val; in genphy_c45_read_eee_abilities()
924 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in genphy_c45_read_eee_abilities()
925 if (val < 0) in genphy_c45_read_eee_abilities()
926 return val; in genphy_c45_read_eee_abilities()
930 val & MDIO_PMA_10T1L_STAT_EEE); in genphy_c45_read_eee_abilities()
969 int val; in genphy_c45_pma_baset1_read_abilities() local
971 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1); in genphy_c45_pma_baset1_read_abilities()
972 if (val < 0) in genphy_c45_pma_baset1_read_abilities()
973 return val; in genphy_c45_pma_baset1_read_abilities()
977 val & MDIO_PMA_PMD_BT1_B10L_ABLE); in genphy_c45_pma_baset1_read_abilities()
981 val & MDIO_PMA_PMD_BT1_B100_ABLE); in genphy_c45_pma_baset1_read_abilities()
985 val & MDIO_PMA_PMD_BT1_B1000_ABLE); in genphy_c45_pma_baset1_read_abilities()
987 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_pma_baset1_read_abilities()
988 if (val < 0) in genphy_c45_pma_baset1_read_abilities()
989 return val; in genphy_c45_pma_baset1_read_abilities()
993 val & MDIO_AN_STAT1_ABLE); in genphy_c45_pma_baset1_read_abilities()
1008 int val; in genphy_c45_pma_read_ext_abilities() local
1010 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_pma_read_ext_abilities()
1011 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1012 return val; in genphy_c45_pma_read_ext_abilities()
1016 val & MDIO_PMA_EXTABLE_10GBLRM); in genphy_c45_pma_read_ext_abilities()
1019 val & MDIO_PMA_EXTABLE_10GBT); in genphy_c45_pma_read_ext_abilities()
1022 val & MDIO_PMA_EXTABLE_10GBKX4); in genphy_c45_pma_read_ext_abilities()
1025 val & MDIO_PMA_EXTABLE_10GBKR); in genphy_c45_pma_read_ext_abilities()
1028 val & MDIO_PMA_EXTABLE_1000BT); in genphy_c45_pma_read_ext_abilities()
1031 val & MDIO_PMA_EXTABLE_1000BKX); in genphy_c45_pma_read_ext_abilities()
1035 val & MDIO_PMA_EXTABLE_100BTX); in genphy_c45_pma_read_ext_abilities()
1038 val & MDIO_PMA_EXTABLE_100BTX); in genphy_c45_pma_read_ext_abilities()
1042 val & MDIO_PMA_EXTABLE_10BT); in genphy_c45_pma_read_ext_abilities()
1045 val & MDIO_PMA_EXTABLE_10BT); in genphy_c45_pma_read_ext_abilities()
1047 if (val & MDIO_PMA_EXTABLE_NBT) { in genphy_c45_pma_read_ext_abilities()
1048 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_pma_read_ext_abilities()
1050 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1051 return val; in genphy_c45_pma_read_ext_abilities()
1055 val & MDIO_PMA_NG_EXTABLE_2_5GBT); in genphy_c45_pma_read_ext_abilities()
1059 val & MDIO_PMA_NG_EXTABLE_5GBT); in genphy_c45_pma_read_ext_abilities()
1062 if (val & MDIO_PMA_EXTABLE_BT1) { in genphy_c45_pma_read_ext_abilities()
1063 val = genphy_c45_pma_baset1_read_abilities(phydev); in genphy_c45_pma_read_ext_abilities()
1064 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1065 return val; in genphy_c45_pma_read_ext_abilities()
1085 int val; in genphy_c45_pma_read_abilities() local
1089 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_pma_read_abilities()
1090 if (val < 0) in genphy_c45_pma_read_abilities()
1091 return val; in genphy_c45_pma_read_abilities()
1093 if (val & MDIO_AN_STAT1_ABLE) in genphy_c45_pma_read_abilities()
1098 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT2); in genphy_c45_pma_read_abilities()
1099 if (val < 0) in genphy_c45_pma_read_abilities()
1100 return val; in genphy_c45_pma_read_abilities()
1104 val & MDIO_PMA_STAT2_10GBSR); in genphy_c45_pma_read_abilities()
1108 val & MDIO_PMA_STAT2_10GBLR); in genphy_c45_pma_read_abilities()
1112 val & MDIO_PMA_STAT2_10GBER); in genphy_c45_pma_read_abilities()
1114 if (val & MDIO_PMA_STAT2_EXTABLE) { in genphy_c45_pma_read_abilities()
1115 val = genphy_c45_pma_read_ext_abilities(phydev); in genphy_c45_pma_read_abilities()
1116 if (val < 0) in genphy_c45_pma_read_abilities()
1117 return val; in genphy_c45_pma_read_abilities()
1352 u16 val = 0; in genphy_c45_plca_set_cfg() local
1382 val = ret; in genphy_c45_plca_set_cfg()
1386 val = (val & ~MDIO_OATC14_PLCA_NCNT) | in genphy_c45_plca_set_cfg()
1390 val = (val & ~MDIO_OATC14_PLCA_ID) | in genphy_c45_plca_set_cfg()
1394 MDIO_OATC14_PLCA_CTRL1, val); in genphy_c45_plca_set_cfg()
1422 val = ret; in genphy_c45_plca_set_cfg()
1426 val = (val & ~MDIO_OATC14_PLCA_MAXBC) | in genphy_c45_plca_set_cfg()
1430 val = (val & ~MDIO_OATC14_PLCA_BTMR) | in genphy_c45_plca_set_cfg()
1434 MDIO_OATC14_PLCA_BURST, val); in genphy_c45_plca_set_cfg()