14 #define PHY_ID_LAN87XX				0x0007c150
15 #define PHY_ID_LAN937X				0x0007c180
16 #define PHY_ID_LAN887X				0x0007c1f0
19 #define LAN87XX_EXT_REG_CTL                     (0x14)
20 #define LAN87XX_EXT_REG_CTL_RD_CTL              (0x1000)
21 #define LAN87XX_EXT_REG_CTL_WR_CTL              (0x0800)
23 #define LAN87XX_REG_ADDR_MASK			GENMASK(7, 0)
26 #define LAN87XX_EXT_REG_RD_DATA                 (0x15)
29 #define LAN87XX_EXT_REG_WR_DATA                 (0x16)
32 #define LAN87XX_INTERRUPT_SOURCE                (0x18)
33 #define LAN87XX_INTERRUPT_SOURCE_2              (0x08)
36 #define LAN87XX_INTERRUPT_MASK                  (0x19)
37 #define LAN87XX_MASK_LINK_UP                    (0x0004)
38 #define LAN87XX_MASK_LINK_DOWN                  (0x0002)
40 #define LAN87XX_INTERRUPT_MASK_2                (0x09)
44 #define LAN87XX_CTRL_1                          (0x11)
45 #define LAN87XX_MASK_RGMII_TXC_DLY_EN           (0x4000)
46 #define LAN87XX_MASK_RGMII_RXC_DLY_EN           (0x2000)
49 #define	PHYACC_ATTR_MODE_READ		0
54 #define	PHYACC_ATTR_BANK_SMI		0
62 #define	LAN87XX_CABLE_TEST_OK		0
67 #define T1_AFE_PORT_CFG1_REG		0x0B
68 #define T1_POWER_DOWN_CONTROL_REG	0x1A
69 #define T1_SLV_FD_MULT_CFG_REG		0x18
70 #define T1_CDR_CFG_PRE_LOCK_REG		0x05
71 #define T1_CDR_CFG_POST_LOCK_REG	0x06
72 #define T1_LCK_STG2_MUFACT_CFG_REG	0x1A
73 #define T1_LCK_STG3_MUFACT_CFG_REG	0x1B
74 #define T1_POST_LCK_MUFACT_CFG_REG	0x1C
75 #define T1_TX_RX_FIFO_CFG_REG		0x02
76 #define T1_TX_LPF_FIR_CFG_REG		0x55
77 #define T1_COEF_CLK_PWR_DN_CFG		0x04
78 #define T1_COEF_RW_CTL_CFG		0x0D
79 #define T1_SQI_CONFIG_REG		0x2E
80 #define T1_SQI_CONFIG2_REG		0x4A
81 #define T1_DCQ_SQI_REG			0xC3
83 #define T1_MDIO_CONTROL2_REG		0x10
84 #define T1_INTERRUPT_SOURCE_REG		0x18
85 #define T1_INTERRUPT2_SOURCE_REG	0x08
86 #define T1_EQ_FD_STG1_FRZ_CFG		0x69
87 #define T1_EQ_FD_STG2_FRZ_CFG		0x6A
88 #define T1_EQ_FD_STG3_FRZ_CFG		0x6B
89 #define T1_EQ_FD_STG4_FRZ_CFG		0x6C
90 #define T1_EQ_WT_FD_LCK_FRZ_CFG		0x6D
91 #define T1_PST_EQ_LCK_STG1_FRZ_CFG	0x6E
93 #define T1_MODE_STAT_REG		0x11
94 #define T1_LINK_UP_MSK			BIT(0)
97 #define LAN87XX_MAX_SQI			0x07
100 #define LAN887X_PMA_EXT_ABILITY_2		0x12
102 #define LAN887X_PMA_EXT_ABILITY_2_100T1		BIT(0)
105 #define LAN887x_CDR_CONFIG1_100			0x0405
106 #define LAN887x_LOCK1_EQLSR_CONFIG_100		0x0411
107 #define LAN887x_SLV_HD_MUFAC_CONFIG_100		0x0417
108 #define LAN887x_PLOCK_MUFAC_CONFIG_100		0x041c
109 #define LAN887x_PROT_DISABLE_100		0x0425
110 #define LAN887x_KF_LOOP_SAT_CONFIG_100		0x0454
113 #define LAN887X_LOCK1_EQLSR_CONFIG		0x0811
114 #define LAN887X_LOCK3_EQLSR_CONFIG		0x0813
115 #define LAN887X_PROT_DISABLE			0x0825
116 #define LAN887X_FFE_GAIN6			0x0843
117 #define LAN887X_FFE_GAIN7			0x0844
118 #define LAN887X_FFE_GAIN8			0x0845
119 #define LAN887X_FFE_GAIN9			0x0846
120 #define LAN887X_ECHO_DELAY_CONFIG		0x08ec
121 #define LAN887X_FFE_MAX_CONFIG			0x08ee
124 #define LAN887X_SCR_CONFIG_3			0x8043
125 #define LAN887X_INFO_FLD_CONFIG_5		0x8048
128 #define LAN887X_ZQCAL_CONTROL_1			0x8080
129 #define LAN887X_AFE_PORT_TESTBUS_CTRL2		0x8089
130 #define LAN887X_AFE_PORT_TESTBUS_CTRL4		0x808b
131 #define LAN887X_AFE_PORT_TESTBUS_CTRL6		0x808d
132 #define LAN887X_TX_AMPLT_1000T1_REG		0x80b0
133 #define LAN887X_INIT_COEFF_DFE1_100		0x0422
136 #define LAN887X_DSP_PMA_CONTROL			0x810e
140 #define LAN887X_IDLE_ERR_TIMER_WIN		0x8204
141 #define LAN887X_IDLE_ERR_CNT_THRESH		0x8213
144 #define LAN887X_REG_REG26			0x001a
148 #define LAN887X_MIS_CFG_REG0			0xa00
150 #define LAN887X_MIS_CFG_REG0_MAC_MODE_SEL	GENMASK(1, 0)
152 #define LAN887X_MAC_MODE_RGMII			0x01
153 #define LAN887X_MAC_MODE_SGMII			0x03
155 #define LAN887X_MIS_DLL_CFG_REG0		0xa01
156 #define LAN887X_MIS_DLL_CFG_REG1		0xa02
159 #define LAN887X_MIS_DLL_EN			BIT(0)
163 #define LAN887X_MIS_CFG_REG2			0xa03
166 #define LAN887X_MIS_PKT_STAT_REG0		0xa06
167 #define LAN887X_MIS_PKT_STAT_REG1		0xa07
168 #define LAN887X_MIS_PKT_STAT_REG3		0xa09
169 #define LAN887X_MIS_PKT_STAT_REG4		0xa0a
170 #define LAN887X_MIS_PKT_STAT_REG5		0xa0b
171 #define LAN887X_MIS_PKT_STAT_REG6		0xa0c
174 #define LAN887X_COMMON_LED3_LED2		0xc05
175 #define LAN887X_COMMON_LED2_MODE_SEL_MASK	GENMASK(4, 0)
176 #define LAN887X_LED_LINK_ACT_ANY_SPEED		0x0
179 #define LAN887X_CHIP_HARD_RST			0xf03e
180 #define LAN887X_CHIP_HARD_RST_RESET		BIT(0)
182 #define LAN887X_CHIP_SOFT_RST			0xf03f
183 #define LAN887X_CHIP_SOFT_RST_RESET		BIT(0)
185 #define LAN887X_SGMII_CTL			0xf01a
186 #define LAN887X_SGMII_CTL_SGMII_MUX_EN		BIT(0)
188 #define LAN887X_SGMII_PCS_CFG			0xf034
191 #define LAN887X_EFUSE_READ_DAT9			0xf209
193 #define LAN887X_EFUSE_READ_DAT9_MAC_MODE	GENMASK(1, 0)
195 #define LAN887X_CALIB_CONFIG_100		0x437
204 #define LAN887X_MAX_PGA_GAIN_100		0x44f
205 #define LAN887X_MIN_PGA_GAIN_100		0x450
206 #define LAN887X_START_CBL_DIAG_100		0x45a
208 #define LAN887X_CBL_DIAG_START			BIT(0)
209 #define LAN887X_CBL_DIAG_STOP			0x0
211 #define LAN887X_CBL_DIAG_TDR_THRESH_100		0x45b
212 #define LAN887X_CBL_DIAG_AGC_THRESH_100		0x45c
213 #define LAN887X_CBL_DIAG_MIN_WAIT_CONFIG_100	0x45d
214 #define LAN887X_CBL_DIAG_MAX_WAIT_CONFIG_100	0x45e
215 #define LAN887X_CBL_DIAG_CYC_CONFIG_100		0x45f
216 #define LAN887X_CBL_DIAG_TX_PULSE_CONFIG_100	0x460
217 #define LAN887X_CBL_DIAG_MIN_PGA_GAIN_100	0x462
218 #define LAN887X_CBL_DIAG_AGC_GAIN_100		0x497
219 #define LAN887X_CBL_DIAG_POS_PEAK_VALUE_100	0x499
220 #define LAN887X_CBL_DIAG_NEG_PEAK_VALUE_100	0x49a
221 #define LAN887X_CBL_DIAG_POS_PEAK_TIME_100	0x49c
222 #define LAN887X_CBL_DIAG_NEG_PEAK_TIME_100	0x49d
230 #define LAN887X_INT_STS				0xf000
231 #define LAN887X_INT_MSK				0xf001
234 #define LAN887X_INT_MSK_LINK_DOWN_MSK		BIT(0)
242 #define LAN887X_COEFF_PWR_DN_CONFIG_100		0x0404
243 #define LAN887X_COEFF_PWR_DN_CONFIG_100_V	0x16d6
244 #define LAN887X_SQI_CONFIG_100			0x042e
245 #define LAN887X_SQI_CONFIG_100_V		0x9572
246 #define LAN887X_SQI_MSE_100			0x483
248 #define LAN887X_POKE_PEEK_100			0x040d
249 #define LAN887X_POKE_PEEK_100_EN		BIT(0)
251 #define LAN887X_COEFF_MOD_CONFIG		0x080d
254 #define LAN887X_DCQ_SQI_STATUS			0x08b2
327 	int rc = 0;  in lan937x_dsp_workaround()
333 	if (rc < 0)  in lan937x_dsp_workaround()
358 	u16 ereg = 0;  in access_ereg()
359 	int rc = 0;  in access_ereg()
375 		if (rc < 0)  in access_ereg()
386 		if (rc < 0)  in access_ereg()
391 	if (rc < 0)  in access_ereg()
403 	int new = 0, rc = 0;  in access_ereg_modify_changed()
409 	if (rc < 0)  in access_ereg_modify_changed()
412 	new = val | (rc & (mask ^ 0xFFFF));  in access_ereg_modify_changed()
432 		return 0;  in lan87xx_config_rgmii_delay()
435 			 PHYACC_ATTR_BANK_MISC, LAN87XX_CTRL_1, 0);  in lan87xx_config_rgmii_delay()
436 	if (rc < 0)  in lan87xx_config_rgmii_delay()
457 		return 0;  in lan87xx_config_rgmii_delay()
469 	for (i = 0; i < cnt; i++) {  in lan87xx_phy_init_cmd()
481 		if (ret < 0)  in lan87xx_phy_init_cmd()
493 		  T1_AFE_PORT_CFG1_REG,       0x002D,  0 },  in lan87xx_phy_init()
496 		  T1_POWER_DOWN_CONTROL_REG,  0x0308,  0 },  in lan87xx_phy_init()
502 		  T1_EQ_FD_STG1_FRZ_CFG,     0x0002,  0 },  in lan87xx_phy_init()
504 		  T1_EQ_FD_STG2_FRZ_CFG,     0x0002,  0 },  in lan87xx_phy_init()
506 		  T1_EQ_FD_STG3_FRZ_CFG,     0x0002,  0 },  in lan87xx_phy_init()
508 		  T1_EQ_FD_STG4_FRZ_CFG,     0x0002,  0 },  in lan87xx_phy_init()
510 		  T1_EQ_WT_FD_LCK_FRZ_CFG,    0x0002,  0 },  in lan87xx_phy_init()
512 		  T1_PST_EQ_LCK_STG1_FRZ_CFG, 0x0002,  0 },  in lan87xx_phy_init()
518 		  T1_SLV_FD_MULT_CFG_REG,     0x0D53,  0 },  in lan87xx_phy_init()
521 		  T1_CDR_CFG_PRE_LOCK_REG,    0x0AB2,  0 },  in lan87xx_phy_init()
523 		  T1_CDR_CFG_POST_LOCK_REG,   0x0AB3,  0 },  in lan87xx_phy_init()
526 		  T1_LCK_STG2_MUFACT_CFG_REG, 0x0AEA,  0 },  in lan87xx_phy_init()
528 		  T1_LCK_STG3_MUFACT_CFG_REG, 0x0AEB,  0 },  in lan87xx_phy_init()
530 		  T1_POST_LCK_MUFACT_CFG_REG, 0x0AEB,  0 },  in lan87xx_phy_init()
533 		  T1_TX_RX_FIFO_CFG_REG, 0x1C00, 0 },  in lan87xx_phy_init()
536 		  T1_TX_LPF_FIR_CFG_REG, 0x1000, 0 },  in lan87xx_phy_init()
538 		  T1_TX_LPF_FIR_CFG_REG, 0x1861, 0 },  in lan87xx_phy_init()
540 		  T1_TX_LPF_FIR_CFG_REG, 0x1061, 0 },  in lan87xx_phy_init()
542 		  T1_TX_LPF_FIR_CFG_REG, 0x1922, 0 },  in lan87xx_phy_init()
544 		  T1_TX_LPF_FIR_CFG_REG, 0x1122, 0 },  in lan87xx_phy_init()
546 		  T1_TX_LPF_FIR_CFG_REG, 0x1983, 0 },  in lan87xx_phy_init()
548 		  T1_TX_LPF_FIR_CFG_REG, 0x1183, 0 },  in lan87xx_phy_init()
550 		  T1_TX_LPF_FIR_CFG_REG, 0x1944, 0 },  in lan87xx_phy_init()
552 		  T1_TX_LPF_FIR_CFG_REG, 0x1144, 0 },  in lan87xx_phy_init()
554 		  T1_TX_LPF_FIR_CFG_REG, 0x18c5, 0 },  in lan87xx_phy_init()
556 		  T1_TX_LPF_FIR_CFG_REG, 0x10c5, 0 },  in lan87xx_phy_init()
558 		  T1_TX_LPF_FIR_CFG_REG, 0x1846, 0 },  in lan87xx_phy_init()
560 		  T1_TX_LPF_FIR_CFG_REG, 0x1046, 0 },  in lan87xx_phy_init()
562 		  T1_TX_LPF_FIR_CFG_REG, 0x1807, 0 },  in lan87xx_phy_init()
564 		  T1_TX_LPF_FIR_CFG_REG, 0x1007, 0 },  in lan87xx_phy_init()
566 		  T1_TX_LPF_FIR_CFG_REG, 0x1808, 0 },  in lan87xx_phy_init()
568 		  T1_TX_LPF_FIR_CFG_REG, 0x1008, 0 },  in lan87xx_phy_init()
570 		  T1_TX_LPF_FIR_CFG_REG, 0x1809, 0 },  in lan87xx_phy_init()
572 		  T1_TX_LPF_FIR_CFG_REG, 0x1009, 0 },  in lan87xx_phy_init()
574 		  T1_TX_LPF_FIR_CFG_REG, 0x180A, 0 },  in lan87xx_phy_init()
576 		  T1_TX_LPF_FIR_CFG_REG, 0x100A, 0 },  in lan87xx_phy_init()
578 		  T1_TX_LPF_FIR_CFG_REG, 0x180B, 0 },  in lan87xx_phy_init()
580 		  T1_TX_LPF_FIR_CFG_REG, 0x100B, 0 },  in lan87xx_phy_init()
582 		  T1_TX_LPF_FIR_CFG_REG, 0x180C, 0 },  in lan87xx_phy_init()
584 		  T1_TX_LPF_FIR_CFG_REG, 0x100C, 0 },  in lan87xx_phy_init()
586 		  T1_TX_LPF_FIR_CFG_REG, 0x180D, 0 },  in lan87xx_phy_init()
588 		  T1_TX_LPF_FIR_CFG_REG, 0x100D, 0 },  in lan87xx_phy_init()
590 		  T1_TX_LPF_FIR_CFG_REG, 0x180E, 0 },  in lan87xx_phy_init()
592 		  T1_TX_LPF_FIR_CFG_REG, 0x100E, 0 },  in lan87xx_phy_init()
594 		  T1_TX_LPF_FIR_CFG_REG, 0x180F, 0 },  in lan87xx_phy_init()
596 		  T1_TX_LPF_FIR_CFG_REG, 0x100F, 0 },  in lan87xx_phy_init()
598 		  T1_TX_LPF_FIR_CFG_REG, 0x1810, 0 },  in lan87xx_phy_init()
600 		  T1_TX_LPF_FIR_CFG_REG, 0x1010, 0 },  in lan87xx_phy_init()
602 		  T1_TX_LPF_FIR_CFG_REG, 0x1811, 0 },  in lan87xx_phy_init()
604 		  T1_TX_LPF_FIR_CFG_REG, 0x1011, 0 },  in lan87xx_phy_init()
606 		  T1_TX_LPF_FIR_CFG_REG, 0x1000, 0 },  in lan87xx_phy_init()
609 		  T1_COEF_CLK_PWR_DN_CFG,	0x16d6, 0 },  in lan87xx_phy_init()
612 		  T1_SQI_CONFIG_REG,		0x9572, 0 },  in lan87xx_phy_init()
615 		  T1_SQI_CONFIG2_REG,		0x0001, 0 },  in lan87xx_phy_init()
618 		  T1_COEF_RW_CTL_CFG,		0x0301,	0 },  in lan87xx_phy_init()
620 		  T1_DCQ_SQI_REG,		0,	0 },  in lan87xx_phy_init()
623 		  T1_MDIO_CONTROL2_REG,		0x0014, 0 },  in lan87xx_phy_init()
626 		  T1_POWER_DOWN_CONTROL_REG,	0x0200, 0 },  in lan87xx_phy_init()
629 		  T1_MDIO_CONTROL2_REG,		0x0094, 0 },  in lan87xx_phy_init()
632 		  T1_MDIO_CONTROL2_REG,		0x0080, 0 },  in lan87xx_phy_init()
633 		/* Tx AMP - 0x06  */  in lan87xx_phy_init()
635 		  T1_AFE_PORT_CFG1_REG,		0x000C, 0 },  in lan87xx_phy_init()
638 		  T1_INTERRUPT_SOURCE_REG,	0,	0 },  in lan87xx_phy_init()
641 		  T1_INTERRUPT2_SOURCE_REG,	0,	0 },  in lan87xx_phy_init()
644 		  T1_POWER_DOWN_CONTROL_REG,	0x0300, 0 },  in lan87xx_phy_init()
650 	if (rc < 0)  in lan87xx_phy_init()
655 	if (rc < 0)  in lan87xx_phy_init()
668 		if (rc < 0)  in lan87xx_phy_init()
673 	if (rc < 0)  in lan87xx_phy_init()
681 	int rc, val = 0;  in lan87xx_phy_config_intr()
686 		if (rc < 0)  in lan87xx_phy_config_intr()
690 		if (rc < 0)  in lan87xx_phy_config_intr()
696 		if (rc < 0)  in lan87xx_phy_config_intr()
701 				 LAN87XX_INTERRUPT_SOURCE_2, 0);  in lan87xx_phy_config_intr()
702 		if (rc < 0)  in lan87xx_phy_config_intr()
708 		if (rc < 0)  in lan87xx_phy_config_intr()
717 		if (rc < 0)  in lan87xx_phy_config_intr()
721 		if (rc < 0)  in lan87xx_phy_config_intr()
727 		if (rc < 0)  in lan87xx_phy_config_intr()
732 				 LAN87XX_INTERRUPT_SOURCE_2, 0);  in lan87xx_phy_config_intr()
735 	return rc < 0 ? rc : 0;  in lan87xx_phy_config_intr()
744 				  LAN87XX_INTERRUPT_SOURCE_2, 0);  in lan87xx_handle_interrupt()
745 	if (irq_status < 0) {  in lan87xx_handle_interrupt()
751 	if (irq_status < 0) {  in lan87xx_handle_interrupt()
756 	if (irq_status == 0)  in lan87xx_handle_interrupt()
768 	return rc < 0 ? rc : 0;  in lan87xx_config_init()
779 	if (bmcr < 0)  in microchip_cable_test_start_common()
784 	if (bmsr < 0)  in microchip_cable_test_start_common()
788 		ret =  phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);  in microchip_cable_test_start_common()
789 		if (ret < 0)  in microchip_cable_test_start_common()
792 		if (ret < 0)  in microchip_cable_test_start_common()
800 	return 0;  in microchip_cable_test_start_common()
808 		 0, 0},  in lan87xx_cable_test_start()
811 		 10, 0},  in lan87xx_cable_test_start()
814 		 90, 0},  in lan87xx_cable_test_start()
817 		 60, 0},  in lan87xx_cable_test_start()
820 		 31, 0},  in lan87xx_cable_test_start()
823 		 0, 0x0038},  in lan87xx_cable_test_start()
826 		 70, 0},  in lan87xx_cable_test_start()
829 		 1, 0},  in lan87xx_cable_test_start()
834 	if (rc < 0)  in lan87xx_cable_test_start()
840 			 0x00, 0);  in lan87xx_cable_test_start()
841 	if (rc < 0)  in lan87xx_cable_test_start()
846 			 0x0A, 0);  in lan87xx_cable_test_start()
847 	if (rc < 0)  in lan87xx_cable_test_start()
850 	if ((rc & 0x4000) != 0x4000) {  in lan87xx_cable_test_start()
853 						0x0E, 0x5, 0x7);  in lan87xx_cable_test_start()
854 		if (rc < 0)  in lan87xx_cable_test_start()
857 						0x1A, 0x8, 0x8);  in lan87xx_cable_test_start()
858 		if (rc < 0)  in lan87xx_cable_test_start()
863 						0x10, 0x8, 0x40);  in lan87xx_cable_test_start()
864 		if (rc < 0)  in lan87xx_cable_test_start()
868 	for (i = 0; i < ARRAY_SIZE(cable_test); i++) {  in lan87xx_cable_test_start()
883 		if (rc < 0)  in lan87xx_cable_test_start()
888 	return 0;  in lan87xx_cable_test_start()
908 	int pos_peak_cycle = 0, pos_peak_in_phases = 0, pos_peak_phase = 0;  in lan87xx_cable_test_report()
909 	int neg_peak_cycle = 0, neg_peak_in_phases = 0, neg_peak_phase = 0;  in lan87xx_cable_test_report()
913 	int gain_idx = 0, pos_peak = 0, neg_peak = 0;  in lan87xx_cable_test_report()
914 	int pos_peak_time = 0, neg_peak_time = 0;  in lan87xx_cable_test_report()
915 	int pos_peak_in_phases_hybrid = 0;  in lan87xx_cable_test_report()
919 			       PHYACC_ATTR_BANK_DSP, 151, 0);  in lan87xx_cable_test_report()
922 			       PHYACC_ATTR_BANK_DSP, 153, 0);  in lan87xx_cable_test_report()
924 			       PHYACC_ATTR_BANK_DSP, 154, 0);  in lan87xx_cable_test_report()
926 				    PHYACC_ATTR_BANK_DSP, 156, 0);  in lan87xx_cable_test_report()
928 				    PHYACC_ATTR_BANK_DSP, 157, 0);  in lan87xx_cable_test_report()
930 	pos_peak_cycle = (pos_peak_time >> 7) & 0x7F;  in lan87xx_cable_test_report()
932 	pos_peak_phase = pos_peak_time & 0x7F;  in lan87xx_cable_test_report()
934 	neg_peak_cycle = (neg_peak_time >> 7) & 0x7F;  in lan87xx_cable_test_report()
935 	neg_peak_phase = neg_peak_time & 0x7F;  in lan87xx_cable_test_report()
956 	    gain_idx >= 0) {  in lan87xx_cable_test_report()
962 		detect = 0;  in lan87xx_cable_test_report()
973 	int rc = 0;  in lan87xx_cable_test_get_status()
979 			 90, 0);  in lan87xx_cable_test_get_status()
980 	if (rc < 0)  in lan87xx_cable_test_get_status()
987 				 90, 0);  in lan87xx_cable_test_get_status()
988 		if (rc < 0)  in lan87xx_cable_test_get_status()
996 	return 0;  in lan87xx_cable_test_get_status()
1001 	int rc = 0;  in lan87xx_read_status()
1004 	if (rc < 0)  in lan87xx_read_status()
1010 		phydev->link = 0;  in lan87xx_read_status()
1014 	phydev->pause = 0;  in lan87xx_read_status()
1015 	phydev->asym_pause = 0;  in lan87xx_read_status()
1018 	if (rc < 0)  in lan87xx_read_status()
1022 	if (rc < 0)  in lan87xx_read_status()
1030 	u16 ctl = 0;  in lan87xx_config_aneg()
1041 		return 0;  in lan87xx_config_aneg()
1056 	u8 sqi_value = 0;  in lan87xx_get_sqi()
1060 			 PHYACC_ATTR_BANK_DSP, T1_COEF_RW_CTL_CFG, 0x0301);  in lan87xx_get_sqi()
1061 	if (rc < 0)  in lan87xx_get_sqi()
1065 			 PHYACC_ATTR_BANK_DSP, T1_DCQ_SQI_REG, 0x0);  in lan87xx_get_sqi()
1066 	if (rc < 0)  in lan87xx_get_sqi()
1087 	if (ret < 0)  in lan887x_rgmii_init()
1094 	if (ret < 0)  in lan887x_rgmii_init()
1101 	if (ret < 0)  in lan887x_rgmii_init()
1121 	if (ret < 0)  in lan887x_sgmii_init()
1128 	if (ret < 0)  in lan887x_sgmii_init()
1136 	if (ret < 0)  in lan887x_sgmii_init()
1151 	if (ret < 0)  in lan887x_config_rgmii_en()
1156 	if (txc < 0)  in lan887x_config_rgmii_en()
1161 	if (rxc < 0)  in lan887x_config_rgmii_en()
1192 		return 0;  in lan887x_config_rgmii_en()
1198 	if (ret < 0)  in lan887x_config_rgmii_en()
1214 	if (ret < 0)  in lan887x_config_phy_interface()
1256 	if (ret < 0)  in lan887x_get_features()
1267 	return 0;  in lan887x_get_features()
1278 	if (ret < 0)  in lan887x_phy_init()
1288 	if (ret < 0)  in lan887x_phy_init()
1300 	for (int i = 0; i < cnt; i++) {  in lan887x_phy_config()
1303 		if (ret < 0)  in lan887x_phy_config()
1307 	return 0;  in lan887x_phy_config()
1314 		{MDIO_MMD_PMAPMD, LAN887X_ZQCAL_CONTROL_1, 0x4008},  in lan887x_phy_setup()
1315 		{MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL2, 0x0000},  in lan887x_phy_setup()
1316 		{MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL6, 0x0040},  in lan887x_phy_setup()
1318 		{MDIO_MMD_PCS,	  LAN887X_IDLE_ERR_CNT_THRESH, 0x0008},  in lan887x_phy_setup()
1319 		{MDIO_MMD_PCS,	  LAN887X_IDLE_ERR_TIMER_WIN, 0x800d},  in lan887x_phy_setup()
1321 		{MDIO_MMD_VEND1,  LAN887x_CDR_CONFIG1_100, 0x0ab1},  in lan887x_phy_setup()
1322 		{MDIO_MMD_VEND1,  LAN887x_LOCK1_EQLSR_CONFIG_100, 0x5274},  in lan887x_phy_setup()
1323 		{MDIO_MMD_VEND1,  LAN887x_SLV_HD_MUFAC_CONFIG_100, 0x0d74},  in lan887x_phy_setup()
1324 		{MDIO_MMD_VEND1,  LAN887x_PLOCK_MUFAC_CONFIG_100, 0x0aea},  in lan887x_phy_setup()
1325 		{MDIO_MMD_VEND1,  LAN887x_PROT_DISABLE_100, 0x0360},  in lan887x_phy_setup()
1326 		{MDIO_MMD_VEND1,  LAN887x_KF_LOOP_SAT_CONFIG_100, 0x0c30},  in lan887x_phy_setup()
1328 		{MDIO_MMD_VEND1,  LAN887X_LOCK1_EQLSR_CONFIG, 0x2a78},  in lan887x_phy_setup()
1329 		{MDIO_MMD_VEND1,  LAN887X_LOCK3_EQLSR_CONFIG, 0x1368},  in lan887x_phy_setup()
1330 		{MDIO_MMD_VEND1,  LAN887X_PROT_DISABLE, 0x1354},  in lan887x_phy_setup()
1331 		{MDIO_MMD_VEND1,  LAN887X_FFE_GAIN6, 0x3C84},  in lan887x_phy_setup()
1332 		{MDIO_MMD_VEND1,  LAN887X_FFE_GAIN7, 0x3ca5},  in lan887x_phy_setup()
1333 		{MDIO_MMD_VEND1,  LAN887X_FFE_GAIN8, 0x3ca5},  in lan887x_phy_setup()
1334 		{MDIO_MMD_VEND1,  LAN887X_FFE_GAIN9, 0x3ca5},  in lan887x_phy_setup()
1335 		{MDIO_MMD_VEND1,  LAN887X_ECHO_DELAY_CONFIG, 0x0024},  in lan887x_phy_setup()
1336 		{MDIO_MMD_VEND1,  LAN887X_FFE_MAX_CONFIG, 0x227f},  in lan887x_phy_setup()
1338 		{MDIO_MMD_PCS,    LAN887X_SCR_CONFIG_3, 0x1e00},  in lan887x_phy_setup()
1339 		{MDIO_MMD_PCS,    LAN887X_INFO_FLD_CONFIG_5, 0x0fa1},  in lan887x_phy_setup()
1353 			{MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL4, 0x00b8},  in lan887x_100M_setup()
1354 			{MDIO_MMD_PMAPMD, LAN887X_TX_AMPLT_1000T1_REG, 0x0038},  in lan887x_100M_setup()
1355 			{MDIO_MMD_VEND1,  LAN887X_INIT_COEFF_DFE1_100, 0x000f},  in lan887x_100M_setup()
1361 			{MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL4, 0x0038},  in lan887x_100M_setup()
1362 			{MDIO_MMD_VEND1, LAN887X_INIT_COEFF_DFE1_100, 0x0014},  in lan887x_100M_setup()
1367 	if (ret < 0)  in lan887x_100M_setup()
1377 		{MDIO_MMD_PMAPMD, LAN887X_TX_AMPLT_1000T1_REG, 0x003f},  in lan887x_1000M_setup()
1378 		{MDIO_MMD_PMAPMD, LAN887X_AFE_PORT_TESTBUS_CTRL4, 0x00b8},  in lan887x_1000M_setup()
1384 	if (ret < 0)  in lan887x_1000M_setup()
1413 	if (ret < 0)  in lan887x_phy_reset()
1419 	if (ret < 0)  in lan887x_phy_reset()
1425 	if (ret < 0)  in lan887x_phy_reset()
1430 	if (ret < 0)  in lan887x_phy_reset()
1445 	if (ret < 0)  in lan887x_phy_reconfig()
1459 	if (ret < 0)  in lan887x_config_aneg()
1490 	if (val < 0) {  in lan887x_get_stat()
1504 	for (int i = 0; i < ARRAY_SIZE(lan887x_hw_stats); i++)  in lan887x_get_stats()
1515 	for (int i = 0; i < ARRAY_SIZE(lan887x_hw_stats); i++)  in lan887x_get_strings()
1526 		if (rc < 0)  in lan887x_config_intr()
1534 				   GENMASK(15, 0));  in lan887x_config_intr()
1535 		if (rc < 0)  in lan887x_config_intr()
1541 	return rc < 0 ? rc : 0;  in lan887x_config_intr()
1549 	if (irq_status < 0) {  in lan887x_handle_interrupt()
1571 	if (rc < 0)  in lan887x_cd_reset()
1579 	if (rc < 0)  in lan887x_cd_reset()
1585 		if (rc < 0)  in lan887x_cd_reset()
1589 		if (rc < 0)  in lan887x_cd_reset()
1593 		if (rc < 0)  in lan887x_cd_reset()
1597 		if (rc < 0)  in lan887x_cd_reset()
1601 	return 0;  in lan887x_cd_reset()
1608 		{MDIO_MMD_VEND1, LAN887X_MAX_PGA_GAIN_100, 0x1f},  in lan887x_cable_test_prep()
1609 		{MDIO_MMD_VEND1, LAN887X_MIN_PGA_GAIN_100, 0x0},  in lan887x_cable_test_prep()
1610 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_TDR_THRESH_100, 0x1},  in lan887x_cable_test_prep()
1611 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_AGC_THRESH_100, 0x3c},  in lan887x_cable_test_prep()
1612 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_MIN_WAIT_CONFIG_100, 0x0},  in lan887x_cable_test_prep()
1613 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_MAX_WAIT_CONFIG_100, 0x46},  in lan887x_cable_test_prep()
1614 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_CYC_CONFIG_100, 0x5a},  in lan887x_cable_test_prep()
1615 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_TX_PULSE_CONFIG_100, 0x44d5},  in lan887x_cable_test_prep()
1616 		{MDIO_MMD_VEND1, LAN887X_CBL_DIAG_MIN_PGA_GAIN_100, 0x0},  in lan887x_cable_test_prep()
1622 	if (rc < 0)  in lan887x_cable_test_prep()
1630 	if (rc < 0)  in lan887x_cable_test_prep()
1633 	rc = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, 0x80b0, 0x0038);  in lan887x_cable_test_prep()
1634 	if (rc < 0)  in lan887x_cable_test_prep()
1638 			    LAN887X_CALIB_CONFIG_100, 0,  in lan887x_cable_test_prep()
1640 	if (rc < 0)  in lan887x_cable_test_prep()
1643 	for (int i = 0; i < ARRAY_SIZE(values); i++) {  in lan887x_cable_test_prep()
1646 		if (rc < 0)  in lan887x_cable_test_prep()
1652 					   values[i].reg, 0xa);  in lan887x_cable_test_prep()
1653 			if (rc < 0)  in lan887x_cable_test_prep()
1661 				    BIT(0), BIT(0));  in lan887x_cable_test_prep()
1662 		if (rc < 0)  in lan887x_cable_test_prep()
1670 	if (rc < 0)  in lan887x_cable_test_prep()
1702 		if (rc < 0)  in lan887x_cable_test_chk()
1707 		if (rc < 0)  in lan887x_cable_test_chk()
1725 	if (rc < 0) {  in lan887x_cable_test_start()
1727 		if (ret < 0)  in lan887x_cable_test_start()
1733 	return 0;  in lan887x_cable_test_start()
1754 	if (gain_idx < 0) {  in lan887x_cable_test_report()
1761 	if (pos_peak < 0) {  in lan887x_cable_test_report()
1768 	if (neg_peak < 0) {  in lan887x_cable_test_report()
1775 	if (pos_peak_time < 0) {  in lan887x_cable_test_report()
1782 	if (neg_peak_time < 0) {  in lan887x_cable_test_report()
1788 	pos_peak_cycle = (pos_peak_time >> 7) & 0x7f;  in lan887x_cable_test_report()
1789 	pos_peak_in_phases = (pos_peak_cycle * 96) + (pos_peak_time & 0x7f);  in lan887x_cable_test_report()
1790 	neg_peak_cycle = (neg_peak_time >> 7) & 0x7f;  in lan887x_cable_test_report()
1791 	neg_peak_in_phases = (neg_peak_cycle * 96) + (neg_peak_time & 0x7f);  in lan887x_cable_test_report()
1795 	    neg_peak > MICROCHIP_CABLE_NOISE_MARGIN && gain_idx >= 0) {  in lan887x_cable_test_report()
1801 		    pos_peak_in_phases > 0) {  in lan887x_cable_test_report()
1808 			   neg_peak_in_phases > 0) {  in lan887x_cable_test_report()
1818 		distance = 0;  in lan887x_cable_test_report()
1824 	if (rc < 0)  in lan887x_cable_test_report()
1829 	if (rc < 0)  in lan887x_cable_test_report()
1835 	if (gain_idx_hybrid < 0) {  in lan887x_cable_test_report()
1842 	if (pos_peak_time_hybrid < 0) {  in lan887x_cable_test_report()
1848 	pos_peak_cycle_hybrid = (pos_peak_time_hybrid >> 7) & 0x7f;  in lan887x_cable_test_report()
1849 	pos_peak_phase_hybrid = pos_peak_time_hybrid & 0x7f;  in lan887x_cable_test_report()
1869 		distance = 0;  in lan887x_cable_test_report()
1874 	if (rc < 0)  in lan887x_cable_test_report()
1877 	length = ((u32)distance & GENMASK(15, 0));  in lan887x_cable_test_report()
1882 	return 0;  in lan887x_cable_test_report()
1889 	if (ret < 0)  in lan887x_cable_test_report()
1895 	if (ret < 0)  in lan887x_cable_test_report()
1908 	if (rc < 0) {  in lan887x_cable_test_get_status()
1911 			return 0;  in lan887x_cable_test_get_status()
1931 	u32 sqiavg = 0;  in lan887x_get_sqi_100M()
1932 	u8 sqinum = 0;  in lan887x_get_sqi_100M()
1939 	if (rc < 0)  in lan887x_get_sqi_100M()
1944 	if (rc < 0)  in lan887x_get_sqi_100M()
1954 	if (rc < 0)  in lan887x_get_sqi_100M()
1964 	if (rc < 0)  in lan887x_get_sqi_100M()
1971 	for (i = 0; i < SQI_SAMPLES; i++) {  in lan887x_get_sqi_100M()
1975 		if (rc < 0)  in lan887x_get_sqi_100M()
1980 		if (rc < 0)  in lan887x_get_sqi_100M()
1988 	if (rc < 0)  in lan887x_get_sqi_100M()
2002 	if (sqiavg != 0) {  in lan887x_get_sqi_100M()
2021 			sqinum = 0;  in lan887x_get_sqi_100M()
2042 	if (rc < 0)  in lan887x_get_sqi()
2051 	if (rc < 0)  in lan887x_get_sqi()
2055 	if (rc < 0)  in lan887x_get_sqi()