1 // SPDX-License-Identifier: GPL-2.0+
13 #include <dt-bindings/net/microchip-lan78xx.h>
44 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {  in lan88xx_phy_config_intr()
83 	struct lan88xx_priv *priv = phydev->priv;  in lan88xx_suspend()
86 	if (!priv->wolopts)  in lan88xx_suspend()
146 	 * Write 24-bit value 0x12B00A to register. Setting MrvlTrFix1000Kf,  in lan88xx_config_TR_regs()
154 	 * Write 24-bit value 0xD2C46F to register. Setting SSTrKf1000Slv,  in lan88xx_config_TR_regs()
162 	 * Write 24-bit value 0x620 to register. Setting rem_upd_done_thresh  in lan88xx_config_TR_regs()
170 	 * Write 24-bit value 0xEEFFDD to register. Setting  in lan88xx_config_TR_regs()
179 	 * Write 24-bit value 0x071448 to register. Setting  in lan88xx_config_TR_regs()
187 	 * Write 24-bit value 0x13132F to register. Setting  in lan88xx_config_TR_regs()
195 	 * Write 24-bit value 0x0 to register. Setting eee_3level_delay,  in lan88xx_config_TR_regs()
203 	 * Write 24-bit value 0x91B06C to register. Setting  in lan88xx_config_TR_regs()
212 	 * Write 24-bit value 0xC0A028 to register. Setting  in lan88xx_config_TR_regs()
221 	 * Write 24-bit value 0x041600 to register. Setting  in lan88xx_config_TR_regs()
230 	 * Write 24-bit value 0x000004 to register. Setting TrFreeze bits.  in lan88xx_config_TR_regs()
239 	struct device *dev = &phydev->mdio.dev;  in lan88xx_probe()
246 		return -ENOMEM;  in lan88xx_probe()
248 	priv->wolopts = 0;  in lan88xx_probe()
250 	len = of_property_read_variable_u32_array(dev->of_node,  in lan88xx_probe()
251 						  "microchip,led-modes",  in lan88xx_probe()
261 				return -EINVAL;  in lan88xx_probe()
267 	} else if (len == -EOVERFLOW) {  in lan88xx_probe()
268 		return -EINVAL;  in lan88xx_probe()
272 	priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID);  in lan88xx_probe()
273 	priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV);  in lan88xx_probe()
275 	phydev->priv = priv;  in lan88xx_probe()
282 	struct device *dev = &phydev->mdio.dev;  in lan88xx_remove()
283 	struct lan88xx_priv *priv = phydev->priv;  in lan88xx_remove()
292 	struct lan88xx_priv *priv = phydev->priv;  in lan88xx_set_wol()
294 	priv->wolopts = wol->wolopts;  in lan88xx_set_wol()
304 	switch (phydev->mdix_ctrl) {  in lan88xx_set_mdix()
356 	/* Reset PHY to ensure MII_LPA provides up-to-date information. This  in lan88xx_link_change_notify()
357 	 * issue is reproducible only after parallel detection, as described  in lan88xx_link_change_notify()
358 	 * in IEEE 802.3-2022, Section 28.2.3.1 ("Parallel detection function"),  in lan88xx_link_change_notify()
359 	 * where the link partner does not support auto-negotiation.  in lan88xx_link_change_notify()
361 	if (phydev->state == PHY_NOLINK) {  in lan88xx_link_change_notify()
376 	if (!phydev->autoneg && phydev->speed == 100) {  in lan88xx_link_change_notify()
404  * lan937x_tx_read_mdix_status - Read the MDIX status for the LAN937x TX PHY.
409  * Note that MDIX status is not supported in AUTO mode, and will be set
423 		phydev->mdix_ctrl = ETH_TP_MDI_AUTO;  in lan937x_tx_read_mdix_status()
425 		phydev->mdix = ETH_TP_MDI_INVALID;  in lan937x_tx_read_mdix_status()
427 		phydev->mdix_ctrl = ETH_TP_MDI_X;  in lan937x_tx_read_mdix_status()
428 		phydev->mdix = ETH_TP_MDI_X;  in lan937x_tx_read_mdix_status()
430 		phydev->mdix_ctrl = ETH_TP_MDI;  in lan937x_tx_read_mdix_status()
431 		phydev->mdix = ETH_TP_MDI;  in lan937x_tx_read_mdix_status()
438  * lan937x_tx_read_status - Read the status for the LAN937x TX PHY.
458  * lan937x_tx_set_mdix - Set the MDIX mode for the LAN937x TX PHY.
463  * MDI (straight-through), MDIX (crossover), or AUTO (auto-MDIX). If the mode
472 	switch (phydev->mdix_ctrl) {  in lan937x_tx_set_mdix()
491  * lan937x_tx_config_aneg - Configure auto-negotiation and fixed modes for the
496  * proceeds to configure the auto-negotiation or fixed mode settings