Lines Matching +full:15 +full:db
34 #define DP83TD510E_CTRL_HW_RESET BIT(15)
43 * - DP83TD510E_PKT_STAT_1: Contains TX packet count bits [15:0].
46 * - DP83TD510E_PKT_STAT_4: Contains RX packet count bits [15:0].
61 #define DP83TD510E_MASTER_SLAVE_RESOL_FAIL BIT(15)
67 /* Register values are converted to SNR(dB) as suggested by
69 * SNR(dB) = -10 * log10 (VAL/2^17) - 1.76 dB.
74 0x0569, /* < 18dB */
75 0x044c, /* 18dB =< SNR < 19dB */
76 0x0369, /* 19dB =< SNR < 20dB */
77 0x02b6, /* 20dB =< SNR < 21dB */
78 0x0227, /* 21dB =< SNR < 22dB */
79 0x01b6, /* 22dB =< SNR < 23dB */
80 0x015b, /* 23dB =< SNR < 24dB */
81 0x0000 /* 24dB =< SNR */
136 #define DP83TD510E_TDR_START BIT(15)
187 #define DP83TD510E_TDR_TX_DURATION_US GENMASK(15, 0)
249 #define DP83TD510E_ALCD_COMPLETE BIT(15)