Lines Matching +full:enet +full:- +full:phy +full:- +full:lane +full:- +full:swap
1 // SPDX-License-Identifier: GPL-2.0
2 /* Driver for the Texas Instruments DP83869 PHY
12 #include <linux/phy.h>
16 #include <dt-bindings/net/ti-dp83869.h>
70 /* This is the same bit mask as the BMCR so re-use the BMCR default */
158 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_aneg()
160 if (dp83869->mode != DP83869_RGMII_1000_BASE) in dp83869_config_aneg()
168 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()
172 if (dp83869->mode == DP83869_RGMII_1000_BASE) in dp83869_read_status()
179 if (dp83869->mode == DP83869_RGMII_100_BASE) { in dp83869_read_status()
180 if (phydev->link) { in dp83869_read_status()
181 phydev->speed = SPEED_100; in dp83869_read_status()
183 phydev->speed = SPEED_UNKNOWN; in dp83869_read_status()
184 phydev->duplex = DUPLEX_UNKNOWN; in dp83869_read_status()
205 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in dp83869_config_intr()
261 struct net_device *ndev = phydev->attached_dev; in dp83869_set_wol()
274 if (wol->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_UCAST | in dp83869_set_wol()
279 if (wol->wolopts & WAKE_MAGIC || in dp83869_set_wol()
280 wol->wolopts & WAKE_MAGICSECURE) { in dp83869_set_wol()
281 mac = (const u8 *)ndev->dev_addr; in dp83869_set_wol()
284 return -EINVAL; in dp83869_set_wol()
309 if (wol->wolopts & WAKE_MAGICSECURE) { in dp83869_set_wol()
312 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83869_set_wol()
318 (wol->sopass[3] << 8) | wol->sopass[2]); in dp83869_set_wol()
323 (wol->sopass[5] << 8) | wol->sopass[4]); in dp83869_set_wol()
332 if (wol->wolopts & WAKE_UCAST) in dp83869_set_wol()
337 if (wol->wolopts & WAKE_BCAST) in dp83869_set_wol()
358 wol->supported = (WAKE_UCAST | WAKE_BCAST | WAKE_MAGIC | in dp83869_get_wol()
360 wol->wolopts = 0; in dp83869_get_wol()
369 wol->wolopts |= WAKE_UCAST; in dp83869_get_wol()
372 wol->wolopts |= WAKE_BCAST; in dp83869_get_wol()
375 wol->wolopts |= WAKE_MAGIC; in dp83869_get_wol()
385 wol->sopass[0] = (sopass_val & 0xff); in dp83869_get_wol()
386 wol->sopass[1] = (sopass_val >> 8); in dp83869_get_wol()
395 wol->sopass[2] = (sopass_val & 0xff); in dp83869_get_wol()
396 wol->sopass[3] = (sopass_val >> 8); in dp83869_get_wol()
405 wol->sopass[4] = (sopass_val & 0xff); in dp83869_get_wol()
406 wol->sopass[5] = (sopass_val >> 8); in dp83869_get_wol()
408 wol->wolopts |= WAKE_MAGICSECURE; in dp83869_get_wol()
412 wol->wolopts = 0; in dp83869_get_wol()
440 return -EINVAL; in dp83869_get_downshift()
453 return -EINVAL; in dp83869_set_downshift()
475 return -EINVAL; in dp83869_set_downshift()
489 switch (tuna->id) { in dp83869_get_tunable()
493 return -EOPNOTSUPP; in dp83869_get_tunable()
500 switch (tuna->id) { in dp83869_set_tunable()
504 return -EOPNOTSUPP; in dp83869_set_tunable()
510 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_port_mirroring()
512 if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN) in dp83869_config_port_mirroring()
524 struct dp83869_private *dp83869 = phydev->priv; in dp83869_set_strapped_mode()
531 dp83869->mode = val & DP83869_STRAP_OP_MODE_MASK; in dp83869_set_strapped_mode()
543 struct device_node *of_node = phydev->mdio.dev.of_node; in dp83869_of_init()
544 struct dp83869_private *dp83869 = phydev->priv; in dp83869_of_init()
549 return -ENODEV; in dp83869_of_init()
551 dp83869->io_impedance = -EINVAL; in dp83869_of_init()
554 ret = of_property_read_u32(of_node, "ti,clk-output-sel", in dp83869_of_init()
555 &dp83869->clk_output_sel); in dp83869_of_init()
556 if (ret || dp83869->clk_output_sel > DP83869_CLK_O_SEL_REF_CLK) in dp83869_of_init()
557 dp83869->clk_output_sel = DP83869_CLK_O_SEL_REF_CLK; in dp83869_of_init()
559 ret = of_property_read_u32(of_node, "ti,op-mode", &dp83869->mode); in dp83869_of_init()
561 if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET || in dp83869_of_init()
562 dp83869->mode > DP83869_SGMII_COPPER_ETHERNET) in dp83869_of_init()
563 return -EINVAL; in dp83869_of_init()
570 if (of_property_read_bool(of_node, "ti,max-output-impedance")) in dp83869_of_init()
571 dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX; in dp83869_of_init()
572 else if (of_property_read_bool(of_node, "ti,min-output-impedance")) in dp83869_of_init()
573 dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN; in dp83869_of_init()
575 if (of_property_read_bool(of_node, "enet-phy-lane-swap")) { in dp83869_of_init()
576 dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN; in dp83869_of_init()
578 /* If the lane swap is not in the DT then check the straps */ in dp83869_of_init()
584 dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN; in dp83869_of_init()
586 dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS; in dp83869_of_init()
591 if (of_property_read_u32(of_node, "rx-fifo-depth", in dp83869_of_init()
592 &dp83869->rx_fifo_depth)) in dp83869_of_init()
593 dp83869->rx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; in dp83869_of_init()
595 if (of_property_read_u32(of_node, "tx-fifo-depth", in dp83869_of_init()
596 &dp83869->tx_fifo_depth)) in dp83869_of_init()
597 dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; in dp83869_of_init()
599 dp83869->rx_int_delay = phy_get_internal_delay(phydev, in dp83869_of_init()
602 if (dp83869->rx_int_delay < 0) in dp83869_of_init()
603 dp83869->rx_int_delay = DP83869_CLK_DELAY_DEF; in dp83869_of_init()
605 dp83869->tx_int_delay = phy_get_internal_delay(phydev, in dp83869_of_init()
608 if (dp83869->tx_int_delay < 0) in dp83869_of_init()
609 dp83869->tx_int_delay = DP83869_CLK_DELAY_DEF; in dp83869_of_init()
631 val |= (dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT); in dp83869_configure_rgmii()
632 val |= (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT); in dp83869_configure_rgmii()
639 if (dp83869->io_impedance >= 0) in dp83869_configure_rgmii()
643 dp83869->io_impedance & in dp83869_configure_rgmii()
655 /* Only allow advertising what this PHY supports */ in dp83869_configure_fiber()
656 linkmode_and(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
657 phydev->supported); in dp83869_configure_fiber()
659 linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported); in dp83869_configure_fiber()
661 if (dp83869->mode == DP83869_RGMII_1000_BASE) { in dp83869_configure_fiber()
663 phydev->supported); in dp83869_configure_fiber()
666 phydev->supported); in dp83869_configure_fiber()
668 phydev->supported); in dp83869_configure_fiber()
675 phydev->autoneg = AUTONEG_DISABLE; in dp83869_configure_fiber()
676 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); in dp83869_configure_fiber()
677 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->advertising); in dp83869_configure_fiber()
687 linkmode_or(phydev->advertising, phydev->advertising, in dp83869_configure_fiber()
688 phydev->supported); in dp83869_configure_fiber()
699 if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET || in dp83869_configure_mode()
700 dp83869->mode > DP83869_SGMII_COPPER_ETHERNET) in dp83869_configure_mode()
701 return -EINVAL; in dp83869_configure_mode()
706 phy_ctrl_val = dp83869->mode; in dp83869_configure_mode()
707 if (phydev->interface == PHY_INTERFACE_MODE_MII) { in dp83869_configure_mode()
708 if (dp83869->mode == DP83869_100M_MEDIA_CONVERT || in dp83869_configure_mode()
709 dp83869->mode == DP83869_RGMII_100_BASE || in dp83869_configure_mode()
710 dp83869->mode == DP83869_RGMII_COPPER_ETHERNET) { in dp83869_configure_mode()
713 phydev_err(phydev, "selected op-mode is not valid with MII mode\n"); in dp83869_configure_mode()
714 return -EINVAL; in dp83869_configure_mode()
727 phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT | in dp83869_configure_mode()
728 dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT | in dp83869_configure_mode()
731 switch (dp83869->mode) { in dp83869_configure_mode()
797 return -EINVAL; in dp83869_configure_mode()
805 struct dp83869_private *dp83869 = phydev->priv; in dp83869_config_init()
808 /* Force speed optimization for the PHY even if it strapped */ in dp83869_config_init()
825 if (dp83869->port_mirroring != DP83869_PORT_MIRRORING_KEEP) in dp83869_config_init()
829 if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK) in dp83869_config_init()
833 dp83869->clk_output_sel << in dp83869_config_init()
838 dp83869->rx_int_delay | in dp83869_config_init()
839 dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT); in dp83869_config_init()
847 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in dp83869_config_init()
851 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) in dp83869_config_init()
854 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) in dp83869_config_init()
869 dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869), in dp83869_probe()
872 return -ENOMEM; in dp83869_probe()
874 phydev->priv = dp83869; in dp83869_probe()
880 if (dp83869->mode == DP83869_RGMII_100_BASE || in dp83869_probe()
881 dp83869->mode == DP83869_RGMII_1000_BASE) in dp83869_probe()
882 phydev->port = PORT_FIBRE; in dp83869_probe()
898 * Need to set the registers in the PHY to the right config. in dp83869_phy_reset()
925 DP83869_PHY_DRIVER(DP83561_PHY_ID, "TI DP83561-SP"),
937 MODULE_DESCRIPTION("Texas Instruments DP83869 PHY driver");