2 /* Driver for the Texas Instruments DP83867 PHY
19 #include <dt-bindings/net/ti-dp83867.h>
491 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_config_port_mirroring()  local
493 	if (dp83867->port_mirroring == DP83867_PORT_MIRROING_EN)  in dp83867_config_port_mirroring()
505 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init_io_impedance()  local
521 			dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX;  in dp83867_of_init_io_impedance()
523 			dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;  in dp83867_of_init_io_impedance()
525 			dp83867->io_impedance = -1; /* leave at default */  in dp83867_of_init_io_impedance()
543 	dp83867->io_impedance = val;  in dp83867_of_init_io_impedance()
550 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init()  local
560 				   &dp83867->clk_output_sel);  in dp83867_of_init()
563 		dp83867->set_clk_output = true;  in dp83867_of_init()
567 		if (dp83867->clk_output_sel > DP83867_CLK_O_SEL_REF_CLK &&  in dp83867_of_init()
568 		    dp83867->clk_output_sel != DP83867_CLK_O_SEL_OFF) {  in dp83867_of_init()
570 				   dp83867->clk_output_sel);  in dp83867_of_init()
579 	dp83867->rxctrl_strap_quirk = of_property_read_bool(of_node,  in dp83867_of_init()
580 							    "ti,dp83867-rxctrl-strap-quirk");  in dp83867_of_init()
582 	dp83867->sgmii_ref_clk_en = of_property_read_bool(of_node,  in dp83867_of_init()
585 	dp83867->rx_id_delay = DP83867_RGMIIDCTL_2_00_NS;  in dp83867_of_init()
587 				   &dp83867->rx_id_delay);  in dp83867_of_init()
588 	if (!ret && dp83867->rx_id_delay > DP83867_RGMII_RX_CLK_DELAY_MAX) {  in dp83867_of_init()
591 			   dp83867->rx_id_delay);  in dp83867_of_init()
595 	dp83867->tx_id_delay = DP83867_RGMIIDCTL_2_00_NS;  in dp83867_of_init()
597 				   &dp83867->tx_id_delay);  in dp83867_of_init()
598 	if (!ret && dp83867->tx_id_delay > DP83867_RGMII_TX_CLK_DELAY_MAX) {  in dp83867_of_init()
601 			   dp83867->tx_id_delay);  in dp83867_of_init()
606 		dp83867->port_mirroring = DP83867_PORT_MIRROING_EN;  in dp83867_of_init()
609 		dp83867->port_mirroring = DP83867_PORT_MIRROING_DIS;  in dp83867_of_init()
612 				   &dp83867->tx_fifo_depth);  in dp83867_of_init()
615 					   &dp83867->tx_fifo_depth);  in dp83867_of_init()
617 			dp83867->tx_fifo_depth =  in dp83867_of_init()
621 	if (dp83867->tx_fifo_depth > DP83867_PHYCR_FIFO_DEPTH_MAX) {  in dp83867_of_init()
623 			   dp83867->tx_fifo_depth);  in dp83867_of_init()
628 				   &dp83867->rx_fifo_depth);  in dp83867_of_init()
630 		dp83867->rx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;  in dp83867_of_init()
632 	if (dp83867->rx_fifo_depth > DP83867_PHYCR_FIFO_DEPTH_MAX) {  in dp83867_of_init()
634 			   dp83867->rx_fifo_depth);  in dp83867_of_init()
643 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init()  local
652 	dp83867->rx_id_delay = delay & DP83867_RGMII_RX_CLK_DELAY_MAX;  in dp83867_of_init()
653 	dp83867->tx_id_delay = (delay >> DP83867_RGMII_TX_CLK_DELAY_SHIFT) &  in dp83867_of_init()
660 	dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN / 2;  in dp83867_of_init()
666 	dp83867->tx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;  in dp83867_of_init()
667 	dp83867->rx_fifo_depth = DP83867_PHYCR_FIFO_DEPTH_4_B_NIB;  in dp83867_of_init()
699 	struct dp83867_private *dp83867;  in dp83867_probe()  local
701 	dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867),  in dp83867_probe()
703 	if (!dp83867)  in dp83867_probe()
706 	phydev->priv = dp83867;  in dp83867_probe()
713 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_config_init()  local
723 	if (dp83867->rxctrl_strap_quirk)  in dp83867_config_init()
741 	/* Although the DP83867 reports EEE capability through the  in dp83867_config_init()
754 		val |= (dp83867->tx_fifo_depth <<  in dp83867_config_init()
759 			val |= (dp83867->rx_fifo_depth <<  in dp83867_config_init()
807 			      dp83867->rx_id_delay |  in dp83867_config_init()
808 			      (dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT));  in dp83867_config_init()
812 	if (dp83867->io_impedance >= 0)  in dp83867_config_init()
815 			       dp83867->io_impedance);  in dp83867_config_init()
848 		if (dp83867->sgmii_ref_clk_en)  in dp83867_config_init()
858 		if (dp83867->rxctrl_strap_quirk)  in dp83867_config_init()
871 	if (dp83867->port_mirroring != DP83867_PORT_MIRROING_KEEP)  in dp83867_config_init()
875 	if (dp83867->set_clk_output) {  in dp83867_config_init()
878 		if (dp83867->clk_output_sel == DP83867_CLK_O_SEL_OFF) {  in dp83867_config_init()
882 			val = dp83867->clk_output_sel <<  in dp83867_config_init()
928 	/* There is a limitation in DP83867 PHY device where SGMII AN is  in dp83867_link_change_notify()
1123 		.name		= "TI DP83867",
1163 MODULE_DESCRIPTION("Texas Instruments DP83867 PHY driver");