Lines Matching +full:0 +full:xfffffff0
17 #define DP83822_PHY_ID 0x2000a240
18 #define DP83825S_PHY_ID 0x2000a140
19 #define DP83825I_PHY_ID 0x2000a150
20 #define DP83825CM_PHY_ID 0x2000a160
21 #define DP83825CS_PHY_ID 0x2000a170
22 #define DP83826C_PHY_ID 0x2000a130
23 #define DP83826NC_PHY_ID 0x2000a110
25 #define MII_DP83822_CTRL_2 0x0a
26 #define MII_DP83822_PHYSTS 0x10
27 #define MII_DP83822_PHYSCR 0x11
28 #define MII_DP83822_MISR1 0x12
29 #define MII_DP83822_MISR2 0x13
30 #define MII_DP83822_FCSCR 0x14
31 #define MII_DP83822_RCSR 0x17
32 #define MII_DP83822_RESET_CTRL 0x1f
33 #define MII_DP83822_MLEDCR 0x25
34 #define MII_DP83822_LDCTRL 0x403
35 #define MII_DP83822_LEDCFG1 0x460
36 #define MII_DP83822_IOCTRL 0x461
37 #define MII_DP83822_IOCTRL1 0x462
38 #define MII_DP83822_IOCTRL2 0x463
39 #define MII_DP83822_GENCFG 0x465
40 #define MII_DP83822_SOR1 0x467
43 #define MII_DP83826_VOD_CFG1 0x30b
44 #define MII_DP83826_VOD_CFG2 0x30c
47 #define DP83822_SIG_DET_LOW BIT(0)
58 #define DP83822_PHYSTS_LINK BIT(0)
61 #define DP83822_PHYSCR_INT_OE BIT(0) /* Interrupt Output Enable */
65 #define DP83822_RX_ERR_HF_INT_EN BIT(0)
75 #define DP83822_JABBER_DET_INT_EN BIT(0)
88 #define MII_DP83822_RXSOP1 0x04a5
89 #define MII_DP83822_RXSOP2 0x04a6
90 #define MII_DP83822_RXSOP3 0x04a7
93 #define MII_DP83822_WOL_CFG 0x04a0
94 #define MII_DP83822_WOL_STAT 0x04a1
95 #define MII_DP83822_WOL_DA1 0x04a2
96 #define MII_DP83822_WOL_DA2 0x04a3
97 #define MII_DP83822_WOL_DA3 0x04a4
100 #define DP83822_WOL_MAGIC_EN BIT(0)
115 #define DP83822_MLEDCR_ROUTE GENMASK(1, 0)
127 #define DP83822_IOCTRL1_GPIO3_CTRL_LED3 BIT(0)
128 #define DP83822_IOCTRL1_GPIO1_CTRL GENMASK(2, 0)
129 #define DP83822_IOCTRL1_GPIO1_CTRL_LED_1 BIT(0)
136 #define DP83822_IOCTRL2_GPIO2_CTRL GENMASK(2, 0)
137 #define DP83822_IOCTRL2_GPIO2_CTRL_CLK_REF GENMASK(1, 0)
138 #define DP83822_IOCTRL2_GPIO2_CTRL_MLED BIT(0)
140 #define DP83822_CLK_SRC_MAC_IF 0x0
141 #define DP83822_CLK_SRC_XI 0x1
142 #define DP83822_CLK_SRC_INT_REF 0x2
143 #define DP83822_CLK_SRC_RMII_MASTER_MODE_REF 0x4
144 #define DP83822_CLK_SRC_FREE_RUNNING 0x6
145 #define DP83822_CLK_SRC_RECOVERED 0x7
147 #define DP83822_LED_FN_LINK 0x0 /* Link established */
148 #define DP83822_LED_FN_RX_TX 0x1 /* Receive or Transmit activity */
149 #define DP83822_LED_FN_TX 0x2 /* Transmit activity */
150 #define DP83822_LED_FN_RX 0x3 /* Receive activity */
151 #define DP83822_LED_FN_COLLISION 0x4 /* Collision detected */
152 #define DP83822_LED_FN_LINK_100_BTX 0x5 /* 100 BTX link established */
153 #define DP83822_LED_FN_LINK_10_BT 0x6 /* 10BT link established */
154 #define DP83822_LED_FN_FULL_DUPLEX 0x7 /* Full duplex */
155 #define DP83822_LED_FN_LINK_RX_TX 0x8 /* Link established, blink for rx or tx activity */
156 #define DP83822_LED_FN_ACTIVE_STRETCH 0x9 /* Active Stretch Signal */
157 #define DP83822_LED_FN_MII_LINK 0xa /* MII LINK (100BT+FD) */
158 #define DP83822_LED_FN_LPI_MODE 0xb /* LPI Mode (EEE) */
159 #define DP83822_LED_FN_RX_TX_ERR 0xc /* TX/RX MII Error */
160 #define DP83822_LED_FN_LINK_LOST 0xd /* Link Lost */
161 #define DP83822_LED_FN_PRBS_ERR 0xe /* Blink for PRBS error */
164 #define DP83822_STRAP_MODE1 0
165 #define DP83822_STRAP_MODE2 BIT(0)
167 #define DP83822_STRAP_MODE4 GENMASK(1, 0)
179 #define DP83826_VOD_CFG2_PLUS_MDI_MASK GENMASK(5, 0)
181 #define DP83826_CFG_DAC_MINUS_MDIX_3_TO_0 GENMASK(3, 0)
184 #define DP83826_CFG_DAC_MINUS_DEFAULT 0x30
185 #define DP83826_CFG_DAC_PLUS_DEFAULT 0x10
193 #define DP83822_LED_INDEX_LED_0 0
225 /* MAC addresses start with byte 5, but stored in mac[0]. in dp83822_config_wol()
226 * 822 PHYs store bytes 4|5, 2|3, 0|1 in dp83822_config_wol()
229 (mac[1] << 8) | mac[0]); in dp83822_config_wol()
245 (wol->sopass[1] << 8) | wol->sopass[0]); in dp83822_config_wol()
293 wol->wolopts = 0; in dp83822_get_wol()
303 wol->sopass[0] = (sopass_val & 0xff); in dp83822_get_wol()
308 wol->sopass[2] = (sopass_val & 0xff); in dp83822_get_wol()
313 wol->sopass[4] = (sopass_val & 0xff); in dp83822_get_wol()
319 /* WoL is not enabled so set wolopts to 0 */ in dp83822_get_wol()
321 wol->wolopts = 0; in dp83822_get_wol()
333 if (misr_status < 0) in dp83822_config_intr()
347 if (err < 0) in dp83822_config_intr()
351 if (misr_status < 0) in dp83822_config_intr()
365 if (err < 0) in dp83822_config_intr()
369 if (physcr_status < 0) in dp83822_config_intr()
375 err = phy_write(phydev, MII_DP83822_MISR1, 0); in dp83822_config_intr()
376 if (err < 0) in dp83822_config_intr()
379 err = phy_write(phydev, MII_DP83822_MISR2, 0); in dp83822_config_intr()
380 if (err < 0) in dp83822_config_intr()
384 if (physcr_status < 0) in dp83822_config_intr()
399 * the upper half (15:8), while the lower half (7:0) is used for in dp83822_handle_interrupt()
406 if (irq_status < 0) { in dp83822_handle_interrupt()
410 if (irq_status & ((irq_status & GENMASK(7, 0)) << 8)) in dp83822_handle_interrupt()
414 if (irq_status < 0) { in dp83822_handle_interrupt()
418 if (irq_status & ((irq_status & GENMASK(7, 0)) << 8)) in dp83822_handle_interrupt()
442 if (ctrl2 < 0) in dp83822_read_status()
448 if (ret < 0) in dp83822_read_status()
458 if (status < 0) in dp83822_read_status()
471 return 0; in dp83822_read_status()
513 return 0; in dp83822_config_init_leds()
519 int rgmii_delay = 0; in dp83822_config_init()
522 int err = 0; in dp83822_config_init()
534 if (dp83822->tx_amplitude_100base_tx_index >= 0) in dp83822_config_init()
540 if (dp83822->mac_termination_index >= 0) in dp83822_config_init()
551 rx_int_delay = phy_get_internal_delay(phydev, NULL, 0, true); in dp83822_config_init()
554 if (rx_int_delay > 0) in dp83822_config_init()
557 tx_int_delay = phy_get_internal_delay(phydev, NULL, 0, false); in dp83822_config_init()
560 if (tx_int_delay <= 0) in dp83822_config_init()
584 if (err < 0) in dp83822_config_init()
606 if (bmcr < 0) in dp83822_config_init()
610 err = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0); in dp83822_config_init()
611 if (err < 0) in dp83822_config_init()
625 if (err < 0) in dp83822_config_init()
646 if (strcmp(of_val, "master") == 0) { in dp8382x_config_rmii_mode()
649 } else if (strcmp(of_val, "slave") == 0) { in dp8382x_config_rmii_mode()
662 return 0; in dp8382x_config_rmii_mode()
735 if (err < 0) in dp83822_phy_reset()
760 return 0; in dp83822_of_init_leds()
764 return 0; in dp83822_of_init_leds()
803 return 0; in dp83822_of_init_leds()
826 if (strcmp(of_val, "mac-if") == 0) { in dp83822_of_init()
828 } else if (strcmp(of_val, "xi") == 0) { in dp83822_of_init()
830 } else if (strcmp(of_val, "int-ref") == 0) { in dp83822_of_init()
832 } else if (strcmp(of_val, "rmii-master-mode-ref") == 0) { in dp83822_of_init()
834 } else if (strcmp(of_val, "free-running") == 0) { in dp83822_of_init()
836 } else if (strcmp(of_val, "recovered") == 0) { in dp83822_of_init()
852 for (i = 0; i < ARRAY_SIZE(tx_amplitude_100base_tx_gain); i++) { in dp83822_of_init()
859 if (dp83822->tx_amplitude_100base_tx_index < 0) { in dp83822_of_init()
869 for (i = 0; i < ARRAY_SIZE(mac_termination); i++) { in dp83822_of_init()
876 if (dp83822->mac_termination_index < 0) { in dp83822_of_init()
918 return 0; in dp83822_of_init()
933 if (val < 0) in dp83822_read_straps()
936 phydev_dbg(phydev, "SOR1 strap register: 0x%04x\n", val); in dp83822_read_straps()
950 return 0; in dp83822_read_straps()
966 return 0; in dp8382x_probe()
991 return 0; in dp83822_probe()
1004 return 0; in dp83826_probe()
1016 return 0; in dp83822_suspend()
1030 return 0; in dp83822_resume()
1065 if (mode < 0) in dp83822_led_hw_is_supported()
1068 return 0; in dp83822_led_hw_is_supported()
1077 if (mode < 0) in dp83822_led_hw_control_set()
1105 if (val < 0) in dp83822_led_hw_control_get()
1111 if (val < 0) in dp83822_led_hw_control_get()
1150 *rules = 0; in dp83822_led_hw_control_get()
1154 return 0; in dp83822_led_hw_control_get()
1221 { DP83822_PHY_ID, 0xfffffff0 },
1222 { DP83825I_PHY_ID, 0xfffffff0 },
1223 { DP83826C_PHY_ID, 0xfffffff0 },
1224 { DP83826NC_PHY_ID, 0xfffffff0 },
1225 { DP83825S_PHY_ID, 0xfffffff0 },
1226 { DP83825CM_PHY_ID, 0xfffffff0 },
1227 { DP83825CS_PHY_ID, 0xfffffff0 },