1 // SPDX-License-Identifier: GPL-2.0+
5  * Copyright (C) 2014-2017 Broadcom
11 #include "bcm-phy-lib.h"
58 	/* AFE_RXCONFIG_2, set rCal offset for HT=0 code and LT=-2 code */  in bcm7xxx_28nm_d0_afe_config_init()
73 	/* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal  in bcm7xxx_28nm_d0_afe_config_init()
81 	/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */  in bcm7xxx_28nm_d0_afe_config_init()
101 	/* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal  in bcm7xxx_28nm_e0_plus_afe_config_init()
109 	/* DSP_TAP10, adjust bias current trim (+0% swing, +0 tick) */  in bcm7xxx_28nm_e0_plus_afe_config_init()
145 	u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags);  in bcm7xxx_28nm_config_init()
146 	u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags);  in bcm7xxx_28nm_config_init()
151 	 * standard location in MII_PHYS_ID[23]  in bcm7xxx_28nm_config_init()
154 		rev = phydev->phy_id & ~phydev->drv->phy_id_mask;  in bcm7xxx_28nm_config_init()
157 		     phydev_name(phydev), phydev->drv->name, rev, patch);  in bcm7xxx_28nm_config_init()
210 	/* Re-apply workarounds coming out suspend/resume */  in bcm7xxx_28nm_resume()
215 	/* 28nm Gigabit PHYs come out of reset without any half-duplex  in bcm7xxx_28nm_resume()
218 	 * gracefully handles auto-negotiated and forced modes.  in bcm7xxx_28nm_resume()
247 	mutex_lock(&dev->mdio.bus->mdio_lock);  in phy_set_clr_bits()
249 	mutex_unlock(&dev->mdio.bus->mdio_lock);  in phy_set_clr_bits()
264 	/* Set current trim values INT_trim = -1, Ext_trim =0 */  in bcm7xxx_28nm_ephy_01_afe_config_init()
299 /* The 28nm EPHY does not support Clause 45 (MMD) used by bcm-phy-lib */
310 	/* Enable auto-power down */  in bcm7xxx_28nm_ephy_apd_enable()
390 	u8 rev = phydev->phy_id & ~phydev->drv->phy_id_mask;  in bcm7xxx_28nm_ephy_config_init()
394 		     phydev_name(phydev), phydev->drv->name, rev);  in bcm7xxx_28nm_ephy_config_init()
403 	/* Apply AFE software work-around if necessary */  in bcm7xxx_28nm_ephy_config_init()
470 	/* AFE_CAL_CONFIG_0, no reset and analog powerup */  in bcm7xxx_16nm_ephy_afe_config()
492 	/* Correct RCAL code + 1 is -1% rprogr, LP: +16 */  in bcm7xxx_16nm_ephy_afe_config()
494 	/* Correct RCAL code + 1 is -15 rprogr, 11: +10 */  in bcm7xxx_16nm_ephy_afe_config()
517 	/* Non-overlap fix */  in bcm7xxx_16nm_ephy_afe_config()
593 	/* Re-apply workarounds coming out suspend/resume */  in bcm7xxx_16nm_ephy_resume()
636 		return -EOPNOTSUPP;  in bcm7xxx_28nm_ephy_read_mmd()
666 		return -EOPNOTSUPP;  in bcm7xxx_28nm_ephy_write_mmd()
679 	/* Write the desired value in the shadow register */  in bcm7xxx_28nm_ephy_write_mmd()
692 	/* Re-apply workarounds coming out suspend/resume */  in bcm7xxx_28nm_ephy_resume()
731 /* Workaround for putting the PHY in IDDQ mode, required
765 	switch (tuna->id) {  in bcm7xxx_28nm_get_tunable()
769 		return -EOPNOTSUPP;  in bcm7xxx_28nm_get_tunable()
780 	switch (tuna->id) {  in bcm7xxx_28nm_set_tunable()
785 		return -EOPNOTSUPP;  in bcm7xxx_28nm_set_tunable()
792 	 * from successfully linking up, trigger auto-negotiation restart  in bcm7xxx_28nm_set_tunable()
805 	struct bcm7xxx_phy_priv *priv = phydev->priv;  in bcm7xxx_28nm_get_phy_stats()
807 	bcm_phy_get_stats(phydev, priv->stats, stats, data);  in bcm7xxx_28nm_get_phy_stats()
816 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);  in bcm7xxx_28nm_probe()
818 		return -ENOMEM;  in bcm7xxx_28nm_probe()
820 	phydev->priv = priv;  in bcm7xxx_28nm_probe()
822 	priv->stats = devm_kcalloc(&phydev->mdio.dev,  in bcm7xxx_28nm_probe()
825 	if (!priv->stats)  in bcm7xxx_28nm_probe()
826 		return -ENOMEM;  in bcm7xxx_28nm_probe()
828 	clk = devm_clk_get_optional_enabled(&phydev->mdio.dev, NULL);  in bcm7xxx_28nm_probe()
886 	.suspend        = bcm7xxx_suspend,				\