1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pcs-rzn1-miic.h>
17 #include <dt-bindings/net/pcs-rzn1-miic.h>
52 #define MIIC_MODCTRL_CONF_NONE		-1
55  * struct modctrl_match - Matching table entry for  convctrl configuration
59  *	  then index 1 - 5 are CONV1 - CONV5.
122  * struct miic - MII converter structure
125  * @lock: Lock used for read-modify-write access
127 struct miic {  struct
134  * struct miic_port - Per port MII converter struct
135  * @miic: backiling to MII converter structure  argument
141 	struct miic *miic;  member
152 static void miic_reg_writel(struct miic *miic, int offset, u32 value)  in miic_reg_writel()  argument
154 	writel(value, miic->base + offset);  in miic_reg_writel()
157 static u32 miic_reg_readl(struct miic *miic, int offset)  in miic_reg_readl()  argument
159 	return readl(miic->base + offset);  in miic_reg_readl()
162 static void miic_reg_rmw(struct miic *miic, int offset, u32 mask, u32 val)  in miic_reg_rmw()  argument
166 	spin_lock(&miic->lock);  in miic_reg_rmw()
168 	reg = miic_reg_readl(miic, offset);  in miic_reg_rmw()
171 	miic_reg_writel(miic, offset, reg);  in miic_reg_rmw()
173 	spin_unlock(&miic->lock);  in miic_reg_rmw()
176 static void miic_converter_enable(struct miic *miic, int port, int enable)  in miic_converter_enable()  argument
183 	miic_reg_rmw(miic, MIIC_CONVRST, MIIC_CONVRST_PHYIF_RST(port), val);  in miic_converter_enable()
191 	struct miic *miic = miic_port->miic;  in miic_config()  local
193 	int port = miic_port->port;  in miic_config()
215 		return -EOPNOTSUPP;  in miic_config()
225 	if (interface != miic_port->interface) {  in miic_config()
228 		miic_port->interface = interface;  in miic_config()
231 	miic_reg_rmw(miic, MIIC_CONVCTRL(port), mask, val);  in miic_config()
232 	miic_converter_enable(miic, miic_port->port, 1);  in miic_config()
241 	struct miic *miic = miic_port->miic;  in miic_link_up()  local
243 	int port = miic_port->port;  in miic_link_up()
248 	/* No speed in MII through-mode */  in miic_link_up()
267 	miic_reg_rmw(miic, MIIC_CONVCTRL(port),  in miic_link_up()
274 	if (phy_interface_mode_is_rgmii(state->interface) ||  in miic_validate()
275 	    state->interface == PHY_INTERFACE_MODE_RMII ||  in miic_validate()
276 	    state->interface == PHY_INTERFACE_MODE_MII)  in miic_validate()
279 	return -EINVAL;  in miic_validate()
285 	struct miic *miic = miic_port->miic;  in miic_pre_init()  local
289 	if (pcs->rxc_always_on) {  in miic_pre_init()
295 		miic_port->interface = PHY_INTERFACE_MODE_RMII;  in miic_pre_init()
301 		miic_reg_rmw(miic, MIIC_CONVCTRL(miic_port->port), mask, val);  in miic_pre_init()
303 		miic_converter_enable(miic, miic_port->port, 1);  in miic_pre_init()
321 	struct miic *miic;  in miic_create()  local
325 		return ERR_PTR(-ENODEV);  in miic_create()
328 		return ERR_PTR(-EINVAL);  in miic_create()
331 		return ERR_PTR(-EINVAL);  in miic_create()
336 		return ERR_PTR(-ENODEV);  in miic_create()
340 		return ERR_PTR(-ENODEV);  in miic_create()
347 			put_device(&pdev->dev);  in miic_create()
348 		return ERR_PTR(-EPROBE_DEFER);  in miic_create()
353 		put_device(&pdev->dev);  in miic_create()
354 		return ERR_PTR(-ENOMEM);  in miic_create()
357 	miic = platform_get_drvdata(pdev);  in miic_create()
358 	device_link_add(dev, miic->dev, DL_FLAG_AUTOREMOVE_CONSUMER);  in miic_create()
359 	put_device(&pdev->dev);  in miic_create()
361 	miic_port->miic = miic;  in miic_create()
362 	miic_port->port = port - 1;  in miic_create()
363 	miic_port->pcs.ops = &miic_phylink_ops;  in miic_create()
364 	miic_port->pcs.neg_mode = true;  in miic_create()
366 	return &miic_port->pcs;  in miic_create()
374 	miic_converter_enable(miic_port->miic, miic_port->port, 0);  in miic_destroy()
379 static int miic_init_hw(struct miic *miic, u32 cfg_mode)  in miic_init_hw()  argument
384 	 * is going to be used in conjunction with the Cortex-M3, this sequence  in miic_init_hw()
387 	miic_reg_writel(miic, MIIC_PRCMD, 0x00A5);  in miic_init_hw()
388 	miic_reg_writel(miic, MIIC_PRCMD, 0x0001);  in miic_init_hw()
389 	miic_reg_writel(miic, MIIC_PRCMD, 0xFFFE);  in miic_init_hw()
390 	miic_reg_writel(miic, MIIC_PRCMD, 0x0001);  in miic_init_hw()
392 	miic_reg_writel(miic, MIIC_MODCTRL,  in miic_init_hw()
396 		miic_converter_enable(miic, port, 0);  in miic_init_hw()
401 		miic_reg_writel(miic, MIIC_SWCTRL, 0x0);  in miic_init_hw()
402 		miic_reg_writel(miic, MIIC_SWDUPC, 0x0);  in miic_init_hw()
450 		if (miic_modctrl_match(table_entry->conv, dt_val)) {  in miic_match_dt_conf()
451 			*mode_cfg = table_entry->mode_cfg;  in miic_match_dt_conf()
459 	return -EINVAL;  in miic_match_dt_conf()
465 	struct device_node *np = dev->of_node;  in miic_parse_dt()
472 	if (of_property_read_u32(np, "renesas,miic-switch-portin", &conf) == 0)  in miic_parse_dt()
482 		if (of_property_read_u32(conv, "renesas,miic-input", &conf) == 0)  in miic_parse_dt()
491 	struct device *dev = &pdev->dev;  in miic_probe()
492 	struct miic *miic;  in miic_probe()  local
500 	miic = devm_kzalloc(dev, sizeof(*miic), GFP_KERNEL);  in miic_probe()
501 	if (!miic)  in miic_probe()
502 		return -ENOMEM;  in miic_probe()
504 	spin_lock_init(&miic->lock);  in miic_probe()
505 	miic->dev = dev;  in miic_probe()
506 	miic->base = devm_platform_ioremap_resource(pdev, 0);  in miic_probe()
507 	if (IS_ERR(miic->base))  in miic_probe()
508 		return PTR_ERR(miic->base);  in miic_probe()
518 	ret = miic_init_hw(miic, mode_cfg);  in miic_probe()
527 	platform_set_drvdata(pdev, miic);  in miic_probe()
539 	pm_runtime_put(&pdev->dev);  in miic_remove()
543 	{ .compatible = "renesas,rzn1-miic" },