Lines Matching +full:i2c +full:- +full:controlled
1 # SPDX-License-Identifier: GPL-2.0-only
46 tristate "APM X-Gene SoC MDIO bus controller"
50 APM X-Gene SoC's.
59 third revision of the ASPEED MDIO register interface - the first two
96 tristate "GPIO lib-based bitbanged MDIO buses"
100 Supports GPIO lib-based MDIO busses.
103 will be called mdio-gpio.
114 depends on I2C
116 Support I2C based PHYs. This provides a MDIO bus bridged
117 to I2C to allow PHYs connected in I2C mode to be accessed
160 IPQ40xx, IPQ60xx, IPQ807x and IPQ50xx series Soc-s.
182 layout. It's regmap-based so that it can be used on integrated,
183 memory-mapped PHYs, SPI PHYs and so on. A new virtual MDIO bus is
254 tristate "GPIO controlled MDIO bus multiplexers"
259 are controlled via GPIO lines. The multiplexer connects one of
270 that is controlled via the kernel multiplexer subsystem. The
276 tristate "MMIO device-controlled MDIO bus multiplexers"
281 are controlled via a simple memory-mapped device, like an FPGA.