110  * this register in the PLC-S controls the scrambling parameters
122  * this register in the PLC-S controls the scrambling parameters
149  * PLC timing parameter
157 	int	timer ;			/* relative plc timer address */
381 		memset((char *)&phy->plc,0,sizeof(struct s_plc)) ;  in pcm_init()
382 		phy->plc.p_state = PS_OFF ;  in pcm_init()
415 	int	rev ;	/* Revision of PLC-x */  in plc_init()
419 	outpw(PLC(p,PL_CNTRL_B),0) ;  in plc_init()
420 	outpw(PLC(p,PL_CNTRL_B),PL_PCM_STOP) ;  in plc_init()
421 	outpw(PLC(p,PL_CNTRL_A),0) ;  in plc_init()
424 	 * if PLC-S then set control register C  in plc_init()
427 	rev = inpw(PLC(p,PL_STATUS_A)) & PLC_REV_MASK ;  in plc_init()
432 			outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_S) ;  in plc_init()
434 			outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_S) ;  in plc_init()
435 			outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_S) ;  in plc_init()
439 			outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_U) ;  in plc_init()
441 			outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_U) ;  in plc_init()
442 			outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_U) ;  in plc_init()
451 		outpw(PLC(p,pltm[i].timer),pltm[i].para) ;  in plc_init()
453 	(void)inpw(PLC(p,PL_INTR_EVENT)) ;	/* clear interrupt event reg */  in plc_init()
455 	outpw(PLC(p,PL_INTR_MASK),plc_imsk_na); /* enable non active irq's */  in plc_init()
466 		outpw(PLC(p,PL_CNTRL_B),PL_CLASS_S) ;  in plc_init()
481 	port = (HW_PTR) (PLC(p,PL_CNTRL_B)) ;  in plc_go_state()
499 	state = inpw(PLC(phy,PL_STATUS_A)) & PL_LINE_ST ;  in sm_pm_get_ls()
535 	if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {  in plc_send_bits()
542 	outpw(PLC(np,PL_VECTOR_LEN),len-1) ;	/* len=nr-1 */  in plc_send_bits()
543 	outpw(PLC(np,PL_XMIT_VECTOR),n) ;  in plc_send_bits()
558  * config plc muxes
565 		SETMASK(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL,PL_CONFIG_CNTRL) ;  in plc_config_mux()
566 		SETMASK(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP,PL_SC_REM_LOOP) ;  in plc_config_mux()
569 		CLEAR(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL) ;  in plc_config_mux()
570 		CLEAR(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP) ;  in plc_config_mux()
572 	CLEAR(PLC(PB,PL_CNTRL_B),PL_CONFIG_CNTRL) ;  in plc_config_mux()
573 	CLEAR(PLC(PB,PL_CNTRL_A),PL_SC_REM_LOOP) ;  in plc_config_mux()
612 	 * because the PLC does the bit signaling for us,  in pcm()
666 	struct s_plc	*plc ;  in pcm_fsm()  local
669 	u_short	plc_rev ;		/* Revision of the plc */  in pcm_fsm()
672 	plc = &phy->plc ;  in pcm_fsm()
703 		CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;  in pcm_fsm()
711 		outpw(PLC(np,PL_CNTRL_A),0) ;  in pcm_fsm()
712 		CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;  in pcm_fsm()
713 		CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;  in pcm_fsm()
734 		CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;  in pcm_fsm()
735 		CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;  in pcm_fsm()
741 		if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {  in pcm_fsm()
763 		outpw(PLC(np,PL_INTR_MASK),plc_imsk_na) ;  in pcm_fsm()
770 		(void)inpw(PLC(np,PL_INTR_EVENT)) ;  in pcm_fsm()
772 		/* Get the plc revision for revision dependent code */  in pcm_fsm()
773 		plc_rev = inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK ;  in pcm_fsm()
779 			 * No supernet III PLC, so set Xmit verctor and  in pcm_fsm()
790 		 *   to be signaled. (In PLC-S description and PLCS in SN3.  in pcm_fsm()
794 		 * We do it exactly according this specs for the old PLC and  in pcm_fsm()
797 		 * old PLC and set the XMIT registers again, if the PLC is  in pcm_fsm()
805 		 * workaround for PLC-S eng. sample errata  in pcm_fsm()
808 		if (!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))  in pcm_fsm()
810 		if (((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) !=  in pcm_fsm()
812 			!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))  in pcm_fsm()
826 		plc->p_state = PS_BIT3 ;  in pcm_fsm()
827 		plc->p_bits = 3 ;  in pcm_fsm()
828 		plc->p_start = 0 ;  in pcm_fsm()
850 		switch (plc->p_state) {  in pcm_fsm()
855 			plc->p_state = PS_BIT4 ;  in pcm_fsm()
856 			plc->p_bits = 1 ;  in pcm_fsm()
857 			plc->p_start = 3 ;  in pcm_fsm()
867 			plc->p_state = PS_BIT7 ;  in pcm_fsm()
868 			plc->p_bits = 3 ;  in pcm_fsm()
869 			plc->p_start = 4 ;  in pcm_fsm()
878 			plc->p_state = PS_LCT ;  in pcm_fsm()
879 			plc->p_bits = 0 ;  in pcm_fsm()
880 			plc->p_start = 7 ;  in pcm_fsm()
884 			i = inpw(PLC(np,PL_CNTRL_B)) & ~PL_PC_LOOP ;  in pcm_fsm()
885 			outpw(PLC(np,PL_CNTRL_B),i) ;	/* must be cleared */  in pcm_fsm()
886 			outpw(PLC(np,PL_CNTRL_B),i | PL_RLBP) ;  in pcm_fsm()
894 			plc->p_state = PS_BIT8 ;  in pcm_fsm()
895 			plc->p_bits = 1 ;  in pcm_fsm()
896 			plc->p_start = 7 ;  in pcm_fsm()
912 			plc->p_state = PS_JOIN ;  in pcm_fsm()
913 			plc->p_bits = 2 ;  in pcm_fsm()
914 			plc->p_start = 8 ;  in pcm_fsm()
923 			plc->p_state = PS_ACTIVE ;  in pcm_fsm()
936 			SETMASK(PLC(np,PL_CNTRL_A),  in pcm_fsm()
938 			SETMASK(PLC(np,PL_CNTRL_B),  in pcm_fsm()
941 		SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;  in pcm_fsm()
942 		SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;  in pcm_fsm()
947 		switch (plc->p_state) {  in pcm_fsm()
978 		outpw(PLC(np,PL_INTR_MASK),plc_imsk_act) ;  in pcm_fsm()
994 		CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;  in pcm_fsm()
995 		CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;  in pcm_fsm()
996 		CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ;	/* disable LEM int. */  in pcm_fsm()
1003 		SETMASK(PLC(np,PL_CNTRL_B),PL_MAINT,PL_MAINT) ;  in pcm_fsm()
1005 		outpw(PLC(np,PL_CNTRL_A),PL_SC_BYPASS) ;  in pcm_fsm()
1032 	cntrl = (inpw(PLC(phy,PL_CNTRL_B)) & ~PL_MAINT_LS) |  in sm_ph_linestate()
1052 	outpw(PLC(phy,PL_CNTRL_B),cntrl) ;  in sm_ph_linestate()
1079 	errors = inpw(PLC(((int) phy->np),PL_LINK_ERR_CTR)) ;  in lem_evaluate()
1182 	errors = inpw(PLC(((int)phy->np),PL_LINK_ERR_CTR)) ;  in lem_check_lct()
1228 	outpw(PLC(np,PL_LE_THRESHOLD),threshold) ;  in sm_ph_lem_start()
1229 	(void)inpw(PLC(np,PL_LINK_ERR_CTR)) ;	/* clear error counter */  in sm_ph_lem_start()
1232 	SETMASK(PLC(np,PL_INTR_MASK),PL_LE_CTR,PL_LE_CTR) ;  in sm_ph_lem_start()
1240 	CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ;  in sm_ph_lem_stop()
1330 			outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LENGTH ) ;  in pc_rcode_actions()
1334 			outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LONGLN ) ;  in pc_rcode_actions()
1338 			SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;  in pc_rcode_actions()
1342 			SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;  in pc_rcode_actions()
1623  * Interrupt actions for PLC & PCM events
1629 	struct s_plc *plc = &phy->plc ;  in plc_irq()  local
1637 		plc->soft_err++ ;  in plc_irq()
1644 		if (!plc->ebuf_cont && phy->mib->fddiPORTPCMState == PC8_ACTIVE){  in plc_irq()
1655 		plc->ebuf_err++ ;  in plc_irq()
1656 		if (plc->ebuf_cont <= 1000) {  in plc_irq()
1661 			plc->ebuf_cont++ ;	/* Ebuf continuous error */  in plc_irq()
1665 		if (plc->ebuf_cont == 1000 &&  in plc_irq()
1666 			((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) ==  in plc_irq()
1678 			outpw(PLC(np,PL_INTR_MASK),corr_mask);  in plc_irq()
1699 		plc->ebuf_cont = 0 ;	/* reset Ebuf continuous error */  in plc_irq()
1702 		plc->phyinv++ ;  in plc_irq()
1705 		plc->vsym_ctr++ ;  in plc_irq()
1708 		plc->mini_ctr++ ;  in plc_irq()
1716 		j = inpw(PLC(np,PL_LE_THRESHOLD)) ;  in plc_irq()
1717 		i = inpw(PLC(np,PL_LINK_ERR_CTR)) ;  in plc_irq()
1733 		if (plc->p_state == PS_LCT) {  in plc_irq()
1739 		plc->tpc_exp++ ;  in plc_irq()
1742 		switch (inpw(PLC(np,PL_CNTRL_B)) & PL_MATCH_LS) {  in plc_irq()
1752 		reason = inpw(PLC(np,PL_STATUS_B)) & PL_BREAK_REASON ;  in plc_irq()
1755 		case PL_B_PCS :		plc->b_pcs++ ;	break ;  in plc_irq()
1756 		case PL_B_TPC :		plc->b_tpc++ ;	break ;  in plc_irq()
1757 		case PL_B_TNE :		plc->b_tne++ ;	break ;  in plc_irq()
1758 		case PL_B_QLS :		plc->b_qls++ ;	break ;  in plc_irq()
1759 		case PL_B_ILS :		plc->b_ils++ ;	break ;  in plc_irq()
1760 		case PL_B_HLS :		plc->b_hls++ ;	break ;  in plc_irq()
1764 		DB_PCMN(1, "PLC %d: MDcF = %x", np, smc->e.DisconnectFlag);  in plc_irq()
1766 			DB_PCMN(1, "PLC %d: restart (reason %x)", np, reason);  in plc_irq()
1770 			DB_PCMN(1, "PLC %d: NO!! restart (reason %x)",  in plc_irq()
1780 		n = inpw(PLC(np,PL_RCV_VECTOR)) ;  in plc_irq()
1781 		for (i = 0 ; i < plc->p_bits ; i++) {  in plc_irq()
1782 			phy->r_val[plc->p_start+i] = n & 1 ;  in plc_irq()
1800 	 * filter PLC glitch ???  in plc_irq()
1830 		plc->np_err++ ;  in plc_irq()
1834 		plc->parity_err++ ;  in plc_irq()
1886 	switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {  in get_pcm_state()
1908 	switch (inpw(PLC(np,PL_STATUS_A)) & PL_LINE_ST) {  in get_linestate()
1930 	switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {  in get_pcmstate()
1948 	struct s_plc *plc ;  in list_phy()  local
1952 		plc  = &smc->y[np].plc ;  in list_phy()
1955 						plc->soft_err,plc->b_pcs);  in list_phy()
1957 			plc->parity_err,plc->b_tpc,get_linestate(smc,np)) ;  in list_phy()
1959 						plc->ebuf_err,plc->b_tne) ;  in list_phy()
1961 			plc->phyinv,plc->b_qls,get_pcmstate(smc,np)) ;  in list_phy()
1963 						plc->vsym_ctr,plc->b_ils)  ;  in list_phy()
1965 						plc->mini_ctr,plc->b_hls) ;  in list_phy()
1966 		printf("\tnodepr_err: %ld\n",plc->np_err) ;  in list_phy()
1967 		printf("\tTPC_exp : %ld\n",plc->tpc_exp) ;  in list_phy()