Lines Matching +full:mod +full:- +full:def0
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2015 - 2023 Beijing WangXun Technology Co., Ltd. */
7 #include <linux/clk-provider.h>
13 #include <linux/pcs/pcs-xpcs.h>
29 struct txgbe_nodes *nodes = &txgbe->nodes;
30 struct pci_dev *pdev = txgbe->wx->pdev;
36 snprintf(nodes->gpio_name, sizeof(nodes->gpio_name), "txgbe_gpio-%x", id);
37 snprintf(nodes->i2c_name, sizeof(nodes->i2c_name), "txgbe_i2c-%x", id);
38 snprintf(nodes->sfp_name, sizeof(nodes->sfp_name), "txgbe_sfp-%x", id);
39 snprintf(nodes->phylink_name, sizeof(nodes->phylink_name), "txgbe_phylink-%x", id);
41 swnodes = nodes->swnodes;
50 nodes->gpio_props[0] = PROPERTY_ENTRY_STRING("pinctrl-names", "default");
51 swnodes[SWNODE_GPIO] = NODE_PROP(nodes->gpio_name, nodes->gpio_props);
52 nodes->gpio0_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 0, GPIO_ACTIVE_HIGH);
53 nodes->gpio1_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 1, GPIO_ACTIVE_HIGH);
54 nodes->gpio2_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 2, GPIO_ACTIVE_LOW);
55 nodes->gpio3_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 3, GPIO_ACTIVE_HIGH);
56 nodes->gpio4_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 4, GPIO_ACTIVE_HIGH);
57 nodes->gpio5_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_GPIO], 5, GPIO_ACTIVE_HIGH);
59 nodes->i2c_props[0] = PROPERTY_ENTRY_STRING("compatible", "snps,designware-i2c");
60 nodes->i2c_props[1] = PROPERTY_ENTRY_BOOL("wx,i2c-snps-model");
61 nodes->i2c_props[2] = PROPERTY_ENTRY_U32("clock-frequency", I2C_MAX_STANDARD_MODE_FREQ);
62 swnodes[SWNODE_I2C] = NODE_PROP(nodes->i2c_name, nodes->i2c_props);
63 nodes->i2c_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_I2C]);
65 nodes->sfp_props[0] = PROPERTY_ENTRY_STRING("compatible", "sff,sfp");
66 nodes->sfp_props[1] = PROPERTY_ENTRY_REF_ARRAY("i2c-bus", nodes->i2c_ref);
67 nodes->sfp_props[2] = PROPERTY_ENTRY_REF_ARRAY("tx-fault-gpios", nodes->gpio0_ref);
68 nodes->sfp_props[3] = PROPERTY_ENTRY_REF_ARRAY("tx-disable-gpios", nodes->gpio1_ref);
69 nodes->sfp_props[4] = PROPERTY_ENTRY_REF_ARRAY("mod-def0-gpios", nodes->gpio2_ref);
70 nodes->sfp_props[5] = PROPERTY_ENTRY_REF_ARRAY("los-gpios", nodes->gpio3_ref);
71 nodes->sfp_props[6] = PROPERTY_ENTRY_REF_ARRAY("rate-select1-gpios", nodes->gpio4_ref);
72 nodes->sfp_props[7] = PROPERTY_ENTRY_REF_ARRAY("rate-select0-gpios", nodes->gpio5_ref);
73 swnodes[SWNODE_SFP] = NODE_PROP(nodes->sfp_name, nodes->sfp_props);
74 nodes->sfp_ref[0] = SOFTWARE_NODE_REFERENCE(&swnodes[SWNODE_SFP]);
76 nodes->phylink_props[0] = PROPERTY_ENTRY_STRING("managed", "in-band-status");
77 nodes->phylink_props[1] = PROPERTY_ENTRY_REF_ARRAY("sfp", nodes->sfp_ref);
78 swnodes[SWNODE_PHYLINK] = NODE_PROP(nodes->phylink_name, nodes->phylink_props);
80 nodes->group[SWNODE_GPIO] = &swnodes[SWNODE_GPIO];
81 nodes->group[SWNODE_I2C] = &swnodes[SWNODE_I2C];
82 nodes->group[SWNODE_SFP] = &swnodes[SWNODE_SFP];
83 nodes->group[SWNODE_PHYLINK] = &swnodes[SWNODE_PHYLINK];
85 return software_node_register_node_group(nodes->group);
90 struct wx *wx = bus->priv;
94 return -EOPNOTSUPP;
109 struct wx *wx = bus->priv;
113 return -EOPNOTSUPP;
134 wx = txgbe->wx;
135 pdev = wx->pdev;
137 mii_bus = devm_mdiobus_alloc(&pdev->dev);
139 return -ENOMEM;
141 mii_bus->name = "txgbe_pcs_mdio_bus";
142 mii_bus->read_c45 = &txgbe_pcs_read;
143 mii_bus->write_c45 = &txgbe_pcs_write;
144 mii_bus->parent = &pdev->dev;
145 mii_bus->phy_mask = ~0;
146 mii_bus->priv = wx;
147 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "txgbe_pcs-%x",
150 ret = devm_mdiobus_register(&pdev->dev, mii_bus);
158 txgbe->pcs = pcs;
167 struct txgbe *txgbe = wx->priv;
169 if (wx->media_type != wx_media_copper)
170 return txgbe->pcs;
187 wx->speed = SPEED_UNKNOWN;
188 if (test_bit(WX_STATE_PTP_RUNNING, wx->state))
229 wx->speed = speed;
230 wx->last_rx_ptp_check = jiffies;
231 if (test_bit(WX_STATE_PTP_RUNNING, wx->state))
272 struct wx *wx = txgbe->wx;
276 config = &wx->phylink_config;
277 config->dev = &wx->netdev->dev;
278 config->type = PHYLINK_NETDEV;
279 config->mac_capabilities = MAC_10000FD | MAC_1000FD | MAC_100FD |
282 if (wx->media_type == wx_media_copper) {
284 __set_bit(PHY_INTERFACE_MODE_XAUI, config->supported_interfaces);
287 fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_PHYLINK]);
288 __set_bit(PHY_INTERFACE_MODE_10GBASER, config->supported_interfaces);
289 __set_bit(PHY_INTERFACE_MODE_1000BASEX, config->supported_interfaces);
290 __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces);
297 if (wx->phydev) {
300 ret = phylink_connect_phy(phylink, wx->phydev);
307 wx->phylink = phylink;
315 struct wx *wx = txgbe->wx;
322 if (txgbe->pcs)
323 phylink_pcs_change(txgbe->pcs, up);
325 phylink_mac_change(wx->phylink, up);
357 raw_spin_lock_irqsave(&wx->gpio_lock, flags);
359 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags);
373 raw_spin_lock_irqsave(&wx->gpio_lock, flags);
376 raw_spin_unlock_irqrestore(&wx->gpio_lock, flags);
388 wx = txgbe->wx;
389 dev = &wx->pdev->dev;
391 raw_spin_lock_init(&wx->gpio_lock);
395 return -ENOMEM;
397 gc->label = devm_kasprintf(dev, GFP_KERNEL, "txgbe_gpio-%x",
398 pci_dev_id(wx->pdev));
399 if (!gc->label)
400 return -ENOMEM;
402 gc->base = -1;
403 gc->ngpio = 6;
404 gc->owner = THIS_MODULE;
405 gc->parent = dev;
406 gc->fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_GPIO]);
407 gc->get = txgbe_gpio_get;
408 gc->get_direction = txgbe_gpio_get_direction;
409 gc->direction_input = txgbe_gpio_direction_in;
410 gc->direction_output = txgbe_gpio_direction_out;
416 txgbe->gpio = gc;
423 struct pci_dev *pdev = txgbe->wx->pdev;
438 return -ENOMEM;
441 txgbe->clk = clk;
442 txgbe->clock = clock;
481 wx = txgbe->wx;
482 pdev = wx->pdev;
483 i2c_regmap = devm_regmap_init(&pdev->dev, NULL, wx, &i2c_regmap_config);
489 info.parent = &pdev->dev;
490 info.fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_I2C]);
494 info.res = &DEFINE_RES_IRQ(pdev->irq);
500 txgbe->i2c_dev = i2c_dev;
507 struct pci_dev *pdev = txgbe->wx->pdev;
511 info.parent = &pdev->dev;
512 info.fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_SFP]);
519 txgbe->sfp_dev = sfp_dev;
532 wx = txgbe->wx;
533 pdev = wx->pdev;
535 mii_bus = devm_mdiobus_alloc(&pdev->dev);
537 return -ENOMEM;
539 mii_bus->name = "txgbe_mii_bus";
540 mii_bus->read_c45 = &wx_phy_read_reg_mdi_c45;
541 mii_bus->write_c45 = &wx_phy_write_reg_mdi_c45;
542 mii_bus->parent = &pdev->dev;
543 mii_bus->phy_mask = GENMASK(31, 1);
544 mii_bus->priv = wx;
545 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "txgbe-%x", pci_dev_id(pdev));
547 ret = devm_mdiobus_register(&pdev->dev, mii_bus);
556 return -ENODEV;
561 wx->link = 0;
562 wx->speed = 0;
563 wx->duplex = 0;
564 wx->phydev = phydev;
577 struct wx *wx = txgbe->wx;
580 switch (wx->mac.type) {
586 if (wx->media_type == wx_media_copper)
638 platform_device_unregister(txgbe->i2c_dev);
640 clkdev_drop(txgbe->clock);
641 clk_unregister(txgbe->clk);
643 phylink_destroy(wx->phylink);
645 xpcs_destroy_pcs(txgbe->pcs);
647 software_node_unregister_node_group(txgbe->nodes.group);
654 switch (txgbe->wx->mac.type) {
658 phylink_destroy(txgbe->wx->phylink);
661 if (txgbe->wx->media_type == wx_media_copper) {
662 phylink_disconnect_phy(txgbe->wx->phylink);
663 phylink_destroy(txgbe->wx->phylink);
671 platform_device_unregister(txgbe->sfp_dev);
672 platform_device_unregister(txgbe->i2c_dev);
673 clkdev_drop(txgbe->clock);
674 clk_unregister(txgbe->clk);
675 phylink_destroy(txgbe->wx->phylink);
676 xpcs_destroy_pcs(txgbe->pcs);
677 software_node_unregister_node_group(txgbe->nodes.group);