Lines Matching +full:low +full:- +full:vt
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
17 struct wx *wx = bus->priv; in wx_phy_read_reg_mdi()
28 if (wx->mac.type == wx_mac_em) in wx_phy_read_reg_mdi()
46 struct wx *wx = bus->priv; in wx_phy_write_reg_mdi()
57 if (wx->mac.type == wx_mac_em) in wx_phy_write_reg_mdi()
72 struct wx *wx = bus->priv; in wx_phy_read_reg_mdi_c22()
81 struct wx *wx = bus->priv; in wx_phy_write_reg_mdi_c22()
90 struct wx *wx = bus->priv; in wx_phy_read_reg_mdi_c45()
100 struct wx *wx = bus->priv; in wx_phy_write_reg_mdi_c45()
115 switch (wx->mac.type) { in wx_intr_disable()
135 switch (wx->mac.type) { in wx_intr_enable()
149 * wx_irq_disable - Mask off interrupt generation on the NIC
154 struct pci_dev *pdev = wx->pdev; in wx_irq_disable()
159 if (pdev->msix_enabled) { in wx_irq_disable()
162 for (vector = 0; vector < wx->num_q_vectors; vector++) in wx_irq_disable()
163 synchronize_irq(wx->msix_q_entries[vector].vector); in wx_irq_disable()
165 synchronize_irq(wx->msix_entry->vector); in wx_irq_disable()
167 synchronize_irq(pdev->irq); in wx_irq_disable()
232 * wx_mng_present - returns 0 when management capability is present
243 return -EACCES; in wx_mng_present()
251 * wx_release_sw_sync - Release SW semaphore
266 * wx_acquire_sw_sync - Acquire SW semaphore
325 status = -EINVAL; in wx_host_interface_command_s()
356 buf_len = ((struct wx_hic_hdr *)buffer)->buf_len; in wx_host_interface_command_s()
362 status = -EFAULT; in wx_host_interface_command_s()
394 if (recv_hdr->cmd == send_cmd && in wx_poll_fw_reply()
395 recv_hdr->index == wx->swfw_index) in wx_poll_fw_reply()
416 false, WX_STATE_SWFW_BUSY, wx->state); in wx_host_interface_command_r()
421 hdr->index = wx->swfw_index; in wx_host_interface_command_r()
422 send_cmd = hdr->cmd; in wx_host_interface_command_r()
425 /* write data to SW-FW mbox array */ in wx_host_interface_command_r()
441 send_cmd, wx->swfw_index); in wx_host_interface_command_r()
450 buf_len = hdr->buf_len; in wx_host_interface_command_r()
456 err = -EFAULT; in wx_host_interface_command_r()
469 if (wx->swfw_index == WX_HIC_HDR_INDEX_MAX) in wx_host_interface_command_r()
470 wx->swfw_index = 0; in wx_host_interface_command_r()
472 wx->swfw_index++; in wx_host_interface_command_r()
474 clear_bit(WX_STATE_SWFW_BUSY, wx->state); in wx_host_interface_command_r()
479 * wx_host_interface_command - Issue command to manageability block
497 return -EINVAL; in wx_host_interface_command()
503 return -EINVAL; in wx_host_interface_command()
506 if (test_bit(WX_FLAG_SWFW_RING, wx->flags)) in wx_host_interface_command()
521 pps_cmd.lan_id = wx->bus.func; in wx_set_pps()
534 * wx_read_ee_hostif_data - Read EEPROM word using a host interface cmd
563 if (!test_bit(WX_FLAG_SWFW_RING, wx->flags)) in wx_read_ee_hostif_data()
572 * wx_read_ee_hostif - Read EEPROM word using a host interface cmd
594 * wx_read_ee_hostif_buffer- Read EEPROM word(s) using hostif
643 if (!test_bit(WX_FLAG_SWFW_RING, wx->flags)) in wx_read_ee_hostif_buffer()
660 words -= words_to_read; in wx_read_ee_hostif_buffer()
670 * wx_init_eeprom_params - Initialize EEPROM params
678 struct wx_eeprom_info *eeprom = &wx->eeprom; in wx_init_eeprom_params()
682 if (eeprom->type == wx_eeprom_uninitialized) { in wx_init_eeprom_params()
683 eeprom->semaphore_delay = 10; in wx_init_eeprom_params()
684 eeprom->type = wx_eeprom_none; in wx_init_eeprom_params()
688 eeprom->type = wx_flash; in wx_init_eeprom_params()
691 eeprom->word_size = eeprom_size >> 1; in wx_init_eeprom_params()
694 eeprom->type, eeprom->word_size); in wx_init_eeprom_params()
698 switch (wx->mac.type) { in wx_init_eeprom_params()
711 eeprom->sw_region_offset = data; in wx_init_eeprom_params()
716 * wx_get_mac_addr - Generic get MAC address
735 mac_addr[i] = (u8)(rar_high >> (1 - i) * 8); in wx_get_mac_addr()
738 mac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8); in wx_get_mac_addr()
743 * wx_set_rar - Set Rx address register
755 u32 rar_entries = wx->mac.num_rar_entries; in wx_set_rar()
761 return -EINVAL; in wx_set_rar()
770 switch (wx->mac.type) { in wx_set_rar()
806 * wx_clear_rar - Remove Rx address register
814 u32 rar_entries = wx->mac.num_rar_entries; in wx_clear_rar()
819 return -EINVAL; in wx_clear_rar()
842 * wx_clear_vmdq - Disassociate a VMDq pool index from a rx address
849 u32 rar_entries = wx->mac.num_rar_entries; in wx_clear_vmdq()
855 return -EINVAL; in wx_clear_vmdq()
873 * wx_init_uta_tables - Initialize the Unicast Table Array
887 * wx_init_rx_addrs - Initializes receive address filters.
896 u32 rar_entries = wx->mac.num_rar_entries; in wx_init_rx_addrs()
904 if (!is_valid_ether_addr(wx->mac.addr)) { in wx_init_rx_addrs()
906 wx_get_mac_addr(wx, wx->mac.addr); in wx_init_rx_addrs()
907 wx_dbg(wx, "Keeping Current RAR0 Addr = %pM\n", wx->mac.addr); in wx_init_rx_addrs()
911 wx_dbg(wx, "New MAC Addr = %pM\n", wx->mac.addr); in wx_init_rx_addrs()
913 wx_set_rar(wx, 0, wx->mac.addr, 0, WX_PSR_MAC_SWC_AD_H_AV); in wx_init_rx_addrs()
915 switch (wx->mac.type) { in wx_init_rx_addrs()
927 wx_dbg(wx, "Clearing RAR[1-%d]\n", rar_entries - 1); in wx_init_rx_addrs()
935 wx->addr_ctrl.mta_in_use = 0; in wx_init_rx_addrs()
938 psrctl |= wx->mac.mc_filter_type << WX_PSR_CTL_MO_SHIFT; in wx_init_rx_addrs()
941 for (i = 0; i < wx->mac.mcft_size; i++) in wx_init_rx_addrs()
952 for (i = 0; i < wx->mac.num_rar_entries; i++) { in wx_sync_mac_table()
953 if (wx->mac_table[i].state & WX_MAC_STATE_MODIFIED) { in wx_sync_mac_table()
954 if (wx->mac_table[i].state & WX_MAC_STATE_IN_USE) { in wx_sync_mac_table()
956 wx->mac_table[i].addr, in wx_sync_mac_table()
957 wx->mac_table[i].pools, in wx_sync_mac_table()
962 wx->mac_table[i].state &= ~(WX_MAC_STATE_MODIFIED); in wx_sync_mac_table()
970 memcpy(&wx->mac_table[0].addr, addr, ETH_ALEN); in wx_mac_set_default_filter()
971 wx->mac_table[0].pools = 1ULL; in wx_mac_set_default_filter()
972 wx->mac_table[0].state = (WX_MAC_STATE_DEFAULT | WX_MAC_STATE_IN_USE); in wx_mac_set_default_filter()
973 wx_set_rar(wx, 0, wx->mac_table[0].addr, in wx_mac_set_default_filter()
974 wx->mac_table[0].pools, in wx_mac_set_default_filter()
983 for (i = 0; i < wx->mac.num_rar_entries; i++) { in wx_flush_sw_mac_table()
984 if (!(wx->mac_table[i].state & WX_MAC_STATE_IN_USE)) in wx_flush_sw_mac_table()
987 wx->mac_table[i].state |= WX_MAC_STATE_MODIFIED; in wx_flush_sw_mac_table()
988 wx->mac_table[i].state &= ~WX_MAC_STATE_IN_USE; in wx_flush_sw_mac_table()
989 memset(wx->mac_table[i].addr, 0, ETH_ALEN); in wx_flush_sw_mac_table()
990 wx->mac_table[i].pools = 0; in wx_flush_sw_mac_table()
1001 return -EINVAL; in wx_add_mac_filter()
1003 for (i = 0; i < wx->mac.num_rar_entries; i++) { in wx_add_mac_filter()
1004 if (wx->mac_table[i].state & WX_MAC_STATE_IN_USE) { in wx_add_mac_filter()
1005 if (ether_addr_equal(addr, wx->mac_table[i].addr)) { in wx_add_mac_filter()
1006 if (wx->mac_table[i].pools != (1ULL << pool)) { in wx_add_mac_filter()
1007 memcpy(wx->mac_table[i].addr, addr, ETH_ALEN); in wx_add_mac_filter()
1008 wx->mac_table[i].pools |= (1ULL << pool); in wx_add_mac_filter()
1015 if (wx->mac_table[i].state & WX_MAC_STATE_IN_USE) in wx_add_mac_filter()
1017 wx->mac_table[i].state |= (WX_MAC_STATE_MODIFIED | in wx_add_mac_filter()
1019 memcpy(wx->mac_table[i].addr, addr, ETH_ALEN); in wx_add_mac_filter()
1020 wx->mac_table[i].pools |= (1ULL << pool); in wx_add_mac_filter()
1024 return -ENOMEM; in wx_add_mac_filter()
1032 return -EINVAL; in wx_del_mac_filter()
1035 for (i = 0; i < wx->mac.num_rar_entries; i++) { in wx_del_mac_filter()
1036 if (!ether_addr_equal(addr, wx->mac_table[i].addr)) in wx_del_mac_filter()
1039 wx->mac_table[i].state |= WX_MAC_STATE_MODIFIED; in wx_del_mac_filter()
1040 wx->mac_table[i].pools &= ~(1ULL << pool); in wx_del_mac_filter()
1041 if (!wx->mac_table[i].pools) { in wx_del_mac_filter()
1042 wx->mac_table[i].state &= ~WX_MAC_STATE_IN_USE; in wx_del_mac_filter()
1043 memset(wx->mac_table[i].addr, 0, ETH_ALEN); in wx_del_mac_filter()
1048 return -ENOMEM; in wx_del_mac_filter()
1055 for (i = 0; i < wx->mac.num_rar_entries; i++) { in wx_available_rars()
1056 if (wx->mac_table[i].state == 0) in wx_available_rars()
1064 * wx_write_uc_addr_list - write unicast addresses to RAR table
1069 * Returns: -ENOMEM on failure/insufficient address space
1080 return -ENOMEM; in wx_write_uc_addr_list()
1086 wx_del_mac_filter(wx, ha->addr, pool); in wx_write_uc_addr_list()
1087 wx_add_mac_filter(wx, ha->addr, pool); in wx_write_uc_addr_list()
1095 * wx_mta_vector - Determines bit-vector in multicast table to set
1100 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
1101 * incoming rx multicast addresses, to determine the bit-vector to check in
1102 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
1110 switch (wx->mac.mc_filter_type) { in wx_mta_vector()
1128 /* vector can only be 12-bits or boundary will be exceeded */ in wx_mta_vector()
1134 * wx_set_mta - Set bit-vector in multicast table
1138 * Sets the bit-vector in the multicast table.
1144 wx->addr_ctrl.mta_in_use++; in wx_set_mta()
1147 wx_dbg(wx, " bit-vector = 0x%03X\n", vector); in wx_set_mta()
1149 /* The MTA is a register array of 128 32-bit registers. It is treated in wx_set_mta()
1159 wx->mac.mta_shadow[vector_reg] |= (1 << vector_bit); in wx_set_mta()
1163 * wx_update_mc_addr_list - Updates MAC list of multicast addresses
1180 wx->addr_ctrl.num_mc_addrs = netdev_mc_count(netdev); in wx_update_mc_addr_list()
1181 wx->addr_ctrl.mta_in_use = 0; in wx_update_mc_addr_list()
1185 memset(&wx->mac.mta_shadow, 0, sizeof(wx->mac.mta_shadow)); in wx_update_mc_addr_list()
1190 wx_set_mta(wx, ha->addr); in wx_update_mc_addr_list()
1194 for (i = 0; i < wx->mac.mcft_size; i++) in wx_update_mc_addr_list()
1196 wx->mac.mta_shadow[i]); in wx_update_mc_addr_list()
1198 if (wx->addr_ctrl.mta_in_use > 0) { in wx_update_mc_addr_list()
1202 (wx->mac.mc_filter_type << WX_PSR_CTL_MO_SHIFT); in wx_update_mc_addr_list()
1210 * wx_write_mc_addr_list - write multicast addresses to MTA
1230 * wx_set_mac - Change the Ethernet Address of the NIC
1246 wx_del_mac_filter(wx, wx->mac.addr, 0); in wx_set_mac()
1247 eth_hw_addr_set(netdev, addr->sa_data); in wx_set_mac()
1248 memcpy(wx->mac.addr, addr->sa_data, netdev->addr_len); in wx_set_mac()
1250 wx_mac_set_default_filter(wx, wx->mac.addr); in wx_set_mac()
1267 wx->mac.set_lben = true; in wx_disable_rx()
1269 wx->mac.set_lben = false; in wx_disable_rx()
1274 if (!(((wx->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) || in wx_disable_rx()
1275 ((wx->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) { in wx_disable_rx()
1295 if (wx->mac.set_lben) { in wx_enable_rx()
1299 wx->mac.set_lben = false; in wx_enable_rx()
1304 * wx_set_rxpba - Initialize Rx packet buffer
1310 u32 pbsize = wx->mac.rx_pb_size; in wx_set_rxpba()
1312 if (test_bit(WX_FLAG_FDIR_CAPABLE, wx->flags)) { in wx_set_rxpba()
1313 if (test_bit(WX_FLAG_FDIR_HASH, wx->flags) || in wx_set_rxpba()
1314 test_bit(WX_FLAG_FDIR_PERFECT, wx->flags)) in wx_set_rxpba()
1315 pbsize -= 64; /* Default 64KB */ in wx_set_rxpba()
1322 txpktsize = wx->mac.tx_pb_size; in wx_set_rxpba()
1323 txpbthresh = (txpktsize / 1024) - WX_TXPKT_SIZE_MAX; in wx_set_rxpba()
1331 * wx_hpbthresh - calculate high water mark for flow control
1337 struct net_device *dev = wx->netdev; in wx_hpbthresh()
1342 link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + WX_ETH_FRAMING; in wx_hpbthresh()
1352 marker = rx_pba - kb; in wx_hpbthresh()
1359 dev_warn(&wx->pdev->dev, in wx_hpbthresh()
1368 * wx_lpbthresh - calculate low water mark for flow control
1374 struct net_device *dev = wx->netdev; in wx_lpbthresh()
1379 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN; in wx_lpbthresh()
1389 * wx_pbthresh_setup - calculate and setup high low water marks
1395 wx->fc.high_water = wx_hpbthresh(wx); in wx_pbthresh_setup()
1396 wx->fc.low_water = wx_lpbthresh(wx); in wx_pbthresh_setup()
1398 /* Low water marks must not be larger than high water marks */ in wx_pbthresh_setup()
1399 if (wx->fc.low_water > wx->fc.high_water) in wx_pbthresh_setup()
1400 wx->fc.low_water = 0; in wx_pbthresh_setup()
1415 wx->tpid[0] = ETH_P_8021Q; in wx_configure_port()
1416 wx->tpid[1] = ETH_P_8021AD; in wx_configure_port()
1421 wx->tpid[i] = ETH_P_8021Q; in wx_configure_port()
1425 * wx_disable_sec_rx_path - Stops the receive data path
1444 * wx_enable_sec_rx_path - Enables the receive data path
1460 for (i = 0; i < wx->num_rx_queues; i++) { in wx_vlan_strip_control()
1461 struct wx_ring *ring = wx->rx_ring[i]; in wx_vlan_strip_control()
1463 j = ring->reg_idx; in wx_vlan_strip_control()
1476 features = netdev->features; in wx_set_rx_mode()
1496 wx->addr_ctrl.user_set_promisc = false; in wx_set_rx_mode()
1497 if (netdev->flags & IFF_PROMISC) { in wx_set_rx_mode()
1498 wx->addr_ctrl.user_set_promisc = true; in wx_set_rx_mode()
1505 if (netdev->flags & IFF_ALLMULTI) { in wx_set_rx_mode()
1510 if (netdev->features & NETIF_F_RXALL) { in wx_set_rx_mode()
1556 struct net_device *netdev = wx->netdev; in wx_set_rx_buffer_len()
1559 max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; in wx_set_rx_buffer_len()
1570 * wx_change_mtu - Change the Maximum Transfer Unit
1580 WRITE_ONCE(netdev->mtu, new_mtu); in wx_change_mtu()
1590 u8 reg_idx = ring->reg_idx; in wx_disable_rx_queue()
1602 if (ret == -ETIMEDOUT) { in wx_disable_rx_queue()
1613 u8 reg_idx = ring->reg_idx; in wx_enable_rx_queue()
1620 if (ret == -ETIMEDOUT) { in wx_enable_rx_queue()
1631 u16 reg_idx = rx_ring->reg_idx; in wx_configure_srrctl()
1651 u8 reg_idx = ring->reg_idx; in wx_configure_tx_ring()
1652 u64 tdba = ring->dma; in wx_configure_tx_ring()
1665 ring->tail = wx->hw_addr + WX_PX_TR_WP(reg_idx); in wx_configure_tx_ring()
1667 if (ring->count < WX_MAX_TXD) in wx_configure_tx_ring()
1668 txdctl |= ring->count / 128 << WX_PX_TR_CFG_TR_SIZE_SHIFT; in wx_configure_tx_ring()
1671 ring->atr_count = 0; in wx_configure_tx_ring()
1672 if (test_bit(WX_FLAG_FDIR_CAPABLE, wx->flags) && in wx_configure_tx_ring()
1673 test_bit(WX_FLAG_FDIR_HASH, wx->flags)) in wx_configure_tx_ring()
1674 ring->atr_sample_rate = wx->atr_sample_rate; in wx_configure_tx_ring()
1676 ring->atr_sample_rate = 0; in wx_configure_tx_ring()
1679 memset(ring->tx_buffer_info, 0, in wx_configure_tx_ring()
1680 sizeof(struct wx_tx_buffer) * ring->count); in wx_configure_tx_ring()
1688 if (ret == -ETIMEDOUT) in wx_configure_tx_ring()
1695 u16 reg_idx = ring->reg_idx; in wx_configure_rx_ring()
1697 u64 rdba = ring->dma; in wx_configure_rx_ring()
1707 if (ring->count == WX_MAX_RXD) in wx_configure_rx_ring()
1710 rxdctl |= (ring->count / 128) << WX_PX_RR_CFG_RR_SIZE_SHIFT; in wx_configure_rx_ring()
1718 ring->tail = wx->hw_addr + WX_PX_RR_WP(reg_idx); in wx_configure_rx_ring()
1723 memset(ring->rx_buffer_info, 0, in wx_configure_rx_ring()
1724 sizeof(struct wx_rx_buffer) * ring->count); in wx_configure_rx_ring()
1728 rx_desc->wb.upper.length = 0; in wx_configure_rx_ring()
1739 * wx_configure_tx - Configure Transmit Unit after Reset
1753 for (i = 0; i < wx->num_tx_queues; i++) in wx_configure_tx()
1754 wx_configure_tx_ring(wx, wx->tx_ring[i]); in wx_configure_tx()
1758 if (wx->mac.type == wx_mac_em) in wx_configure_tx()
1770 wx_vlan_rx_add_vid(wx->netdev, htons(ETH_P_8021Q), 0); in wx_restore_vlan()
1772 for_each_set_bit_from(vid, wx->active_vlans, VLAN_N_VID) in wx_restore_vlan()
1773 wx_vlan_rx_add_vid(wx->netdev, htons(ETH_P_8021Q), vid); in wx_restore_vlan()
1778 u8 *indir_tbl = wx->rss_indir_tbl; in wx_store_reta()
1783 * - 8 bit wide entries containing 4 bit RSS index in wx_store_reta()
1796 u16 rss_i = wx->ring_feature[RING_F_RSS].indices; in wx_setup_reta()
1802 wr32(wx, WX_RDB_RSSRK(i), wx->rss_key[i]); in wx_setup_reta()
1805 memset(wx->rss_indir_tbl, 0, sizeof(wx->rss_indir_tbl)); in wx_setup_reta()
1811 wx->rss_indir_tbl[i] = j; in wx_setup_reta()
1832 netdev_rss_key_fill(wx->rss_key, sizeof(wx->rss_key)); in wx_setup_mrqc()
1836 if (wx->rss_enabled) in wx_setup_mrqc()
1843 * wx_configure_rx - Configure Receive Unit after Reset
1864 if (test_bit(WX_FLAG_RSC_CAPABLE, wx->flags)) { in wx_configure_rx()
1882 for (i = 0; i < wx->num_rx_queues; i++) in wx_configure_rx()
1883 wx_configure_rx_ring(wx, wx->rx_ring[i]); in wx_configure_rx()
1898 wr32(wx, WX_PX_ISB_ADDR_L, wx->isb_dma & DMA_BIT_MASK(32)); in wx_configure_isb()
1900 wr32(wx, WX_PX_ISB_ADDR_H, upper_32_bits(wx->isb_dma)); in wx_configure_isb()
1909 wx_set_rx_mode(wx->netdev); in wx_configure()
1912 if (test_bit(WX_FLAG_FDIR_CAPABLE, wx->flags)) in wx_configure()
1913 wx->configure_fdir(wx); in wx_configure()
1922 * wx_disable_pcie_master - Disable PCI-express master access
1925 * Disables PCI-Express master access and verifies there are no pending
1934 pci_clear_master(wx->pdev); in wx_disable_pcie_master()
1951 * wx_stop_adapter - Generic stop Tx/Rx units
1966 wx->adapter_stopped = true; in wx_stop_adapter()
1979 for (i = 0; i < wx->mac.max_tx_queues; i++) { in wx_stop_adapter()
1986 for (i = 0; i < wx->mac.max_rx_queues; i++) { in wx_stop_adapter()
1994 /* Prevent the PCI-E bus from hanging by disabling PCI-E master in wx_stop_adapter()
2041 * wx_get_pcie_msix_counts - Gets MSI-X vector count
2046 * Read PCIe configuration space, and get the MSI-X vector count from
2051 struct pci_dev *pdev = wx->pdev; in wx_get_pcie_msix_counts()
2052 struct device *dev = &pdev->dev; in wx_get_pcie_msix_counts()
2058 dev_err(dev, "Unable to find MSI-X Capabilities\n"); in wx_get_pcie_msix_counts()
2059 return -EINVAL; in wx_get_pcie_msix_counts()
2065 /* MSI-X count is zero-based in HW */ in wx_get_pcie_msix_counts()
2076 * wx_init_rss_key - Initialize wx RSS key
2085 if (!wx->rss_key) { in wx_init_rss_key()
2088 return -ENOMEM; in wx_init_rss_key()
2091 wx->rss_key = rss_key; in wx_init_rss_key()
2099 struct pci_dev *pdev = wx->pdev; in wx_sw_init()
2103 wx->vendor_id = pdev->vendor; in wx_sw_init()
2104 wx->device_id = pdev->device; in wx_sw_init()
2105 wx->revision_id = pdev->revision; in wx_sw_init()
2106 wx->oem_svid = pdev->subsystem_vendor; in wx_sw_init()
2107 wx->oem_ssid = pdev->subsystem_device; in wx_sw_init()
2108 wx->bus.device = PCI_SLOT(pdev->devfn); in wx_sw_init()
2109 wx->bus.func = PCI_FUNC(pdev->devfn); in wx_sw_init()
2111 if (wx->oem_svid == PCI_VENDOR_ID_WANGXUN) { in wx_sw_init()
2112 wx->subsystem_vendor_id = pdev->subsystem_vendor; in wx_sw_init()
2113 wx->subsystem_device_id = pdev->subsystem_device; in wx_sw_init()
2121 wx->subsystem_device_id = swab16((u16)ssid); in wx_sw_init()
2130 wx->mac_table = kcalloc(wx->mac.num_rar_entries, in wx_sw_init()
2133 if (!wx->mac_table) { in wx_sw_init()
2135 kfree(wx->rss_key); in wx_sw_init()
2136 return -ENOMEM; in wx_sw_init()
2139 bitmap_zero(wx->state, WX_STATE_NBITS); in wx_sw_init()
2140 bitmap_zero(wx->flags, WX_PF_FLAGS_NBITS); in wx_sw_init()
2141 wx->misc_irq_domain = false; in wx_sw_init()
2148 * wx_find_vlvf_slot - find the vlanid or the first empty slot
2180 regindex = -ENOMEM; in wx_find_vlvf_slot()
2187 * wx_set_vlvf - Set VLAN Pool Filter
2201 u32 vt, bits; in wx_set_vlvf() local
2203 /* If VT Mode is set in wx_set_vlvf()
2210 vt = rd32(wx, WX_CFG_PORT_CTL); in wx_set_vlvf()
2211 if (!(vt & WX_CFG_PORT_CTL_NUM_VT_MASK)) in wx_set_vlvf()
2227 bits |= (1 << (vind - 32)); in wx_set_vlvf()
2239 bits &= ~(1 << (vind - 32)); in wx_set_vlvf()
2257 * wx_set_vfta - Set VLAN filter table
2271 /* this is a 2 part operation - first the VFTA, then the in wx_set_vfta()
2272 * VLVF and VLVFB if VT Mode is set in wx_set_vfta()
2277 * The VFTA is a bitstring made up of 128 32-bit registers in wx_set_vfta()
2279 * bits[11-5]: which register in wx_set_vfta()
2280 * bits[4-0]: which bit in the register in wx_set_vfta()
2286 vfta = wx->mac.vft_shadow[regindex]; in wx_set_vfta()
2307 wx->mac.vft_shadow[regindex] = vfta; in wx_set_vfta()
2313 * wx_clear_vfta - Clear VLAN filter table
2322 for (offset = 0; offset < wx->mac.vft_size; offset++) { in wx_clear_vfta()
2324 wx->mac.vft_shadow[offset] = 0; in wx_clear_vfta()
2342 set_bit(vid, wx->active_vlans); in wx_vlan_rx_add_vid()
2355 clear_bit(vid, wx->active_vlans); in wx_vlan_rx_kill_vid()
2363 u16 reg_idx = ring->reg_idx; in wx_enable_rx_drop()
2374 u16 reg_idx = ring->reg_idx; in wx_disable_rx_drop()
2390 /* Low water mark of zero causes XOFF floods */ in wx_fc_enable()
2391 if (tx_pause && wx->fc.high_water) { in wx_fc_enable()
2392 if (!wx->fc.low_water || wx->fc.low_water >= wx->fc.high_water) { in wx_fc_enable()
2394 return -EINVAL; in wx_fc_enable()
2414 /* Set up and enable Rx high/low water mark thresholds, enable XON. */ in wx_fc_enable()
2415 if (tx_pause && wx->fc.high_water) { in wx_fc_enable()
2416 fcrtl = (wx->fc.low_water << 10) | WX_RDB_RFCL_XONE; in wx_fc_enable()
2418 fcrth = (wx->fc.high_water << 10) | WX_RDB_RFCH_XOFFE; in wx_fc_enable()
2423 * to the Rx packet buffer size - 24KB. This allows in wx_fc_enable()
2427 fcrth = rd32(wx, WX_RDB_PB_SZ(0)) - 24576; in wx_fc_enable()
2445 if (wx->num_rx_queues > 1 && !tx_pause) { in wx_fc_enable()
2446 for (i = 0; i < wx->num_rx_queues; i++) in wx_fc_enable()
2447 wx_enable_rx_drop(wx, wx->rx_ring[i]); in wx_fc_enable()
2449 for (i = 0; i < wx->num_rx_queues; i++) in wx_fc_enable()
2450 wx_disable_rx_drop(wx, wx->rx_ring[i]); in wx_fc_enable()
2458 * wx_update_stats - Update the board statistics counters.
2463 struct wx_hw_stats *hwstats = &wx->stats; in wx_update_stats()
2471 for (i = 0; i < wx->num_rx_queues; i++) { in wx_update_stats()
2472 struct wx_ring *rx_ring = wx->rx_ring[i]; in wx_update_stats()
2474 non_eop_descs += rx_ring->rx_stats.non_eop_descs; in wx_update_stats()
2475 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed; in wx_update_stats()
2476 hw_csum_rx_good += rx_ring->rx_stats.csum_good_cnt; in wx_update_stats()
2477 hw_csum_rx_error += rx_ring->rx_stats.csum_err; in wx_update_stats()
2479 wx->non_eop_descs = non_eop_descs; in wx_update_stats()
2480 wx->alloc_rx_buff_failed = alloc_rx_buff_failed; in wx_update_stats()
2481 wx->hw_csum_rx_error = hw_csum_rx_error; in wx_update_stats()
2482 wx->hw_csum_rx_good = hw_csum_rx_good; in wx_update_stats()
2484 for (i = 0; i < wx->num_tx_queues; i++) { in wx_update_stats()
2485 struct wx_ring *tx_ring = wx->tx_ring[i]; in wx_update_stats()
2487 restart_queue += tx_ring->tx_stats.restart_queue; in wx_update_stats()
2488 tx_busy += tx_ring->tx_stats.tx_busy; in wx_update_stats()
2490 wx->restart_queue = restart_queue; in wx_update_stats()
2491 wx->tx_busy = tx_busy; in wx_update_stats()
2493 hwstats->gprc += rd32(wx, WX_RDM_PKT_CNT); in wx_update_stats()
2494 hwstats->gptc += rd32(wx, WX_TDM_PKT_CNT); in wx_update_stats()
2495 hwstats->gorc += rd64(wx, WX_RDM_BYTE_CNT_LSB); in wx_update_stats()
2496 hwstats->gotc += rd64(wx, WX_TDM_BYTE_CNT_LSB); in wx_update_stats()
2497 hwstats->tpr += rd64(wx, WX_RX_FRAME_CNT_GOOD_BAD_L); in wx_update_stats()
2498 hwstats->tpt += rd64(wx, WX_TX_FRAME_CNT_GOOD_BAD_L); in wx_update_stats()
2499 hwstats->crcerrs += rd64(wx, WX_RX_CRC_ERROR_FRAMES_L); in wx_update_stats()
2500 hwstats->rlec += rd64(wx, WX_RX_LEN_ERROR_FRAMES_L); in wx_update_stats()
2501 hwstats->bprc += rd64(wx, WX_RX_BC_FRAMES_GOOD_L); in wx_update_stats()
2502 hwstats->bptc += rd64(wx, WX_TX_BC_FRAMES_GOOD_L); in wx_update_stats()
2503 hwstats->mprc += rd64(wx, WX_RX_MC_FRAMES_GOOD_L); in wx_update_stats()
2504 hwstats->mptc += rd64(wx, WX_TX_MC_FRAMES_GOOD_L); in wx_update_stats()
2505 hwstats->roc += rd32(wx, WX_RX_OVERSIZE_FRAMES_GOOD); in wx_update_stats()
2506 hwstats->ruc += rd32(wx, WX_RX_UNDERSIZE_FRAMES_GOOD); in wx_update_stats()
2507 hwstats->lxonoffrxc += rd32(wx, WX_MAC_LXONOFFRXC); in wx_update_stats()
2508 hwstats->lxontxc += rd32(wx, WX_RDB_LXONTXC); in wx_update_stats()
2509 hwstats->lxofftxc += rd32(wx, WX_RDB_LXOFFTXC); in wx_update_stats()
2510 hwstats->o2bgptc += rd32(wx, WX_TDM_OS2BMC_CNT); in wx_update_stats()
2511 hwstats->b2ospc += rd32(wx, WX_MNG_BMC2OS_CNT); in wx_update_stats()
2512 hwstats->o2bspc += rd32(wx, WX_MNG_OS2BMC_CNT); in wx_update_stats()
2513 hwstats->b2ogprc += rd32(wx, WX_RDM_BMC2OS_CNT); in wx_update_stats()
2514 hwstats->rdmdrop += rd32(wx, WX_RDM_DRP_PKT); in wx_update_stats()
2516 if (test_bit(WX_FLAG_FDIR_CAPABLE, wx->flags)) { in wx_update_stats()
2517 hwstats->fdirmatch += rd32(wx, WX_RDB_FDIR_MATCH); in wx_update_stats()
2518 hwstats->fdirmiss += rd32(wx, WX_RDB_FDIR_MISS); in wx_update_stats()
2521 for (i = 0; i < wx->mac.max_rx_queues; i++) in wx_update_stats()
2522 hwstats->qmprc += rd32(wx, WX_PX_MPRC(i)); in wx_update_stats()
2527 * wx_clear_hw_cntrs - Generic clear hardware counters
2537 for (i = 0; i < wx->mac.max_rx_queues; i++) in wx_clear_hw_cntrs()
2562 * wx_start_hw - Prepare hardware for Tx/Rx
2567 * Then performs revision-specific operations, if any.
2577 for (i = 0; i < wx->mac.max_tx_queues; i++) { in wx_start_hw()