Lines Matching +full:pme +full:- +full:active +full:- +full:high
1 /* via-rhine.c: A Linux Ethernet device driver for VIA Rhine family chips. */
3 Written 1998-2001 by Donald Becker.
14 This driver is designed for the VIA VT86C100A Rhine-I.
15 It also works with the Rhine-II (6102) and Rhine-III (6105/6105L/6105LOM
27 http://www.scyld.com/network/via-rhine.html
28 [link no longer provides useful info -jgarzik]
34 #define DRV_NAME "via-rhine"
38 /* A few user-configurable values.
44 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 /* Work-around for broken BIOSes: they are unable to get the chip back out of
55 power state D3 so PXE booting fails. bootparam(7): via-rhine.avoid_D3=1 */
63 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
64 The Rhine has a 64 element 8390-like hash table. */
75 * There are no ill effects from too-large receive rings.
78 #define TX_QUEUE_LEN (TX_RING_SIZE - 6) /* Limit ring entries actually used. */
100 #include <linux/dma-mapping.h>
126 MODULE_PARM_DESC(rx_copybreak, "VIA Rhine copy breakpoint for copy-only-tiny-frames");
127 MODULE_PARM_DESC(avoid_D3, "Avoid power state D3 (work-around for broken BIOSes)");
137 This driver is designed for the VIA 86c100A Rhine-II PCI Fast Ethernet
140 II. Board-specific settings
142 Boards with this chip are functional only in a bus-master PCI slot.
154 This driver uses two statically allocated fixed-size descriptor lists
160 This driver attempts to use a zero-copy receive and transmit scheme.
166 open() time and passes the skb->data field to the chip as receive data
173 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
174 using a full-sized skbuff for small frames vs. the copying costs of larger
185 has the beneficial effect of 16-byte aligning the IP header.
189 The driver runs as two independent, single-threaded flows of control. One
190 is the send-packet routine, which enforces single-threaded use by the
191 netdev_priv(dev)->lock spinlock. The other thread is the interrupt handler,
195 netdev_priv(dev)->lock whenever it's queuing a Tx packet. If the next slot in
228 Note the matching code -- the first table entry matchs all 56** cards but
250 rqWOL = 0x0001, /* Wake-On-LAN support */
263 * rqRhineI: VT86C100A (aka Rhine-I) uses different bits to enable
280 /* OpenFirmware identifiers for platform-bus devices
285 { .compatible = "via,vt8500-rhine", .data = &vt8500_quirks },
400 /* Initial value for tx_desc.desc_length, Buffer size goes to bits 0-10 */
441 /* The addresses of receive-in-place skbuffs. */
445 /* The saved address of a sent-in-place packet/buffer, for later free(). */
449 /* Tx bounce buffers (Rhine-I only) */
523 void __iomem *ioaddr = rp->base; in rhine_wait_bit()
534 netif_dbg(rp, hw, rp->dev, "%s bit wait (%02x/%02x) cycle " in rhine_wait_bit()
535 "count: %04d\n", low ? "low" : "high", reg, mask, i); in rhine_wait_bit()
551 void __iomem *ioaddr = rp->base; in rhine_get_events()
555 /* On Rhine-II, Bit 3 indicates Tx descriptor write-back race. */ in rhine_get_events()
556 if (rp->quirks & rqStatusWBRace) in rhine_get_events()
563 void __iomem *ioaddr = rp->base; in rhine_ack_events()
565 if (rp->quirks & rqStatusWBRace) in rhine_ack_events()
577 void __iomem *ioaddr = rp->base; in rhine_power_init()
580 if (rp->quirks & rqWOL) { in rhine_power_init()
584 /* Disable "force PME-enable" */ in rhine_power_init()
587 /* Clear power-event config bits (WOL) */ in rhine_power_init()
590 if (rp->quirks & rq6patterns) in rhine_power_init()
593 /* Save power-event status bits */ in rhine_power_init()
595 if (rp->quirks & rq6patterns) in rhine_power_init()
598 /* Clear power-event status bits */ in rhine_power_init()
600 if (rp->quirks & rq6patterns) in rhine_power_init()
633 void __iomem *ioaddr = rp->base; in rhine_chip_reset()
643 if (rp->quirks & rqForceReset) in rhine_chip_reset()
689 return -EIO; in verify_mmio()
697 * Loads bytes 0x00-0x05, 0x6E-0x6F, 0x78-0x7B from EEPROM
698 * (plus 0x6C for Rhine-I/II)
703 void __iomem *ioaddr = rp->base; in rhine_reload_eeprom()
715 * Reloading from EEPROM overwrites ConfigA-D, so we must re-enable in rhine_reload_eeprom()
717 * it is not known if that still works with the "win98-reboot" problem. in rhine_reload_eeprom()
719 enable_mmio(pioaddr, rp->quirks); in rhine_reload_eeprom()
721 /* Turn off EEPROM-controlled wake-up (magic packet) */ in rhine_reload_eeprom()
722 if (rp->quirks & rqWOL) in rhine_reload_eeprom()
731 const int irq = rp->irq; in rhine_poll()
741 if (rp->tx_thresh < 0xe0) { in rhine_kick_tx_threshold()
742 void __iomem *ioaddr = rp->base; in rhine_kick_tx_threshold()
744 rp->tx_thresh += 0x20; in rhine_kick_tx_threshold()
745 BYTE_REG_BITS_SET(rp->tx_thresh, 0x80, ioaddr + TxConfig); in rhine_kick_tx_threshold()
751 struct net_device *dev = rp->dev; in rhine_tx_err()
761 "Tx threshold now %02x\n", rp->tx_thresh); in rhine_tx_err()
765 netif_info(rp, tx_err, dev, "Tx descriptor write-back race\n"); in rhine_tx_err()
771 "Tx threshold now %02x\n", rp->tx_thresh); in rhine_tx_err()
779 void __iomem *ioaddr = rp->base; in rhine_update_rx_crc_and_missed_errord()
780 struct net_device_stats *stats = &rp->dev->stats; in rhine_update_rx_crc_and_missed_errord()
782 stats->rx_crc_errors += ioread16(ioaddr + RxCRCErrs); in rhine_update_rx_crc_and_missed_errord()
783 stats->rx_missed_errors += ioread16(ioaddr + RxMissed); in rhine_update_rx_crc_and_missed_errord()
819 struct net_device *dev = rp->dev; in rhine_napipoll()
820 void __iomem *ioaddr = rp->base; in rhine_napipoll()
846 spin_lock(&rp->lock); in rhine_napipoll()
848 spin_unlock(&rp->lock); in rhine_napipoll()
853 schedule_work(&rp->slow_event_task); in rhine_napipoll()
870 /* Rhine-I needs extra time to recuperate before EEPROM reload */ in rhine_hw_init()
871 if (rp->quirks & rqRhineI) in rhine_hw_init()
875 if (dev_is_pci(dev->dev.parent)) in rhine_hw_init()
908 dev_err(hwdev, "32-bit DMA addresses not supported by the card!?\n"); in rhine_init_one_common()
914 rc = -ENOMEM; in rhine_init_one_common()
920 rp->dev = dev; in rhine_init_one_common()
921 rp->quirks = quirks; in rhine_init_one_common()
922 rp->pioaddr = pioaddr; in rhine_init_one_common()
923 rp->base = ioaddr; in rhine_init_one_common()
924 rp->irq = irq; in rhine_init_one_common()
925 rp->msg_enable = netif_msg_init(debug, RHINE_MSG_DEFAULT); in rhine_init_one_common()
927 phy_id = rp->quirks & rqIntPHY ? 1 : 0; in rhine_init_one_common()
929 u64_stats_init(&rp->tx_stats.syncp); in rhine_init_one_common()
930 u64_stats_init(&rp->rx_stats.syncp); in rhine_init_one_common()
940 if (!is_valid_ether_addr(dev->dev_addr)) { in rhine_init_one_common()
942 netdev_err(dev, "Invalid MAC address: %pM\n", dev->dev_addr); in rhine_init_one_common()
945 dev->dev_addr); in rhine_init_one_common()
948 /* For Rhine-I/II, phy_id is loaded from EEPROM */ in rhine_init_one_common()
952 spin_lock_init(&rp->lock); in rhine_init_one_common()
953 mutex_init(&rp->task_lock); in rhine_init_one_common()
954 INIT_WORK(&rp->reset_task, rhine_reset_task); in rhine_init_one_common()
955 INIT_WORK(&rp->slow_event_task, rhine_slow_event_task); in rhine_init_one_common()
957 rp->mii_if.dev = dev; in rhine_init_one_common()
958 rp->mii_if.mdio_read = mdio_read; in rhine_init_one_common()
959 rp->mii_if.mdio_write = mdio_write; in rhine_init_one_common()
960 rp->mii_if.phy_id_mask = 0x1f; in rhine_init_one_common()
961 rp->mii_if.reg_num_mask = 0x1f; in rhine_init_one_common()
963 /* The chip-specific entries in the device structure. */ in rhine_init_one_common()
964 dev->netdev_ops = &rhine_netdev_ops; in rhine_init_one_common()
965 dev->ethtool_ops = &netdev_ethtool_ops; in rhine_init_one_common()
966 dev->watchdog_timeo = TX_TIMEOUT; in rhine_init_one_common()
968 netif_napi_add(dev, &rp->napi, rhine_napipoll); in rhine_init_one_common()
970 if (rp->quirks & rqRhineI) in rhine_init_one_common()
971 dev->features |= NETIF_F_SG|NETIF_F_HW_CSUM; in rhine_init_one_common()
973 if (rp->quirks & rqMgmt) in rhine_init_one_common()
974 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | in rhine_init_one_common()
978 /* dev->name not defined before register_netdev()! */ in rhine_init_one_common()
983 if (rp->quirks & rqRhineI) in rhine_init_one_common()
985 else if (rp->quirks & rqStatusWBRace) in rhine_init_one_common()
987 else if (rp->quirks & rqMgmt) in rhine_init_one_common()
993 name, ioaddr, dev->dev_addr, rp->irq); in rhine_init_one_common()
1003 rp->mii_if.advertising = mdio_read(dev, phy_id, 4); in rhine_init_one_common()
1007 mii_status, rp->mii_if.advertising, in rhine_init_one_common()
1018 rp->mii_if.phy_id = phy_id; in rhine_init_one_common()
1033 struct device *hwdev = &pdev->dev; in rhine_init_one_pci()
1037 int io_size = pdev->revision < VTunknown0 ? 128 : 256; in rhine_init_one_pci()
1054 if (pdev->revision < VTunknown0) { in rhine_init_one_pci()
1056 } else if (pdev->revision >= VT6102) { in rhine_init_one_pci()
1058 if (pdev->revision < VT6105) { in rhine_init_one_pci()
1062 if (pdev->revision >= VT6105_B0) in rhine_init_one_pci()
1064 if (pdev->revision >= VT6105M) in rhine_init_one_pci()
1072 rc = -EIO; in rhine_init_one_pci()
1088 rc = -EIO; in rhine_init_one_pci()
1101 rc = rhine_init_one_common(&pdev->dev, quirks, in rhine_init_one_pci()
1102 pioaddr, ioaddr, pdev->irq); in rhine_init_one_pci()
1122 quirks = of_device_get_match_data(&pdev->dev); in rhine_init_one_platform()
1124 return -EINVAL; in rhine_init_one_platform()
1130 irq = irq_of_parse_and_map(pdev->dev.of_node, 0); in rhine_init_one_platform()
1132 return -EINVAL; in rhine_init_one_platform()
1134 return rhine_init_one_common(&pdev->dev, *quirks, in rhine_init_one_platform()
1141 struct device *hwdev = dev->dev.parent; in alloc_ring()
1152 return -ENOMEM; in alloc_ring()
1154 if (rp->quirks & rqRhineI) { in alloc_ring()
1155 rp->tx_bufs = dma_alloc_coherent(hwdev, in alloc_ring()
1157 &rp->tx_bufs_dma, in alloc_ring()
1159 if (rp->tx_bufs == NULL) { in alloc_ring()
1164 return -ENOMEM; in alloc_ring()
1168 rp->rx_ring = ring; in alloc_ring()
1169 rp->tx_ring = ring + RX_RING_SIZE * sizeof(struct rx_desc); in alloc_ring()
1170 rp->rx_ring_dma = ring_dma; in alloc_ring()
1171 rp->tx_ring_dma = ring_dma + RX_RING_SIZE * sizeof(struct rx_desc); in alloc_ring()
1179 struct device *hwdev = dev->dev.parent; in free_ring()
1184 rp->rx_ring, rp->rx_ring_dma); in free_ring()
1185 rp->tx_ring = NULL; in free_ring()
1187 if (rp->tx_bufs) in free_ring()
1189 rp->tx_bufs, rp->tx_bufs_dma); in free_ring()
1191 rp->tx_bufs = NULL; in free_ring()
1204 struct device *hwdev = dev->dev.parent; in rhine_skb_dma_init()
1205 const int size = rp->rx_buf_sz; in rhine_skb_dma_init()
1207 sd->skb = netdev_alloc_skb(dev, size); in rhine_skb_dma_init()
1208 if (!sd->skb) in rhine_skb_dma_init()
1209 return -ENOMEM; in rhine_skb_dma_init()
1211 sd->dma = dma_map_single(hwdev, sd->skb->data, size, DMA_FROM_DEVICE); in rhine_skb_dma_init()
1212 if (unlikely(dma_mapping_error(hwdev, sd->dma))) { in rhine_skb_dma_init()
1214 dev_kfree_skb_any(sd->skb); in rhine_skb_dma_init()
1215 return -EIO; in rhine_skb_dma_init()
1225 rp->cur_rx = 0; in rhine_reset_rbufs()
1228 rp->rx_ring[i].rx_status = cpu_to_le32(DescOwn); in rhine_reset_rbufs()
1234 rp->rx_skbuff_dma[entry] = sd->dma; in rhine_skb_dma_nic_store()
1235 rp->rx_skbuff[entry] = sd->skb; in rhine_skb_dma_nic_store()
1237 rp->rx_ring[entry].addr = cpu_to_le32(sd->dma); in rhine_skb_dma_nic_store()
1249 rp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32); in alloc_rbufs()
1250 next = rp->rx_ring_dma; in alloc_rbufs()
1254 rp->rx_ring[i].rx_status = 0; in alloc_rbufs()
1255 rp->rx_ring[i].desc_length = cpu_to_le32(rp->rx_buf_sz); in alloc_rbufs()
1257 rp->rx_ring[i].next_desc = cpu_to_le32(next); in alloc_rbufs()
1258 rp->rx_skbuff[i] = NULL; in alloc_rbufs()
1261 rp->rx_ring[i-1].next_desc = cpu_to_le32(rp->rx_ring_dma); in alloc_rbufs()
1284 struct device *hwdev = dev->dev.parent; in free_rbufs()
1289 rp->rx_ring[i].rx_status = 0; in free_rbufs()
1290 rp->rx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */ in free_rbufs()
1291 if (rp->rx_skbuff[i]) { in free_rbufs()
1293 rp->rx_skbuff_dma[i], in free_rbufs()
1294 rp->rx_buf_sz, DMA_FROM_DEVICE); in free_rbufs()
1295 dev_kfree_skb(rp->rx_skbuff[i]); in free_rbufs()
1297 rp->rx_skbuff[i] = NULL; in free_rbufs()
1307 rp->dirty_tx = rp->cur_tx = 0; in alloc_tbufs()
1308 next = rp->tx_ring_dma; in alloc_tbufs()
1310 rp->tx_skbuff[i] = NULL; in alloc_tbufs()
1311 rp->tx_ring[i].tx_status = 0; in alloc_tbufs()
1312 rp->tx_ring[i].desc_length = cpu_to_le32(TXDESC); in alloc_tbufs()
1314 rp->tx_ring[i].next_desc = cpu_to_le32(next); in alloc_tbufs()
1315 if (rp->quirks & rqRhineI) in alloc_tbufs()
1316 rp->tx_buf[i] = &rp->tx_bufs[i * PKT_BUF_SZ]; in alloc_tbufs()
1318 rp->tx_ring[i-1].next_desc = cpu_to_le32(rp->tx_ring_dma); in alloc_tbufs()
1326 struct device *hwdev = dev->dev.parent; in free_tbufs()
1330 rp->tx_ring[i].tx_status = 0; in free_tbufs()
1331 rp->tx_ring[i].desc_length = cpu_to_le32(TXDESC); in free_tbufs()
1332 rp->tx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */ in free_tbufs()
1333 if (rp->tx_skbuff[i]) { in free_tbufs()
1334 if (rp->tx_skbuff_dma[i]) { in free_tbufs()
1336 rp->tx_skbuff_dma[i], in free_tbufs()
1337 rp->tx_skbuff[i]->len, in free_tbufs()
1340 dev_kfree_skb(rp->tx_skbuff[i]); in free_tbufs()
1342 rp->tx_skbuff[i] = NULL; in free_tbufs()
1343 rp->tx_buf[i] = NULL; in free_tbufs()
1350 void __iomem *ioaddr = rp->base; in rhine_check_media()
1352 if (!rp->mii_if.force_media) in rhine_check_media()
1353 mii_check_media(&rp->mii_if, netif_msg_link(rp), init_media); in rhine_check_media()
1355 if (rp->mii_if.full_duplex) in rhine_check_media()
1363 rp->mii_if.force_media, netif_carrier_ok(dev)); in rhine_check_media()
1369 struct net_device *dev = mii->dev; in rhine_set_carrier()
1372 if (mii->force_media) { in rhine_set_carrier()
1381 mii->force_media, netif_carrier_ok(dev)); in rhine_set_carrier()
1385 * rhine_set_cam - set CAM multicast filters
1387 * @idx: multicast CAM index [0..MCAM_SIZE-1]
1399 /* Paranoid -- idx out of range should never happen */ in rhine_set_cam()
1400 idx &= (MCAM_SIZE - 1); in rhine_set_cam()
1416 * rhine_set_vlan_cam - set CAM VLAN filters
1418 * @idx: VLAN CAM index [0..VCAM_SIZE-1]
1428 /* Paranoid -- idx out of range should never happen */ in rhine_set_vlan_cam()
1429 idx &= (VCAM_SIZE - 1); in rhine_set_vlan_cam()
1444 * rhine_set_cam_mask - set multicast CAM mask
1448 * Mask sets multicast filters active/inactive.
1463 * rhine_set_vlan_cam_mask - set VLAN CAM mask
1467 * Mask sets VLAN filters active/inactive.
1482 * rhine_init_cam_filter - initialize CAM filters
1491 void __iomem *ioaddr = rp->base; in rhine_init_cam_filter()
1503 * rhine_update_vcam - update VLAN CAM filters
1511 void __iomem *ioaddr = rp->base; in rhine_update_vcam()
1516 for_each_set_bit(vid, rp->active_vlans, VLAN_N_VID) { in rhine_update_vcam()
1529 spin_lock_bh(&rp->lock); in rhine_vlan_rx_add_vid()
1530 set_bit(vid, rp->active_vlans); in rhine_vlan_rx_add_vid()
1532 spin_unlock_bh(&rp->lock); in rhine_vlan_rx_add_vid()
1540 spin_lock_bh(&rp->lock); in rhine_vlan_rx_kill_vid()
1541 clear_bit(vid, rp->active_vlans); in rhine_vlan_rx_kill_vid()
1543 spin_unlock_bh(&rp->lock); in rhine_vlan_rx_kill_vid()
1550 void __iomem *ioaddr = rp->base; in init_registers()
1554 iowrite8(dev->dev_addr[i], ioaddr + StationAddr + i); in init_registers()
1560 rp->tx_thresh = 0x20; in init_registers()
1561 rp->rx_thresh = 0x60; /* Written in rhine_set_rx_mode(). */ in init_registers()
1563 iowrite32(rp->rx_ring_dma, ioaddr + RxRingPtr); in init_registers()
1564 iowrite32(rp->tx_ring_dma, ioaddr + TxRingPtr); in init_registers()
1568 if (rp->quirks & rqMgmt) in init_registers()
1571 napi_enable_locked(&rp->napi); in init_registers()
1580 /* Enable MII link status auto-polling (required for IntrLinkChange) */
1583 void __iomem *ioaddr = rp->base; in rhine_enable_linkmon()
1594 /* Disable MII link status auto-polling (required for MDIO access) */
1597 void __iomem *ioaddr = rp->base; in rhine_disable_linkmon()
1601 if (rp->quirks & rqRhineI) { in rhine_disable_linkmon()
1624 void __iomem *ioaddr = rp->base; in mdio_read()
1643 void __iomem *ioaddr = rp->base; in mdio_write()
1659 mutex_lock(&rp->task_lock); in rhine_task_disable()
1660 rp->task_enable = false; in rhine_task_disable()
1661 mutex_unlock(&rp->task_lock); in rhine_task_disable()
1663 cancel_work_sync(&rp->slow_event_task); in rhine_task_disable()
1664 cancel_work_sync(&rp->reset_task); in rhine_task_disable()
1669 mutex_lock(&rp->task_lock); in rhine_task_enable()
1670 rp->task_enable = true; in rhine_task_enable()
1671 mutex_unlock(&rp->task_lock); in rhine_task_enable()
1677 void __iomem *ioaddr = rp->base; in rhine_open()
1680 rc = request_irq(rp->irq, rhine_interrupt, IRQF_SHARED, dev->name, dev); in rhine_open()
1684 netif_dbg(rp, ifup, dev, "%s() irq %d\n", __func__, rp->irq); in rhine_open()
1695 enable_mmio(rp->pioaddr, rp->quirks); in rhine_open()
1704 netif_dbg(rp, ifup, dev, "%s() Done - status %04x MII status: %04x\n", in rhine_open()
1706 mdio_read(dev, rp->mii_if.phy_id, MII_BMSR)); in rhine_open()
1716 free_irq(rp->irq, dev); in rhine_open()
1724 struct net_device *dev = rp->dev; in rhine_reset_task()
1726 mutex_lock(&rp->task_lock); in rhine_reset_task()
1728 if (!rp->task_enable) in rhine_reset_task()
1731 napi_disable(&rp->napi); in rhine_reset_task()
1735 spin_lock_bh(&rp->lock); in rhine_reset_task()
1747 spin_unlock_bh(&rp->lock); in rhine_reset_task()
1751 dev->stats.tx_errors++; in rhine_reset_task()
1755 mutex_unlock(&rp->task_lock); in rhine_reset_task()
1761 void __iomem *ioaddr = rp->base; in rhine_tx_timeout()
1765 mdio_read(dev, rp->mii_if.phy_id, MII_BMSR)); in rhine_tx_timeout()
1767 schedule_work(&rp->reset_task); in rhine_tx_timeout()
1772 return (rp->cur_tx - rp->dirty_tx) >= TX_QUEUE_LEN; in rhine_tx_queue_full()
1779 struct device *hwdev = dev->dev.parent; in rhine_start_tx()
1780 void __iomem *ioaddr = rp->base; in rhine_start_tx()
1787 entry = rp->cur_tx % TX_RING_SIZE; in rhine_start_tx()
1792 rp->tx_skbuff[entry] = skb; in rhine_start_tx()
1794 if ((rp->quirks & rqRhineI) && in rhine_start_tx()
1795 …(((unsigned long)skb->data & 3) || skb_shinfo(skb)->nr_frags != 0 || skb->ip_summed == CHECKSUM_PA… in rhine_start_tx()
1797 if (skb->len > PKT_BUF_SZ) { in rhine_start_tx()
1800 rp->tx_skbuff[entry] = NULL; in rhine_start_tx()
1801 dev->stats.tx_dropped++; in rhine_start_tx()
1806 skb_copy_and_csum_dev(skb, rp->tx_buf[entry]); in rhine_start_tx()
1807 if (skb->len < ETH_ZLEN) in rhine_start_tx()
1808 memset(rp->tx_buf[entry] + skb->len, 0, in rhine_start_tx()
1809 ETH_ZLEN - skb->len); in rhine_start_tx()
1810 rp->tx_skbuff_dma[entry] = 0; in rhine_start_tx()
1811 rp->tx_ring[entry].addr = cpu_to_le32(rp->tx_bufs_dma + in rhine_start_tx()
1812 (rp->tx_buf[entry] - in rhine_start_tx()
1813 rp->tx_bufs)); in rhine_start_tx()
1815 rp->tx_skbuff_dma[entry] = in rhine_start_tx()
1816 dma_map_single(hwdev, skb->data, skb->len, in rhine_start_tx()
1818 if (dma_mapping_error(hwdev, rp->tx_skbuff_dma[entry])) { in rhine_start_tx()
1820 rp->tx_skbuff_dma[entry] = 0; in rhine_start_tx()
1821 dev->stats.tx_dropped++; in rhine_start_tx()
1824 rp->tx_ring[entry].addr = cpu_to_le32(rp->tx_skbuff_dma[entry]); in rhine_start_tx()
1827 rp->tx_ring[entry].desc_length = in rhine_start_tx()
1828 cpu_to_le32(TXDESC | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN)); in rhine_start_tx()
1836 rp->tx_ring[entry].tx_status = cpu_to_le32((vid_pcp) << 16); in rhine_start_tx()
1838 rp->tx_ring[entry].desc_length |= cpu_to_le32(0x020000); in rhine_start_tx()
1841 rp->tx_ring[entry].tx_status = 0; in rhine_start_tx()
1843 netdev_sent_queue(dev, skb->len); in rhine_start_tx()
1846 rp->tx_ring[entry].tx_status |= cpu_to_le32(DescOwn); in rhine_start_tx()
1849 rp->cur_tx++; in rhine_start_tx()
1857 /* Non-x86 Todo: explicitly flush cache lines here. */ in rhine_start_tx()
1860 /* Tx queues are bits 7-0 (first Tx queue: bit 7) */ in rhine_start_tx()
1863 /* Wake the potentially-idle transmit channel */ in rhine_start_tx()
1868 /* dirty_tx may be pessimistically out-of-sync. See rhine_tx. */ in rhine_start_tx()
1878 rp->cur_tx - 1, entry); in rhine_start_tx()
1885 iowrite16(0x0000, rp->base + IntrEnable); in rhine_irq_disable()
1905 napi_schedule(&rp->napi); in rhine_interrupt()
1921 struct device *hwdev = dev->dev.parent; in rhine_tx()
1923 unsigned int dirty_tx = rp->dirty_tx; in rhine_tx()
1934 cur_tx = rp->cur_tx; in rhine_tx()
1938 u32 txstatus = le32_to_cpu(rp->tx_ring[entry].tx_status); in rhine_tx()
1944 skb = rp->tx_skbuff[entry]; in rhine_tx()
1948 dev->stats.tx_errors++; in rhine_tx()
1950 dev->stats.tx_carrier_errors++; in rhine_tx()
1952 dev->stats.tx_window_errors++; in rhine_tx()
1954 dev->stats.tx_aborted_errors++; in rhine_tx()
1956 dev->stats.tx_heartbeat_errors++; in rhine_tx()
1957 if (((rp->quirks & rqRhineI) && txstatus & 0x0002) || in rhine_tx()
1959 dev->stats.tx_fifo_errors++; in rhine_tx()
1960 rp->tx_ring[entry].tx_status = cpu_to_le32(DescOwn); in rhine_tx()
1961 break; /* Keep the skb - we try again */ in rhine_tx()
1965 if (rp->quirks & rqRhineI) in rhine_tx()
1966 dev->stats.collisions += (txstatus >> 3) & 0x0F; in rhine_tx()
1968 dev->stats.collisions += txstatus & 0x0F; in rhine_tx()
1972 u64_stats_update_begin(&rp->tx_stats.syncp); in rhine_tx()
1973 rp->tx_stats.bytes += skb->len; in rhine_tx()
1974 rp->tx_stats.packets++; in rhine_tx()
1975 u64_stats_update_end(&rp->tx_stats.syncp); in rhine_tx()
1978 if (rp->tx_skbuff_dma[entry]) { in rhine_tx()
1980 rp->tx_skbuff_dma[entry], in rhine_tx()
1981 skb->len, in rhine_tx()
1984 bytes_compl += skb->len; in rhine_tx()
1987 rp->tx_skbuff[entry] = NULL; in rhine_tx()
1991 rp->dirty_tx = dirty_tx; in rhine_tx()
1997 /* cur_tx may be optimistically out-of-sync. See rhine_start_tx. */ in rhine_tx()
2008 * rhine_get_vlan_tci - extract TCI from Rx data buffer
2013 * packet, the extracted 802.1Q header (2 bytes TPID + 2 bytes TCI) is 4-byte
2018 u8 *trailer = (u8 *)skb->data + ((data_size + 3) & ~3) + 2; in rhine_get_vlan_tci()
2026 if (unlikely(desc->desc_length & cpu_to_le32(DescTag))) { in rhine_rx_vlan_tag()
2038 struct device *hwdev = dev->dev.parent; in rhine_rx()
2039 int entry = rp->cur_rx % RX_RING_SIZE; in rhine_rx()
2043 entry, le32_to_cpu(rp->rx_ring[entry].rx_status)); in rhine_rx()
2047 struct rx_desc *desc = rp->rx_ring + entry; in rhine_rx()
2048 u32 desc_status = le32_to_cpu(desc->rx_status); in rhine_rx()
2064 dev->stats.rx_length_errors++; in rhine_rx()
2070 dev->stats.rx_errors++; in rhine_rx()
2072 dev->stats.rx_length_errors++; in rhine_rx()
2074 dev->stats.rx_fifo_errors++; in rhine_rx()
2076 dev->stats.rx_frame_errors++; in rhine_rx()
2079 spin_lock(&rp->lock); in rhine_rx()
2080 dev->stats.rx_crc_errors++; in rhine_rx()
2081 spin_unlock(&rp->lock); in rhine_rx()
2086 int pkt_len = data_size - 4; in rhine_rx()
2090 copying to a minimally-sized skbuff. */ in rhine_rx()
2097 rp->rx_skbuff_dma[entry], in rhine_rx()
2098 rp->rx_buf_sz, in rhine_rx()
2102 rp->rx_skbuff[entry]->data, in rhine_rx()
2106 rp->rx_skbuff_dma[entry], in rhine_rx()
2107 rp->rx_buf_sz, in rhine_rx()
2115 skb = rp->rx_skbuff[entry]; in rhine_rx()
2118 rp->rx_skbuff_dma[entry], in rhine_rx()
2119 rp->rx_buf_sz, in rhine_rx()
2128 skb->protocol = eth_type_trans(skb, dev); in rhine_rx()
2132 u64_stats_update_begin(&rp->rx_stats.syncp); in rhine_rx()
2133 rp->rx_stats.bytes += pkt_len; in rhine_rx()
2134 rp->rx_stats.packets++; in rhine_rx()
2135 u64_stats_update_end(&rp->rx_stats.syncp); in rhine_rx()
2138 desc->rx_status = cpu_to_le32(DescOwn); in rhine_rx()
2139 entry = (++rp->cur_rx) % RX_RING_SIZE; in rhine_rx()
2145 dev->stats.rx_dropped++; in rhine_rx()
2151 void __iomem *ioaddr = rp->base; in rhine_restart_tx()
2152 int entry = rp->dirty_tx % TX_RING_SIZE; in rhine_restart_tx()
2164 iowrite32(rp->tx_ring_dma + entry * sizeof(struct tx_desc), in rhine_restart_tx()
2170 if (rp->tx_ring[entry].desc_length & cpu_to_le32(0x020000)) in rhine_restart_tx()
2171 /* Tx queues are bits 7-0 (first Tx queue: bit 7) */ in rhine_restart_tx()
2190 struct net_device *dev = rp->dev; in rhine_slow_event_task()
2193 mutex_lock(&rp->task_lock); in rhine_slow_event_task()
2195 if (!rp->task_enable) in rhine_slow_event_task()
2207 iowrite16(RHINE_EVENT & 0xffff, rp->base + IntrEnable); in rhine_slow_event_task()
2210 mutex_unlock(&rp->task_lock); in rhine_slow_event_task()
2219 spin_lock_bh(&rp->lock); in rhine_get_stats64()
2221 spin_unlock_bh(&rp->lock); in rhine_get_stats64()
2223 netdev_stats_to_stats64(stats, &dev->stats); in rhine_get_stats64()
2226 start = u64_stats_fetch_begin(&rp->rx_stats.syncp); in rhine_get_stats64()
2227 stats->rx_packets = rp->rx_stats.packets; in rhine_get_stats64()
2228 stats->rx_bytes = rp->rx_stats.bytes; in rhine_get_stats64()
2229 } while (u64_stats_fetch_retry(&rp->rx_stats.syncp, start)); in rhine_get_stats64()
2232 start = u64_stats_fetch_begin(&rp->tx_stats.syncp); in rhine_get_stats64()
2233 stats->tx_packets = rp->tx_stats.packets; in rhine_get_stats64()
2234 stats->tx_bytes = rp->tx_stats.bytes; in rhine_get_stats64()
2235 } while (u64_stats_fetch_retry(&rp->tx_stats.syncp, start)); in rhine_get_stats64()
2241 void __iomem *ioaddr = rp->base; in rhine_set_rx_mode()
2246 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ in rhine_set_rx_mode()
2251 (dev->flags & IFF_ALLMULTI)) { in rhine_set_rx_mode()
2255 } else if (rp->quirks & rqMgmt) { in rhine_set_rx_mode()
2261 rhine_set_cam(ioaddr, i, ha->addr); in rhine_set_rx_mode()
2269 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; in rhine_set_rx_mode()
2277 if (rp->quirks & rqMgmt) { in rhine_set_rx_mode()
2278 if (dev->flags & IFF_PROMISC) in rhine_set_rx_mode()
2288 struct device *hwdev = dev->dev.parent; in netdev_get_drvinfo()
2290 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in netdev_get_drvinfo()
2291 strscpy(info->bus_info, dev_name(hwdev), sizeof(info->bus_info)); in netdev_get_drvinfo()
2299 mutex_lock(&rp->task_lock); in netdev_get_link_ksettings()
2300 mii_ethtool_get_link_ksettings(&rp->mii_if, cmd); in netdev_get_link_ksettings()
2301 mutex_unlock(&rp->task_lock); in netdev_get_link_ksettings()
2312 mutex_lock(&rp->task_lock); in netdev_set_link_ksettings()
2313 rc = mii_ethtool_set_link_ksettings(&rp->mii_if, cmd); in netdev_set_link_ksettings()
2314 rhine_set_carrier(&rp->mii_if); in netdev_set_link_ksettings()
2315 mutex_unlock(&rp->task_lock); in netdev_set_link_ksettings()
2324 return mii_nway_restart(&rp->mii_if); in netdev_nway_reset()
2331 return mii_link_ok(&rp->mii_if); in netdev_get_link()
2338 return rp->msg_enable; in netdev_get_msglevel()
2345 rp->msg_enable = value; in netdev_set_msglevel()
2352 if (!(rp->quirks & rqWOL)) in rhine_get_wol()
2355 spin_lock_irq(&rp->lock); in rhine_get_wol()
2356 wol->supported = WAKE_PHY | WAKE_MAGIC | in rhine_get_wol()
2358 wol->wolopts = rp->wolopts; in rhine_get_wol()
2359 spin_unlock_irq(&rp->lock); in rhine_get_wol()
2368 if (!(rp->quirks & rqWOL)) in rhine_set_wol()
2369 return -EINVAL; in rhine_set_wol()
2371 if (wol->wolopts & ~support) in rhine_set_wol()
2372 return -EINVAL; in rhine_set_wol()
2374 spin_lock_irq(&rp->lock); in rhine_set_wol()
2375 rp->wolopts = wol->wolopts; in rhine_set_wol()
2376 spin_unlock_irq(&rp->lock); in rhine_set_wol()
2399 return -EINVAL; in netdev_ioctl()
2401 mutex_lock(&rp->task_lock); in netdev_ioctl()
2402 rc = generic_mii_ioctl(&rp->mii_if, if_mii(rq), cmd, NULL); in netdev_ioctl()
2403 rhine_set_carrier(&rp->mii_if); in netdev_ioctl()
2404 mutex_unlock(&rp->task_lock); in netdev_ioctl()
2412 void __iomem *ioaddr = rp->base; in rhine_close()
2415 napi_disable(&rp->napi); in rhine_close()
2422 iowrite8(rp->tx_thresh | 0x02, ioaddr + TxConfig); in rhine_close()
2429 free_irq(rp->irq, dev); in rhine_close()
2445 pci_iounmap(pdev, rp->base); in rhine_remove_one_pci()
2459 iounmap(rp->base); in rhine_remove_one_platform()
2468 void __iomem *ioaddr = rp->base; in rhine_shutdown_pci()
2470 if (!(rp->quirks & rqWOL)) in rhine_shutdown_pci()
2471 return; /* Nothing to do for non-WOL adapters */ in rhine_shutdown_pci()
2476 if (rp->quirks & rq6patterns) in rhine_shutdown_pci()
2479 spin_lock(&rp->lock); in rhine_shutdown_pci()
2481 if (rp->wolopts & WAKE_MAGIC) { in rhine_shutdown_pci()
2484 * Turn EEPROM-controlled wake-up back on -- some hardware may in rhine_shutdown_pci()
2490 if (rp->wolopts & (WAKE_BCAST|WAKE_MCAST)) in rhine_shutdown_pci()
2493 if (rp->wolopts & WAKE_PHY) in rhine_shutdown_pci()
2496 if (rp->wolopts & WAKE_UCAST) in rhine_shutdown_pci()
2499 if (rp->wolopts) { in rhine_shutdown_pci()
2505 spin_unlock(&rp->lock); in rhine_shutdown_pci()
2526 napi_disable(&rp->napi); in rhine_suspend()
2544 enable_mmio(rp->pioaddr, rp->quirks); in rhine_resume()
2552 spin_lock_bh(&rp->lock); in rhine_resume()
2554 spin_unlock_bh(&rp->lock); in rhine_resume()
2592 .ident = "EPIA-M",