Lines Matching +full:dra7 +full:- +full:cpsw +full:- +full:switch
1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine
24 #define BITMASK(bits) (BIT(bits) - 1)
42 /* ALE NetCP NU switch specific Registers */
75 * struct ale_entry_fld - The ALE tbl entry field description
94 * struct cpsw_ale_dev_id - The ALE version/SoC specific configuration
100 * @nu_switch_ale: NU Switch ALE
134 idx2 = (start + bits - 1) / 32; in cpsw_ale_get_field()
137 index = 2 - idx2; /* flip */ in cpsw_ale_get_field()
138 hi_val = ale_entry[index] << ((idx2 * 32) - start); in cpsw_ale_get_field()
140 start -= idx * 32; in cpsw_ale_get_field()
141 idx = 2 - idx; /* flip */ in cpsw_ale_get_field()
152 idx2 = (start + bits - 1) / 32; in cpsw_ale_set_field()
155 index = 2 - idx2; /* flip */ in cpsw_ale_set_field()
156 ale_entry[index] &= ~(BITMASK(bits + start - (idx2 * 32))); in cpsw_ale_set_field()
157 ale_entry[index] |= (value >> ((idx2 * 32) - start)); in cpsw_ale_set_field()
159 start -= idx * 32; in cpsw_ale_set_field()
160 idx = 2 - idx; /* flip */ in cpsw_ale_set_field()
273 return -EINVAL; in cpsw_ale_entry_get_fld()
276 if (!(entry_fld->flags & ALE_FLD_ALLOWED)) { in cpsw_ale_entry_get_fld()
277 dev_err(ale->params.dev, "get: wrong ale fld id %d\n", fld_id); in cpsw_ale_entry_get_fld()
278 return -ENOENT; in cpsw_ale_entry_get_fld()
281 bits = entry_fld->num_bits; in cpsw_ale_entry_get_fld()
282 if (entry_fld->flags & ALE_FLD_SIZE_PORT_MASK_BITS) in cpsw_ale_entry_get_fld()
283 bits = ale->port_mask_bits; in cpsw_ale_entry_get_fld()
285 return cpsw_ale_get_field(ale_entry, entry_fld->start_bit, bits); in cpsw_ale_entry_get_fld()
301 if (!(entry_fld->flags & ALE_FLD_ALLOWED)) { in cpsw_ale_entry_set_fld()
302 dev_err(ale->params.dev, "set: wrong ale fld id %d\n", fld_id); in cpsw_ale_entry_set_fld()
306 bits = entry_fld->num_bits; in cpsw_ale_entry_set_fld()
307 if (entry_fld->flags & ALE_FLD_SIZE_PORT_MASK_BITS) in cpsw_ale_entry_set_fld()
308 bits = ale->port_mask_bits; in cpsw_ale_entry_set_fld()
310 cpsw_ale_set_field(ale_entry, entry_fld->start_bit, bits, value); in cpsw_ale_entry_set_fld()
318 ale->vlan_entry_tbl, fld_id); in cpsw_ale_vlan_get_fld()
327 ale->vlan_entry_tbl, fld_id, value); in cpsw_ale_vlan_set_fld()
336 addr[i] = cpsw_ale_get_field(ale_entry, 40 - 8*i, 8); in cpsw_ale_get_addr()
344 cpsw_ale_set_field(ale_entry, 40 - 8*i, 8, addr[i]); in cpsw_ale_set_addr()
351 WARN_ON(idx > ale->params.ale_entries); in cpsw_ale_read()
353 writel_relaxed(idx, ale->params.ale_regs + ALE_TABLE_CONTROL); in cpsw_ale_read()
356 ale_entry[i] = readl_relaxed(ale->params.ale_regs + in cpsw_ale_read()
366 WARN_ON(idx > ale->params.ale_entries); in cpsw_ale_write()
369 writel_relaxed(ale_entry[i], ale->params.ale_regs + in cpsw_ale_write()
372 writel_relaxed(idx | ALE_TABLE_WRITE, ale->params.ale_regs + in cpsw_ale_write()
383 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_match_addr()
396 return -ENOENT; in cpsw_ale_match_addr()
404 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_match_vlan()
412 return -ENOENT; in cpsw_ale_match_vlan()
420 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_match_free()
426 return -ENOENT; in cpsw_ale_match_free()
434 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_find_ageable()
446 return -ENOENT; in cpsw_ale_find_ageable()
455 ale->port_mask_bits); in cpsw_ale_flush_mcast()
463 ale->port_mask_bits); in cpsw_ale_flush_mcast()
473 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_flush_multicast()
479 /* if vid passed is -1 then remove all multicast entry from in cpsw_ale_flush_multicast()
484 if (vid != -1 && cpsw_ale_get_vlan_id(ale_entry) != vid) in cpsw_ale_flush_multicast()
526 cpsw_ale_set_port_num(ale_entry, port, ale->port_num_bits); in cpsw_ale_add_ucast()
534 return -ENOMEM; in cpsw_ale_add_ucast()
548 return -ENOENT; in cpsw_ale_del_ucast()
572 ale->port_mask_bits); in cpsw_ale_add_mcast()
575 ale->port_mask_bits); in cpsw_ale_add_mcast()
582 return -ENOMEM; in cpsw_ale_add_mcast()
597 return -ENOENT; in cpsw_ale_del_mcast()
603 ale->port_mask_bits); in cpsw_ale_del_mcast()
609 ale->port_mask_bits); in cpsw_ale_del_mcast()
617 /* ALE NetCP NU switch specific vlan functions */
626 writel(reg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx)); in cpsw_ale_set_vlan_mcast()
631 writel(unreg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx)); in cpsw_ale_set_vlan_mcast()
641 bitmap_set(ale->p0_untag_vid_mask, vid, 1); in cpsw_ale_set_vlan_untag()
643 bitmap_clear(ale->p0_untag_vid_mask, vid, 1); in cpsw_ale_set_vlan_untag()
660 if (!ale->params.nu_switch_ale) { in cpsw_ale_add_vlan()
680 return -ENOMEM; in cpsw_ale_add_vlan()
713 if (!ale->params.nu_switch_ale) { in cpsw_ale_vlan_del_modify_int()
733 return -ENOENT; in cpsw_ale_vlan_del_modify()
750 return -ENOENT; in cpsw_ale_del_vlan()
754 /* if !port_mask - force remove VLAN (legacy). in cpsw_ale_del_vlan()
756 * if no - remove VLAN. in cpsw_ale_del_vlan()
764 /* last port or force remove - remove VLAN */ in cpsw_ale_del_vlan()
807 dev_err(ale->params.dev, "Unable to add vlan\n"); in cpsw_ale_vlan_add_modify()
810 dev_dbg(ale->params.dev, "port mask 0x%x untag 0x%x\n", vlan_members, in cpsw_ale_vlan_add_modify()
823 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_set_unreg_mcast()
869 unreg_mcast = readl(ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx)); in cpsw_ale_vlan_set_unreg_mcast_idx()
876 writel(unreg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx)); in cpsw_ale_vlan_set_unreg_mcast_idx()
884 for (idx = 0; idx < ale->params.ale_entries; idx++) { in cpsw_ale_set_allmulti()
895 if (port != -1 && !(vlan_members & BIT(port))) in cpsw_ale_set_allmulti()
898 if (!ale->params.nu_switch_ale) in cpsw_ale_set_allmulti()
1142 return -EINVAL; in cpsw_ale_control_set()
1145 if (info->port_offset == 0 && info->port_shift == 0) in cpsw_ale_control_set()
1148 if (port < 0 || port >= ale->params.ale_ports) in cpsw_ale_control_set()
1149 return -EINVAL; in cpsw_ale_control_set()
1151 mask = BITMASK(info->bits); in cpsw_ale_control_set()
1153 return -EINVAL; in cpsw_ale_control_set()
1155 offset = info->offset + (port * info->port_offset); in cpsw_ale_control_set()
1156 shift = info->shift + (port * info->port_shift); in cpsw_ale_control_set()
1158 tmp = readl_relaxed(ale->params.ale_regs + offset); in cpsw_ale_control_set()
1160 writel_relaxed(tmp, ale->params.ale_regs + offset); in cpsw_ale_control_set()
1172 return -EINVAL; in cpsw_ale_control_get()
1175 if (info->port_offset == 0 && info->port_shift == 0) in cpsw_ale_control_get()
1178 if (port < 0 || port >= ale->params.ale_ports) in cpsw_ale_control_get()
1179 return -EINVAL; in cpsw_ale_control_get()
1181 offset = info->offset + (port * info->port_offset); in cpsw_ale_control_get()
1182 shift = info->shift + (port * info->port_shift); in cpsw_ale_control_get()
1184 tmp = readl_relaxed(ale->params.ale_regs + offset) >> shift; in cpsw_ale_control_get()
1185 return tmp & BITMASK(info->bits); in cpsw_ale_control_get()
1195 dev_err(ale->params.dev, "ALE MC port:%d ratelimit min value 1000pps\n", port); in cpsw_ale_rx_ratelimit_mc()
1196 return -EINVAL; in cpsw_ale_rx_ratelimit_mc()
1200 dev_info(ale->params.dev, "ALE port:%d MC ratelimit set to %dpps (requested %d)\n", in cpsw_ale_rx_ratelimit_mc()
1201 port, ratelimit_pps - remainder, ratelimit_pps); in cpsw_ale_rx_ratelimit_mc()
1205 dev_dbg(ale->params.dev, "ALE port:%d MC ratelimit set %d\n", in cpsw_ale_rx_ratelimit_mc()
1217 dev_err(ale->params.dev, "ALE port:%d BC ratelimit min value 1000pps\n", port); in cpsw_ale_rx_ratelimit_bc()
1218 return -EINVAL; in cpsw_ale_rx_ratelimit_bc()
1222 dev_info(ale->params.dev, "ALE port:%d BC ratelimit set to %dpps (requested %d)\n", in cpsw_ale_rx_ratelimit_bc()
1223 port, ratelimit_pps - remainder, ratelimit_pps); in cpsw_ale_rx_ratelimit_bc()
1227 dev_dbg(ale->params.dev, "ALE port:%d BC ratelimit set %d\n", in cpsw_ale_rx_ratelimit_bc()
1238 if (ale->ageout) { in cpsw_ale_timer()
1239 ale->timer.expires = jiffies + ale->ageout; in cpsw_ale_timer()
1240 add_timer(&ale->timer); in cpsw_ale_timer()
1248 aging_timer = ale->params.bus_freq / 1000000; in cpsw_ale_hw_aging_timer_start()
1249 aging_timer *= ale->params.ale_ageout; in cpsw_ale_hw_aging_timer_start()
1253 dev_warn(ale->params.dev, in cpsw_ale_hw_aging_timer_start()
1257 writel(aging_timer, ale->params.ale_regs + ALE_AGING_TIMER); in cpsw_ale_hw_aging_timer_start()
1262 writel(0, ale->params.ale_regs + ALE_AGING_TIMER); in cpsw_ale_hw_aging_timer_stop()
1267 if (!ale->params.ale_ageout) in cpsw_ale_aging_start()
1270 if (ale->features & CPSW_ALE_F_HW_AUTOAGING) { in cpsw_ale_aging_start()
1275 timer_setup(&ale->timer, cpsw_ale_timer, 0); in cpsw_ale_aging_start()
1276 ale->timer.expires = jiffies + ale->ageout; in cpsw_ale_aging_start()
1277 add_timer(&ale->timer); in cpsw_ale_aging_start()
1282 if (!ale->params.ale_ageout) in cpsw_ale_aging_stop()
1285 if (ale->features & CPSW_ALE_F_HW_AUTOAGING) { in cpsw_ale_aging_stop()
1290 timer_delete_sync(&ale->timer); in cpsw_ale_aging_stop()
1307 ale_prescale = ale->params.bus_freq / ALE_RATE_LIMIT_MIN_PPS; in cpsw_ale_start()
1308 writel((u32)ale_prescale, ale->params.ale_regs + ALE_PRESCALE); in cpsw_ale_start()
1311 * The actual Rate Limit cfg enabled per-port by port.BCAST/MCAST_LIMIT in cpsw_ale_start()
1413 /* am3/4/5, dra7. dm814x, 66ak2hk-gbe */
1414 .dev_id = "cpsw",
1422 .dev_id = "66ak2h-xgbe",
1446 .dev_id = "am65x-cpsw2g",
1455 .dev_id = "j721e-cpswxg",
1462 .dev_id = "am64-cpswxg",
1479 while (id->dev_id) { in cpsw_ale_match_id()
1480 if (strcmp(dev_id, id->dev_id) == 0) in cpsw_ale_match_id()
1491 .name = "cpsw-ale",
1496 const struct reg_field *reg_fields = ale->params.reg_fields; in cpsw_ale_regfield_init()
1497 struct device *dev = ale->params.dev; in cpsw_ale_regfield_init()
1498 struct regmap *regmap = ale->regmap; in cpsw_ale_regfield_init()
1501 for (i = 0; i < ale->params.num_fields; i++) { in cpsw_ale_regfield_init()
1502 ale->fields[i] = devm_regmap_field_alloc(dev, regmap, in cpsw_ale_regfield_init()
1504 if (IS_ERR(ale->fields[i])) { in cpsw_ale_regfield_init()
1506 return PTR_ERR(ale->fields[i]); in cpsw_ale_regfield_init()
1520 ale_dev_id = cpsw_ale_match_id(cpsw_ale_id_match, params->dev_id); in cpsw_ale_create()
1522 return ERR_PTR(-EINVAL); in cpsw_ale_create()
1524 params->ale_entries = ale_dev_id->tbl_entries; in cpsw_ale_create()
1525 params->nu_switch_ale = ale_dev_id->nu_switch_ale; in cpsw_ale_create()
1526 params->reg_fields = ale_dev_id->reg_fields; in cpsw_ale_create()
1527 params->num_fields = ale_dev_id->num_fields; in cpsw_ale_create()
1529 ale = devm_kzalloc(params->dev, sizeof(*ale), GFP_KERNEL); in cpsw_ale_create()
1531 return ERR_PTR(-ENOMEM); in cpsw_ale_create()
1532 ale->regmap = devm_regmap_init_mmio(params->dev, params->ale_regs, in cpsw_ale_create()
1534 if (IS_ERR(ale->regmap)) { in cpsw_ale_create()
1535 dev_err(params->dev, "Couldn't create CPSW ALE regmap\n"); in cpsw_ale_create()
1536 return ERR_PTR(-ENOMEM); in cpsw_ale_create()
1539 ale->params = *params; in cpsw_ale_create()
1544 ale->p0_untag_vid_mask = devm_bitmap_zalloc(params->dev, VLAN_N_VID, in cpsw_ale_create()
1546 if (!ale->p0_untag_vid_mask) in cpsw_ale_create()
1547 return ERR_PTR(-ENOMEM); in cpsw_ale_create()
1549 ale->ageout = ale->params.ale_ageout * HZ; in cpsw_ale_create()
1550 ale->features = ale_dev_id->features; in cpsw_ale_create()
1551 ale->vlan_entry_tbl = ale_dev_id->vlan_entry_tbl; in cpsw_ale_create()
1553 regmap_field_read(ale->fields[MINOR_VER], &rev_minor); in cpsw_ale_create()
1554 regmap_field_read(ale->fields[MAJOR_VER], &rev_major); in cpsw_ale_create()
1555 ale->version = rev_major << 8 | rev_minor; in cpsw_ale_create()
1556 dev_info(ale->params.dev, "initialized cpsw ale version %d.%d\n", in cpsw_ale_create()
1559 if (ale->features & CPSW_ALE_F_STATUS_REG && in cpsw_ale_create()
1560 !ale->params.ale_entries) { in cpsw_ale_create()
1561 regmap_field_read(ale->fields[ALE_ENTRIES], &ale_entries); in cpsw_ale_create()
1570 return ERR_PTR(-EINVAL); in cpsw_ale_create()
1573 ale->params.ale_entries = ale_entries; in cpsw_ale_create()
1576 if (ale->features & CPSW_ALE_F_STATUS_REG && in cpsw_ale_create()
1577 !ale->params.num_policers) { in cpsw_ale_create()
1578 regmap_field_read(ale->fields[ALE_POLICERS], &policers); in cpsw_ale_create()
1580 return ERR_PTR(-EINVAL); in cpsw_ale_create()
1583 ale->params.num_policers = policers; in cpsw_ale_create()
1586 dev_info(ale->params.dev, in cpsw_ale_create()
1587 "ALE Table size %ld, Policers %ld\n", ale->params.ale_entries, in cpsw_ale_create()
1588 ale->params.num_policers); in cpsw_ale_create()
1591 ale->port_mask_bits = ale->params.ale_ports; in cpsw_ale_create()
1592 ale->port_num_bits = order_base_2(ale->params.ale_ports); in cpsw_ale_create()
1593 ale->vlan_field_bits = ale->params.ale_ports; in cpsw_ale_create()
1595 /* Set defaults override for ALE on NetCP NU switch and for version in cpsw_ale_create()
1598 if (ale->params.nu_switch_ale) { in cpsw_ale_create()
1604 ale->params.ale_ports; in cpsw_ale_create()
1608 ale->params.ale_ports; in cpsw_ale_create()
1613 ale->params.ale_ports; in cpsw_ale_create()
1618 ale->params.ale_ports; in cpsw_ale_create()
1632 for (i = 0; i < ale->params.ale_entries; i++) { in cpsw_ale_dump()
1642 for (i = 0; i < ale->params.ale_entries; i++) { in cpsw_ale_restore()
1650 return ale ? ale->params.ale_entries : 0; in cpsw_ale_get_num_entries()
1657 writel_relaxed(idx, ale->params.ale_regs + ALE_POLICER_TBL_CTL); in cpsw_ale_policer_read_idx()
1665 writel_relaxed(idx, ale->params.ale_regs + ALE_POLICER_TBL_CTL); in cpsw_ale_policer_write_idx()
1672 regmap_field_write(ale->fields[ALE_THREAD_CLASS_INDEX], idx); in cpsw_ale_policer_thread_idx_enable()
1673 regmap_field_write(ale->fields[ALE_THREAD_VALUE], thread_id); in cpsw_ale_policer_thread_idx_enable()
1674 regmap_field_write(ale->fields[ALE_THREAD_ENABLE], enable ? 1 : 0); in cpsw_ale_policer_thread_idx_enable()
1682 for (i = 0; i < ale->params.num_policers ; i++) { in cpsw_ale_policer_reset()
1684 regmap_field_write(ale->fields[POL_PORT_MEN], 0); in cpsw_ale_policer_reset()
1685 regmap_field_write(ale->fields[POL_PRI_MEN], 0); in cpsw_ale_policer_reset()
1686 regmap_field_write(ale->fields[POL_OUI_MEN], 0); in cpsw_ale_policer_reset()
1687 regmap_field_write(ale->fields[POL_DST_MEN], 0); in cpsw_ale_policer_reset()
1688 regmap_field_write(ale->fields[POL_SRC_MEN], 0); in cpsw_ale_policer_reset()
1689 regmap_field_write(ale->fields[POL_OVLAN_MEN], 0); in cpsw_ale_policer_reset()
1690 regmap_field_write(ale->fields[POL_IVLAN_MEN], 0); in cpsw_ale_policer_reset()
1691 regmap_field_write(ale->fields[POL_ETHERTYPE_MEN], 0); in cpsw_ale_policer_reset()
1692 regmap_field_write(ale->fields[POL_IPSRC_MEN], 0); in cpsw_ale_policer_reset()
1693 regmap_field_write(ale->fields[POL_IPDST_MEN], 0); in cpsw_ale_policer_reset()
1694 regmap_field_write(ale->fields[POL_EN], 0); in cpsw_ale_policer_reset()
1695 regmap_field_write(ale->fields[POL_RED_DROP_EN], 0); in cpsw_ale_policer_reset()
1696 regmap_field_write(ale->fields[POL_YELLOW_DROP_EN], 0); in cpsw_ale_policer_reset()
1697 regmap_field_write(ale->fields[POL_PRIORITY_THREAD_EN], 0); in cpsw_ale_policer_reset()
1709 * IEEE802.1Q-2014, Standard for Local and metropolitan area networks in cpsw_ale_classifier_setup_default()
1710 * Table I-2 - Traffic type acronyms in cpsw_ale_classifier_setup_default()
1711 * Table I-3 - Defining traffic types in cpsw_ale_classifier_setup_default()
1723 * pri_thread_map[8-1][0] i.e. thread 1 in cpsw_ale_classifier_setup_default()
1744 regmap_field_write(ale->fields[POL_PRI_VAL], pri); in cpsw_ale_classifier_setup_default()
1745 regmap_field_write(ale->fields[POL_PRI_MEN], 1); in cpsw_ale_classifier_setup_default()
1750 pri_thread_map[num_rx_ch - 1][pri], in cpsw_ale_classifier_setup_default()