Lines Matching +full:0 +full:x160

49 #define AM65_CPSW_REG_CTL			0x004
50 #define AM65_CPSW_PN_REG_CTL			0x004
51 #define AM65_CPSW_PN_REG_FIFO_STATUS		0x050
52 #define AM65_CPSW_PN_REG_EST_CTL		0x060
53 #define AM65_CPSW_PN_REG_PRI_CIR(pri)		(0x140 + 4 * (pri))
54 #define AM65_CPSW_P0_REG_PRI_EIR(pri)		(0x160 + 4 * (pri))
56 #define AM65_CPSW_PN_REG_CTL			0x004
57 #define AM65_CPSW_PN_REG_TX_PRI_MAP		0x018
58 #define AM65_CPSW_PN_REG_RX_PRI_MAP		0x020
59 #define AM65_CPSW_PN_REG_FIFO_STATUS		0x050
60 #define AM65_CPSW_PN_REG_EST_CTL		0x060
61 #define AM65_CPSW_PN_REG_PRI_CIR(pri)		(0x140 + 4 * (pri))
62 #define AM65_CPSW_PN_REG_PRI_EIR(pri)		(0x160 + 4 * (pri))
71 #define AM65_CPSW_PN_EST_ONEBUF			BIT(0)
79 #define AM65_CPSW_PN_FST_TX_PRI_ACTIVE_MSK	GENMASK(7, 0)
86 #define AM65_CPSW_FETCH_RAM_CMD_NUM		0x80
90 #define AM65_CPSW_FETCH_ALLOW_MSK		GENMASK(7, 0)
124 	return 0;  in am65_cpsw_qos_ndo_tx_p0_set_maxrate()
135 #define AM65_CPSW_REG_CTL			0x004
136 #define AM65_CPSW_PN_REG_CTL			0x004
137 #define AM65_CPSW_PN_REG_MAX_BLKS		0x008
138 #define AM65_CPSW_PN_REG_TX_PRI_MAP		0x018
139 #define AM65_CPSW_PN_REG_RX_PRI_MAP		0x020
140 #define AM65_CPSW_PN_REG_IET_CTRL		0x040
141 #define AM65_CPSW_PN_REG_IET_STATUS		0x044
142 #define AM65_CPSW_PN_REG_IET_VERIFY		0x048
143 #define AM65_CPSW_PN_REG_FIFO_STATUS		0x050
144 #define AM65_CPSW_PN_REG_EST_CTL		0x060
145 #define AM65_CPSW_PN_REG_PRI_CIR(pri)		(0x140 + 4 * (pri))
146 #define AM65_CPSW_PN_REG_PRI_EIR(pri)		(0x160 + 4 * (pri))
157 #define AM65_CPSW_PN_EST_ONEBUF			BIT(0)
165 #define AM65_CPSW_PN_IET_MAC_PENABLE		BIT(0)
183 #define AM65_CPSW_PN_MAC_STATUS			GENMASK(3, 0)
184 #define AM65_CPSW_PN_MAC_VERIFIED		BIT(0)
190 #define AM65_CPSW_PN_MAC_VERIFY_CNT_MASK	GENMASK(23, 0)
198 #define AM65_CPSW_PN_FST_TX_PRI_ACTIVE_MSK	GENMASK(7, 0)
205 #define AM65_CPSW_FETCH_RAM_CMD_NUM		0x80
209 #define AM65_CPSW_FETCH_ALLOW_MSK		GENMASK(7, 0)
214 #define AM65_CPSW_PN_TX_RX_MAX_BLKS_IET		0xD07
217 #define AM65_CPSW_STATN_IET_RX_ASSEMBLY_ERROR	0x140
218 #define AM65_CPSW_STATN_IET_RX_ASSEMBLY_OK	0x144
219 #define AM65_CPSW_STATN_IET_RX_SMD_ERROR	0x148
220 #define AM65_CPSW_STATN_IET_RX_FRAG		0x14c
221 #define AM65_CPSW_STATN_IET_TX_HOLD		0x150
222 #define AM65_CPSW_STATN_IET_TX_FRAG		0x154