26 		reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);  in spl2sw_mac_hw_stop()
32 	reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);  in spl2sw_mac_hw_stop()
42 	reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);  in spl2sw_mac_hw_start()
48 	reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);  in spl2sw_mac_hw_start()
72 	ret = read_poll_timeout(readl, reg, reg & MAC_W_MAC_DONE, 1, 200, true,  in spl2sw_mac_addr_add()
80 		   readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0),  in spl2sw_mac_addr_add()
82 		   readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)),  in spl2sw_mac_addr_add()
84 		   readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0)));  in spl2sw_mac_addr_add()
108 	ret = read_poll_timeout(readl, reg, reg & MAC_W_MAC_DONE, 1, 200, true,  in spl2sw_mac_addr_del()
116 		   readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0),  in spl2sw_mac_addr_del()
118 		   readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)),  in spl2sw_mac_addr_del()
120 		   readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0)));  in spl2sw_mac_addr_del()
129 	reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);  in spl2sw_mac_hw_init()
153 	reg = readl(comm->l2sw_reg_base + L2SW_LED_PORT0);  in spl2sw_mac_hw_init()
161 	reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);  in spl2sw_mac_hw_init()
172 	reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);  in spl2sw_mac_hw_init()
179 	reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL1);  in spl2sw_mac_hw_init()
186 	reg = readl(comm->l2sw_reg_base + L2SW_MAC_FORCE_MODE);  in spl2sw_mac_hw_init()
208 	reg = readl(comm->l2sw_reg_base + L2SW_SW_GLB_CNTL);  in spl2sw_mac_hw_init()
227 	reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);  in spl2sw_mac_rx_mode_set()
243 	netdev_dbg(ndev, "cpu_cntl = %08x\n", readl(comm->l2sw_reg_base + L2SW_CPU_CNTL));  in spl2sw_mac_rx_mode_set()