Lines Matching +full:rx +full:- +full:enable
1 /* SPDX-License-Identifier: GPL-2.0 */
15 #define GLOB_MSIZE 0x0cUL /* Local-mem size (64K) */
22 #define GLOB_CTRL_EPAR 0x00000020 /* Enable parity */
42 #define CREG_RXDS 0x08UL /* RX descriptor ring ptr */
44 #define CREG_RIMASK 0x10UL /* RX Interrupt Mask */
48 #define CREG_RXWBUFPTR 0x20UL /* Local memory rx write ptr */
49 #define CREG_RXRBUFPTR 0x24UL /* Local memory rx read ptr */
64 #define CREG_STAT_RXDROP 0x00000010 /* Dropped a RX'd packet */
79 #define CREG_QMASK_RXDROP 0x00000010 /* RX drop */
80 #define CREG_QMASK_RXBERROR 0x00000008 /* RX buffer error */
81 #define CREG_QMASK_RXLEERR 0x00000004 /* RX late error */
82 #define CREG_QMASK_RXPERR 0x00000002 /* RX parity error */
83 #define CREG_QMASK_RXSERR 0x00000001 /* RX sbus error ack */
87 /* 0x004-->0x0fc, reserved */
90 /* 0x108-->0x204, reserved */
93 #define BMAC_IGAP1 0x210UL /* Inter-packet gap 1 */
94 #define BMAC_IGAP2 0x214UL /* Inter-packet gap 2 */
105 #define BMAC_NCCTR 0x240UL /* Transmit normal-collision counter */
106 #define BMAC_FCCTR 0x244UL /* Transmit first-collision counter */
107 #define BMAC_EXCTR 0x248UL /* Transmit excess-collision counter */
108 #define BMAC_LTCTR 0x24cUL /* Transmit late-collision counter */
111 /* 0x258-->0x304, reserved */
120 #define BMAC_GLECTR 0x328UL /* Receive giant-length error counter */
137 #define BIGMAC_XCFG_ODENABLE 0x00000001 /* Output driver enable */
139 #define BIGMAC_XCFG_MLBACK 0x00000004 /* Loopback-mode MII enable */
140 #define BIGMAC_XCFG_SMODE 0x00000008 /* Enable serial mode */
145 #define BIGMAC_STAT_ACNTEXP 0x00000004 /* Align-error counter expired */
146 #define BIGMAC_STAT_CCNTEXP 0x00000008 /* CRC-error counter expired */
147 #define BIGMAC_STAT_LCNTEXP 0x00000010 /* Length-error counter expired */
149 #define BIGMAC_STAT_CVCNTEXP 0x00000040 /* Code-violation counter expired */
152 #define BIGMAC_STAT_MAXPKTERR 0x00000400 /* Max-packet size error */
153 #define BIGMAC_STAT_NCNTEXP 0x00000800 /* Normal-collision counter expired */
154 #define BIGMAC_STAT_ECNTEXP 0x00001000 /* Excess-collision counter expired */
155 #define BIGMAC_STAT_LCCNTEXP 0x00002000 /* Late-collision counter expired */
156 #define BIGMAC_STAT_FCNTEXP 0x00004000 /* First-collision counter expired */
157 #define BIGMAC_STAT_DTIMEXP 0x00008000 /* Defer-timer expired */
162 #define BIGMAC_IMASK_ACNTEXP 0x00000004 /* Align-error counter expired */
163 #define BIGMAC_IMASK_CCNTEXP 0x00000008 /* CRC-error counter expired */
164 #define BIGMAC_IMASK_LCNTEXP 0x00000010 /* Length-error counter expired */
166 #define BIGMAC_IMASK_CVCNTEXP 0x00000040 /* Code-violation counter expired */
169 #define BIGMAC_IMASK_MAXPKTERR 0x00000400 /* Max-packet size error */
170 #define BIGMAC_IMASK_NCNTEXP 0x00000800 /* Normal-collision counter expired */
171 #define BIGMAC_IMASK_ECNTEXP 0x00001000 /* Excess-collision counter expired */
172 #define BIGMAC_IMASK_LCCNTEXP 0x00002000 /* Late-collision counter expired */
173 #define BIGMAC_IMASK_FCNTEXP 0x00004000 /* First-collision counter expired */
174 #define BIGMAC_IMASK_DTIMEXP 0x00008000 /* Defer-timer expired */
177 #define BIGMAC_TXCFG_ENABLE 0x00000001 /* Enable the transmitter */
179 #define BIGMAC_TXCFG_SMODE 0x00000020 /* Enable slow transmit mode */
183 #define BIGMAC_TXCFG_FULLDPLX 0x00000200 /* Enable full-duplex */
186 #define BIGMAC_RXCFG_ENABLE 0x00000001 /* Enable the receiver */
187 #define BIGMAC_RXCFG_FIFO 0x0000000e /* Default rx fthresh... */
188 #define BIGMAC_RXCFG_PSTRIP 0x00000020 /* Pad byte strip enable */
189 #define BIGMAC_RXCFG_PMISC 0x00000040 /* Enable promiscuous mode */
193 #define BIGMAC_RXCFG_PGRP 0x00000400 /* Enable promisc group mode */
194 #define BIGMAC_RXCFG_HENABLE 0x00000800 /* Enable the hash filter */
195 #define BIGMAC_RXCFG_AENABLE 0x00001000 /* Enable the address filter */
209 #define TCVR_PAL_SERIAL 0x00000001 /* Enable serial mode */
210 #define TCVR_PAL_EXTLBACK 0x00000002 /* Enable external loopback */
212 #define TCVR_PAL_LTENABLE 0x00000008 /* Link test enable */
219 #define MGMT_PAL_TIMEO 0x00000008 /* Transmit enable timeout error */
254 #define NEXT_RX(num) (((num) + 1) & (RX_RING_SIZE - 1))
255 #define NEXT_TX(num) (((num) + 1) & (TX_RING_SIZE - 1))
256 #define PREV_RX(num) (((num) - 1) & (RX_RING_SIZE - 1))
257 #define PREV_TX(num) (((num) - 1) & (TX_RING_SIZE - 1))
260 (((bp)->tx_old <= (bp)->tx_new) ? \
261 (bp)->tx_old + (TX_RING_SIZE - 1) - (bp)->tx_new : \
262 (bp)->tx_old - (bp)->tx_new - 1)
274 ((__u32)((unsigned long)(&(((struct bmac_init_block *)0)->mem[elem]))))
294 struct bmac_init_block *bmac_block; /* RX and TX descriptors */
295 dma_addr_t bblock_dvma; /* RX and TX descriptors */
322 ((((unsigned long)(addr) + (64 - 1)) & ~(64 - 1)) - (unsigned long)(addr))
330 int offset = ALIGNED_RX_SKB_ADDR(skb->data); in big_mac_alloc_skb()