200 	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;  in __stmmac_disable_all_queues()
201 	u32 tx_queues_cnt = priv->plat->tx_queues_to_use;  in __stmmac_disable_all_queues()
227 	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;  in stmmac_disable_all_queues()
249 	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;  in stmmac_enable_all_queues()
250 	u32 tx_queues_cnt = priv->plat->tx_queues_to_use;  in stmmac_enable_all_queues()
323 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_eee_tx_busy()
418 		ns -= priv->plat->cdc_error_adj;  in stmmac_get_tx_hwtstamp()
448 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac)  in stmmac_get_rx_hwtstamp()
455 		ns -= priv->plat->cdc_error_adj;  in stmmac_get_rx_hwtstamp()
699 	bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;  in stmmac_init_tstamp_counter()
704 	if (!priv->plat->clk_ptp_rate) {  in stmmac_init_tstamp_counter()
714 					   priv->plat->clk_ptp_rate,  in stmmac_init_tstamp_counter()
727 	priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);  in stmmac_init_tstamp_counter()
748 	bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;  in stmmac_init_timestamping()
751 	if (priv->plat->ptp_clk_freq_config)  in stmmac_init_timestamping()
752 		priv->plat->ptp_clk_freq_config(priv);  in stmmac_init_timestamping()
783 	if (priv->plat->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY)  in stmmac_init_timestamping()
793 	ret = clk_prepare_enable(priv->plat->clk_ptp_ref);  in stmmac_setup_ptp()
806 	clk_disable_unprepare(priv->plat->clk_ptp_ref);  in stmmac_release_ptp()
819 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_mac_flow_ctrl()
835 	if (priv->plat->max_speed)  in stmmac_mac_get_caps()
836 		phylink_limit_mac_speed(config, priv->plat->max_speed);  in stmmac_mac_get_caps()
847 	if (priv->plat->select_pcs) {  in stmmac_mac_select_pcs()
848 		pcs = priv->plat->select_pcs(priv, interface);  in stmmac_mac_select_pcs()
886 	if ((priv->plat->flags & STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &&  in stmmac_mac_link_up()
887 	    priv->plat->serdes_powerup)  in stmmac_mac_link_up()
888 		priv->plat->serdes_powerup(priv->dev, priv->plat->bsp_priv);  in stmmac_mac_link_up()
952 	if (priv->plat->fix_mac_speed)  in stmmac_mac_link_up()
953 		priv->plat->fix_mac_speed(priv->plat->bsp_priv, speed, mode);  in stmmac_mac_link_up()
975 	if (priv->plat->set_clk_tx_rate) {  in stmmac_mac_link_up()
976 		ret = priv->plat->set_clk_tx_rate(priv->plat->bsp_priv,  in stmmac_mac_link_up()
977 						priv->plat->clk_tx_i,  in stmmac_mac_link_up()
992 	if (priv->plat->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY)  in stmmac_mac_link_up()
1032 	if (priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP)  in stmmac_mac_enable_tx_lpi()
1062 	if (priv->plat->mac_finish)  in stmmac_mac_finish()
1063 		priv->plat->mac_finish(ndev, priv->plat->bsp_priv, mode, interface);  in stmmac_mac_finish()
1088 	int interface = priv->plat->phy_interface;  in stmmac_check_pcs_mode()
1115 	int mode = priv->plat->phy_interface;  in stmmac_init_phy()
1128 	fwnode = priv->plat->port_node;  in stmmac_init_phy()
1141 		int addr = priv->plat->phy_addr;  in stmmac_init_phy()
1177 	if (!priv->plat->pmt) {  in stmmac_init_phy()
1205 	if (!(priv->plat->flags & STMMAC_FLAG_RX_CLK_RUNS_IN_LPI))  in stmmac_phy_setup()
1209 	priv->tx_lpi_clk_stop = priv->plat->flags &  in stmmac_phy_setup()
1212 	mdio_bus_data = priv->plat->mdio_bus_data;  in stmmac_phy_setup()
1219 	if (priv->plat->get_interfaces)  in stmmac_phy_setup()
1220 		priv->plat->get_interfaces(priv, priv->plat->bsp_priv,  in stmmac_phy_setup()
1228 		__set_bit(priv->plat->phy_interface,  in stmmac_phy_setup()
1253 	fwnode = priv->plat->port_node;  in stmmac_phy_setup()
1257 	phylink = phylink_create(config, fwnode, priv->plat->phy_interface,  in stmmac_phy_setup()
1269 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_display_rx_rings()
1297 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_display_tx_rings()
1430 	u32 rx_queue_cnt = priv->plat->rx_queues_to_use;  in stmmac_clear_descriptors()
1431 	u32 tx_queue_cnt = priv->plat->tx_queues_to_use;  in stmmac_clear_descriptors()
1750 	u32 rx_count = priv->plat->rx_queues_to_use;  in init_dma_rx_desc_rings()
1847 	tx_queue_cnt = priv->plat->tx_queues_to_use;  in init_dma_tx_desc_rings()
1916 	u32 tx_queue_cnt = priv->plat->tx_queues_to_use;  in stmmac_free_tx_skbufs()
1965 	u32 rx_count = priv->plat->rx_queues_to_use;  in free_dma_rx_desc_resources()
2012 	u32 tx_count = priv->plat->tx_queues_to_use;  in free_dma_tx_desc_resources()
2116 	u32 rx_count = priv->plat->rx_queues_to_use;  in alloc_dma_rx_desc_resources()
2195 	u32 tx_count = priv->plat->tx_queues_to_use;  in alloc_dma_tx_desc_resources()
2260 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mac_enable_rx_queues()
2265 		mode = priv->plat->rx_queues_cfg[queue].mode_to_use;  in stmmac_mac_enable_rx_queues()
2324 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_enable_all_dma_irq()
2325 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_enable_all_dma_irq()
2347 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_start_all_dma()
2348 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_start_all_dma()
2366 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_stop_all_dma()
2367 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_stop_all_dma()
2385 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_dma_operation_mode()
2386 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_dma_operation_mode()
2387 	int rxfifosz = priv->plat->rx_fifo_size;  in stmmac_dma_operation_mode()
2388 	int txfifosz = priv->plat->tx_fifo_size;  in stmmac_dma_operation_mode()
2400 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac) {  in stmmac_dma_operation_mode()
2405 	if (priv->plat->force_thresh_dma_mode) {  in stmmac_dma_operation_mode()
2408 	} else if (priv->plat->force_sf_dma_mode || priv->plat->tx_coe) {  in stmmac_dma_operation_mode()
2429 		qmode = priv->plat->rx_queues_cfg[chan].mode_to_use;  in stmmac_dma_operation_mode()
2447 		qmode = priv->plat->tx_queues_cfg[chan].mode_to_use;  in stmmac_dma_operation_mode()
2482 		ns -= priv->plat->cdc_error_adj;  in stmmac_xsk_fill_timestamp()
2510 	bool csum = !priv->plat->tx_queues_cfg[queue].coe_unsupported;  in stmmac_xdp_xmit_zc()
2631 		if (priv->plat->force_thresh_dma_mode)  in stmmac_bump_dma_threshold()
2853 	stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_tx_err()
2874 	u8 rxqmode = priv->plat->rx_queues_cfg[chan].mode_to_use;  in stmmac_set_dma_operation_mode()
2875 	u8 txqmode = priv->plat->tx_queues_cfg[chan].mode_to_use;  in stmmac_set_dma_operation_mode()
2876 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_set_dma_operation_mode()
2877 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_set_dma_operation_mode()
2878 	int rxfifosz = priv->plat->rx_fifo_size;  in stmmac_set_dma_operation_mode()
2879 	int txfifosz = priv->plat->tx_fifo_size;  in stmmac_set_dma_operation_mode()
2922 	if ((status & handle_rx) && (chan < priv->plat->rx_queues_to_use)) {  in stmmac_napi_check()
2931 	if ((status & handle_tx) && (chan < priv->plat->tx_queues_to_use)) {  in stmmac_napi_check()
2952 	u32 tx_channel_count = priv->plat->tx_queues_to_use;  in stmmac_dma_interrupt()
2953 	u32 rx_channel_count = priv->plat->rx_queues_to_use;  in stmmac_dma_interrupt()
3042 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_init_dma_engine()
3043 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_init_dma_engine()
3050 	if (!priv->plat->dma_cfg || !priv->plat->dma_cfg->pbl) {  in stmmac_init_dma_engine()
3056 		priv->plat->dma_cfg->atds = 1;  in stmmac_init_dma_engine()
3065 	stmmac_dma_init(priv, priv->ioaddr, priv->plat->dma_cfg);  in stmmac_init_dma_engine()
3067 	if (priv->plat->axi)  in stmmac_init_dma_engine()
3068 		stmmac_axi(priv, priv->ioaddr, priv->plat->axi);  in stmmac_init_dma_engine()
3072 		stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);  in stmmac_init_dma_engine()
3080 		stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_init_dma_engine()
3094 		stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_init_dma_engine()
3168 	u32 tx_channel_count = priv->plat->tx_queues_to_use;  in stmmac_init_coalesce()
3169 	u32 rx_channel_count = priv->plat->rx_queues_to_use;  in stmmac_init_coalesce()
3187 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_set_rings_length()
3188 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_set_rings_length()
3209 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_set_tx_queue_weight()
3214 		weight = priv->plat->tx_queues_cfg[queue].weight;  in stmmac_set_tx_queue_weight()
3226 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_configure_cbs()
3232 		mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use;  in stmmac_configure_cbs()
3237 				priv->plat->tx_queues_cfg[queue].send_slope,  in stmmac_configure_cbs()
3238 				priv->plat->tx_queues_cfg[queue].idle_slope,  in stmmac_configure_cbs()
3239 				priv->plat->tx_queues_cfg[queue].high_credit,  in stmmac_configure_cbs()
3240 				priv->plat->tx_queues_cfg[queue].low_credit,  in stmmac_configure_cbs()
3252 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_rx_queue_dma_chan_map()
3257 		chan = priv->plat->rx_queues_cfg[queue].chan;  in stmmac_rx_queue_dma_chan_map()
3269 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mac_config_rx_queues_prio()
3274 		if (!priv->plat->rx_queues_cfg[queue].use_prio)  in stmmac_mac_config_rx_queues_prio()
3277 		prio = priv->plat->rx_queues_cfg[queue].prio;  in stmmac_mac_config_rx_queues_prio()
3289 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_mac_config_tx_queues_prio()
3294 		if (!priv->plat->tx_queues_cfg[queue].use_prio)  in stmmac_mac_config_tx_queues_prio()
3297 		prio = priv->plat->tx_queues_cfg[queue].prio;  in stmmac_mac_config_tx_queues_prio()
3309 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mac_config_rx_queues_routing()
3315 		if (priv->plat->rx_queues_cfg[queue].pkt_route == 0x0)  in stmmac_mac_config_rx_queues_routing()
3318 		packet = priv->plat->rx_queues_cfg[queue].pkt_route;  in stmmac_mac_config_rx_queues_routing()
3325 	if (!priv->dma_cap.rssen || !priv->plat->rss_en) {  in stmmac_mac_config_rss()
3336 			     priv->plat->rx_queues_to_use);  in stmmac_mac_config_rss()
3346 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mtl_configuration()
3347 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_mtl_configuration()
3355 				priv->plat->rx_sched_algorithm);  in stmmac_mtl_configuration()
3360 				priv->plat->tx_sched_algorithm);  in stmmac_mtl_configuration()
3394 					  priv->plat->safety_feat_cfg);  in stmmac_safety_feat_configuration()
3415 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_hw_setup()
3416 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_hw_setup()
3448 		int speed = priv->plat->mac_port_sel_speed;  in stmmac_hw_setup()
3471 		priv->plat->rx_coe = STMMAC_RX_COE_NONE;  in stmmac_hw_setup()
3533 	netif_set_real_num_rx_queues(dev, priv->plat->rx_queues_to_use);  in stmmac_hw_setup()
3534 	netif_set_real_num_tx_queues(dev, priv->plat->tx_queues_to_use);  in stmmac_hw_setup()
3554 		irq_idx = priv->plat->tx_queues_to_use;  in stmmac_free_irq()
3563 		irq_idx = priv->plat->rx_queues_to_use;  in stmmac_free_irq()
3714 	for (i = 0; i < priv->plat->rx_queues_to_use; i++) {  in stmmac_request_irq_multi_msi()
3738 	for (i = 0; i < priv->plat->tx_queues_to_use; i++) {  in stmmac_request_irq_multi_msi()
3840 	if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN)  in stmmac_request_irq()
3890 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) {  in stmmac_setup_dma_desc()
3892 		int tbs_en = priv->plat->tx_queues_cfg[chan].tbs_en;  in stmmac_setup_dma_desc()
3945 	if (!(priv->plat->flags & STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &&  in __stmmac_open()
3946 	    priv->plat->serdes_powerup) {  in __stmmac_open()
3947 		ret = priv->plat->serdes_powerup(dev, priv->plat->bsp_priv);  in __stmmac_open()
3982 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in __stmmac_open()
4047 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in __stmmac_release()
4062 	if (priv->plat->serdes_powerdown)  in __stmmac_release()
4063 		priv->plat->serdes_powerdown(dev, priv->plat->bsp_priv);  in __stmmac_release()
4516 		if (priv->plat->has_gmac4 && (gso & SKB_GSO_UDP_L4))  in stmmac_xmit()
4560 	    (priv->plat->tx_queues_cfg[queue].coe_unsupported ||  in stmmac_xmit()
4579 	enh_desc = priv->plat->enh_desc;  in stmmac_xmit()
4896 	bool csum = !priv->plat->tx_queues_cfg[queue].coe_unsupported;  in stmmac_xdp_xmit_xdpf()
4982 	while (index >= priv->plat->tx_queues_to_use)  in stmmac_xdp_get_tx_queue()
4983 		index -= priv->plat->tx_queues_to_use;  in stmmac_xdp_get_tx_queue()
5849 	int txfifosz = priv->plat->tx_fifo_size;  in stmmac_change_mtu()
5857 	txfifosz /= priv->plat->tx_queues_to_use;  in stmmac_change_mtu()
5906 	if (priv->plat->rx_coe == STMMAC_RX_COE_NONE)  in stmmac_fix_features()
5909 	if (!priv->plat->tx_coe)  in stmmac_fix_features()
5917 	if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))  in stmmac_fix_features()
5921 	if ((priv->plat->flags & STMMAC_FLAG_TSO_EN) && (priv->dma_cap.tsoen)) {  in stmmac_fix_features()
5938 		priv->hw->rx_csum = priv->plat->rx_coe;  in stmmac_set_features()
5950 		for (chan = 0; chan < priv->plat->rx_queues_to_use; chan++)  in stmmac_set_features()
5968 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_common_interrupt()
5969 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_common_interrupt()
5974 	xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;  in stmmac_common_interrupt()
5988 	if ((priv->plat->has_gmac) || xmac) {  in stmmac_common_interrupt()
6004 		    !(priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)) {  in stmmac_common_interrupt()
6279 	u32 rx_count = priv->plat->rx_queues_to_use;  in stmmac_rings_status_show()
6280 	u32 tx_count = priv->plat->tx_queues_to_use;  in stmmac_rings_status_show()
6358 	if (priv->plat->has_xgmac) {  in stmmac_dma_cap_show()
6382 	if (priv->plat->has_xgmac)  in stmmac_dma_cap_show()
6391 	    priv->plat->has_xgmac) {  in stmmac_dma_cap_show()
6757 	stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_enable_rx_queue()
6819 	stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_enable_tx_queue()
6847 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_xdp_release()
6872 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_xdp_open()
6873 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_xdp_open()
6900 		stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);  in stmmac_xdp_open()
6911 		stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_xdp_open()
6938 		stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_xdp_open()
6967 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_xdp_open()
6990 	if (queue >= priv->plat->rx_queues_to_use ||  in stmmac_xsk_wakeup()
6991 	    queue >= priv->plat->tx_queues_to_use)  in stmmac_xsk_wakeup()
7015 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_get_stats64()
7016 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_get_stats64()
7132 	if (priv->plat->flags & STMMAC_FLAG_HAS_SUN8I)  in stmmac_hw_init()
7151 		priv->plat->enh_desc = priv->dma_cap.enh_desc;  in stmmac_hw_init()
7152 		priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up &&  in stmmac_hw_init()
7153 				!(priv->plat->flags & STMMAC_FLAG_USE_PHY_WOL);  in stmmac_hw_init()
7162 		if (priv->plat->force_thresh_dma_mode)  in stmmac_hw_init()
7163 			priv->plat->tx_coe = 0;  in stmmac_hw_init()
7165 			priv->plat->tx_coe = priv->dma_cap.tx_coe;  in stmmac_hw_init()
7168 		priv->plat->rx_coe = priv->dma_cap.rx_coe;  in stmmac_hw_init()
7171 			priv->plat->rx_coe = STMMAC_RX_COE_TYPE2;  in stmmac_hw_init()
7173 			priv->plat->rx_coe = STMMAC_RX_COE_TYPE1;  in stmmac_hw_init()
7179 	if (priv->plat->rx_coe) {  in stmmac_hw_init()
7180 		priv->hw->rx_csum = priv->plat->rx_coe;  in stmmac_hw_init()
7185 	if (priv->plat->tx_coe)  in stmmac_hw_init()
7188 	if (priv->plat->pmt) {  in stmmac_hw_init()
7198 	    priv->plat->rx_queues_to_use > priv->dma_cap.number_rx_queues) {  in stmmac_hw_init()
7201 			 priv->plat->rx_queues_to_use);  in stmmac_hw_init()
7202 		priv->plat->rx_queues_to_use = priv->dma_cap.number_rx_queues;  in stmmac_hw_init()
7205 	    priv->plat->tx_queues_to_use > priv->dma_cap.number_tx_queues) {  in stmmac_hw_init()
7208 			 priv->plat->tx_queues_to_use);  in stmmac_hw_init()
7209 		priv->plat->tx_queues_to_use = priv->dma_cap.number_tx_queues;  in stmmac_hw_init()
7213 	    priv->plat->rx_fifo_size > priv->dma_cap.rx_fifo_size) {  in stmmac_hw_init()
7216 			 priv->plat->rx_fifo_size);  in stmmac_hw_init()
7217 		priv->plat->rx_fifo_size = priv->dma_cap.rx_fifo_size;  in stmmac_hw_init()
7220 	    priv->plat->tx_fifo_size > priv->dma_cap.tx_fifo_size) {  in stmmac_hw_init()
7223 			 priv->plat->tx_fifo_size);  in stmmac_hw_init()
7224 		priv->plat->tx_fifo_size = priv->dma_cap.tx_fifo_size;  in stmmac_hw_init()
7228 		(priv->plat->flags & STMMAC_FLAG_VLAN_FAIL_Q_EN);  in stmmac_hw_init()
7229 	priv->hw->vlan_fail_q = priv->plat->vlan_fail_q;  in stmmac_hw_init()
7244 	    (priv->plat->has_xgmac)) && (!priv->plat->riwt_off)) {  in stmmac_hw_init()
7258 	maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);  in stmmac_napi_add()
7267 		if (queue < priv->plat->rx_queues_to_use) {  in stmmac_napi_add()
7270 		if (queue < priv->plat->tx_queues_to_use) {  in stmmac_napi_add()
7274 		if (queue < priv->plat->rx_queues_to_use &&  in stmmac_napi_add()
7275 		    queue < priv->plat->tx_queues_to_use) {  in stmmac_napi_add()
7287 	maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);  in stmmac_napi_del()
7292 		if (queue < priv->plat->rx_queues_to_use)  in stmmac_napi_del()
7294 		if (queue < priv->plat->tx_queues_to_use)  in stmmac_napi_del()
7296 		if (queue < priv->plat->rx_queues_to_use &&  in stmmac_napi_del()
7297 		    queue < priv->plat->tx_queues_to_use) {  in stmmac_napi_del()
7313 	priv->plat->rx_queues_to_use = rx_cnt;  in stmmac_reinit_queues()
7314 	priv->plat->tx_queues_to_use = tx_cnt;  in stmmac_reinit_queues()
7358 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac)  in stmmac_xdp_rx_timestamp()
7364 		ns -= priv->plat->cdc_error_adj;  in stmmac_xdp_rx_timestamp()
7420 	priv->plat = plat_dat;  in stmmac_dvr_probe()
7423 	priv->plat->dma_cfg->multi_msi_en =  in stmmac_dvr_probe()
7424 		(priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN);  in stmmac_dvr_probe()
7465 		priv->plat->phy_addr = phyaddr;  in stmmac_dvr_probe()
7467 	if (priv->plat->stmmac_rst) {  in stmmac_dvr_probe()
7468 		ret = reset_control_assert(priv->plat->stmmac_rst);  in stmmac_dvr_probe()
7469 		reset_control_deassert(priv->plat->stmmac_rst);  in stmmac_dvr_probe()
7474 			reset_control_reset(priv->plat->stmmac_rst);  in stmmac_dvr_probe()
7477 	ret = reset_control_deassert(priv->plat->stmmac_ahb_rst);  in stmmac_dvr_probe()
7493 		priv->plat->dma_cfg->dche = false;  in stmmac_dvr_probe()
7512 	if ((priv->plat->flags & STMMAC_FLAG_TSO_EN) && (priv->dma_cap.tsoen)) {  in stmmac_dvr_probe()
7514 		if (priv->plat->has_gmac4)  in stmmac_dvr_probe()
7521 	    !(priv->plat->flags & STMMAC_FLAG_SPH_DISABLE)) {  in stmmac_dvr_probe()
7533 	if (priv->plat->host_dma_width)  in stmmac_dvr_probe()
7534 		priv->dma_cap.host_dma_width = priv->plat->host_dma_width;  in stmmac_dvr_probe()
7550 				priv->plat->dma_cfg->eame = true;  in stmmac_dvr_probe()
7567 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac) {  in stmmac_dvr_probe()
7583 	rxq = priv->plat->rx_queues_to_use;  in stmmac_dvr_probe()
7588 	if (priv->dma_cap.rssen && priv->plat->rss_en)  in stmmac_dvr_probe()
7595 	if (priv->plat->has_xgmac)  in stmmac_dvr_probe()
7597 	else if ((priv->plat->enh_desc) || (priv->synopsys_id >= DWMAC_CORE_4_00))  in stmmac_dvr_probe()
7601 	/* Will not overwrite ndev->max_mtu if plat->maxmtu > ndev->max_mtu  in stmmac_dvr_probe()
7602 	 * as well as plat->maxmtu < ndev->min_mtu which is a invalid range.  in stmmac_dvr_probe()
7604 	if ((priv->plat->maxmtu < ndev->max_mtu) &&  in stmmac_dvr_probe()
7605 	    (priv->plat->maxmtu >= ndev->min_mtu))  in stmmac_dvr_probe()
7606 		ndev->max_mtu = priv->plat->maxmtu;  in stmmac_dvr_probe()
7607 	else if (priv->plat->maxmtu < ndev->min_mtu)  in stmmac_dvr_probe()
7610 			 __func__, priv->plat->maxmtu);  in stmmac_dvr_probe()
7632 			      priv->plat->bus_id);  in stmmac_dvr_probe()
7657 	if (priv->plat->dump_debug_regs)  in stmmac_dvr_probe()
7658 		priv->plat->dump_debug_regs(priv->plat->bsp_priv);  in stmmac_dvr_probe()
7705 	if (priv->plat->stmmac_rst)  in stmmac_dvr_remove()
7706 		reset_control_assert(priv->plat->stmmac_rst);  in stmmac_dvr_remove()
7707 	reset_control_assert(priv->plat->stmmac_ahb_rst);  in stmmac_dvr_remove()
7743 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_suspend()
7754 	if (priv->plat->serdes_powerdown)  in stmmac_suspend()
7755 		priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);  in stmmac_suspend()
7778 	if (priv->plat->suspend)  in stmmac_suspend()
7779 		return priv->plat->suspend(dev, priv->plat->bsp_priv);  in stmmac_suspend()
7810 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_reset_queues_param()
7811 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_reset_queues_param()
7833 	if (priv->plat->resume) {  in stmmac_resume()
7834 		ret = priv->plat->resume(dev, priv->plat->bsp_priv);  in stmmac_resume()
7860 	if (!(priv->plat->flags & STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &&  in stmmac_resume()
7861 	    priv->plat->serdes_powerup) {  in stmmac_resume()
7862 		ret = priv->plat->serdes_powerup(ndev,  in stmmac_resume()
7863 						 priv->plat->bsp_priv);  in stmmac_resume()