Lines Matching +full:1 +full:- +full:4
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
14 #define MC_FW_STATE_POR (1)
19 #define MC_FW_STATE_BOOTING (4)
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
63 /* MCDI version 1
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
98 #define MCDI_HEADER_RESYNC_WIDTH 1
102 #define MCDI_HEADER_SEQ_WIDTH 4
104 #define MCDI_HEADER_RSVD_WIDTH 1
106 #define MCDI_HEADER_NOT_EPOCH_WIDTH 1
108 #define MCDI_HEADER_ERROR_WIDTH 1
110 #define MCDI_HEADER_RESPONSE_WIDTH 1
126 * - To advance a shared memory request if XFLAGS_EVREQ was set
127 * - As a notification (link state, i2c event), controlled
139 * - LEVEL==INFO Command succeeded
140 * - LEVEL==ERR Command failed
151 * non-existent MCDI command MC_CMD_DEBUG_LOG.
156 * Since the event is written in big-endian byte order, this works
157 * providing bits 56-63 of the event are 0xc0.
169 #define MC_CMD_ERR_EPERM 1
170 /* Non-existent command target */
173 #define MC_CMD_ERR_EINTR 4
192 /* Read-only */
196 /* Non-recursive resource is already acquired */
217 /* V-adaptor not found. */
221 /* V-switch not found. */
229 /* Invalid v-switch type. */
231 /* Invalid v-port type. */
253 * This error code is followed by a 32-bit handle that
256 #define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4
266 * an operation failed due to lack of SR-IOV privilege.
275 * May also returned for other operations such as sub-variant switching. */
315 #define SIENA_MC_BOOTROM_COPYCODE_VEC (0x800 - 3 * 0x4)
316 #define HUNT_MC_BOOTROM_COPYCODE_VEC (0x8000 - 3 * 0x4)
317 #define MEDFORD_MC_BOOTROM_COPYCODE_VEC (0x10000 - 3 * 0x4)
319 #define SIENA_MC_BOOTROM_NOFLASH_VEC (0x800 - 2 * 0x4)
320 #define HUNT_MC_BOOTROM_NOFLASH_VEC (0x8000 - 2 * 0x4)
321 #define MEDFORD_MC_BOOTROM_NOFLASH_VEC (0x10000 - 2 * 0x4)
323 #define SIENA_MC_BOOTROM_RECOVERY_VEC (0x800 - 2 * 0x4)
324 #define HUNT_MC_BOOTROM_RECOVERY_VEC (0x8000 - 2 * 0x4)
325 #define MEDFORD_MC_BOOTROM_RECOVERY_VEC (0x10000 - 2 * 0x4)
328 #define MEDFORD_MC_BOOTROM_REAL_NOFLASH_VEC (0x10000 - 4 * 0x4)
332 (1 << MC_CMD_READ32) | \
333 (1 << MC_CMD_WRITE32) | \
334 (1 << MC_CMD_COPYCODE) | \
335 (1 << MC_CMD_GET_VERSION), \
356 /* This may be ORed with an EVB_PORT_ID_xxx constant to pass a non-default
357 * stack ID (which must be in the range 1-255) along with an EVB port ID.
363 * may be followed by the (0-based) number of the first argument that
366 #define MC_CMD_ERR_ARG_OFST 4
374 #define MCDI_EVENT_CONT_WIDTH 1
386 #define MCDI_EVENT_DATA_LEN 4
401 #define MCDI_EVENT_LINKCHANGE_SPEED_WIDTH 4
406 /* enum: 1Gbs */
420 #define MCDI_EVENT_LINKCHANGE_FCNTL_WIDTH 4
449 #define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
467 #define MCDI_EVENT_TX_FLUSH_TO_DRIVER_WIDTH 1
485 /* enum: AOE failed to load - no valid image? */
493 /* enum: Generic AOE fault - likely to have been reported via other means too
523 /* enum: FPGA boot-flash contains an invalid image header */
579 #define MCDI_EVENT_RX_ERR_TYPE_WIDTH 4
585 #define MCDI_EVENT_RX_FLUSH_TO_DRIVER_WIDTH 1
595 /* enum: MUM failed to load - no valid image? */
629 #define MCDI_EVENT_LINKCHANGE_V2_SPEED_WIDTH 4
634 #define MCDI_EVENT_LINKCHANGE_V2_FLAGS_LINK_UP_WIDTH 1
659 #define MCDI_EVENT_EV_EVQ_PHASE_WIDTH 1
661 #define MCDI_EVENT_EV_CODE_WIDTH 4
759 * MC_CMD_DESC_PROXY_FUNC_CONFIG_COMMIT and SF-122927-TC for details.
764 * SF-122927-TC for details.
770 * first event's (CONT=1) DATA field carries negotiated virtio feature bits 0
773 * SF-122927-TC for details.
781 #define MCDI_EVENT_CMDDONE_DATA_LEN 4
785 #define MCDI_EVENT_LINKCHANGE_DATA_LEN 4
789 #define MCDI_EVENT_SENSOREVT_DATA_LEN 4
793 #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_LEN 4
797 #define MCDI_EVENT_TX_ERR_DATA_LEN 4
804 #define MCDI_EVENT_PTP_SECONDS_LEN 4
811 #define MCDI_EVENT_PTP_MAJOR_LEN 4
818 #define MCDI_EVENT_PTP_NANOSECONDS_LEN 4
825 #define MCDI_EVENT_PTP_MINOR_LEN 4
831 #define MCDI_EVENT_PTP_UUID_LEN 4
835 #define MCDI_EVENT_RX_ERR_DATA_LEN 4
839 #define MCDI_EVENT_PAR_ERR_DATA_LEN 4
843 #define MCDI_EVENT_ECC_CORR_ERR_DATA_LEN 4
847 #define MCDI_EVENT_ECC_FATAL_ERR_DATA_LEN 4
852 #define MCDI_EVENT_PTP_TIME_MAJOR_LEN 4
855 /* For CODE_PTP_TIME events, bits 19-26 of the minor value of the PTP clock */
867 #define MCDI_EVENT_PTP_TIME_NIC_CLOCK_VALID_WIDTH 1
872 #define MCDI_EVENT_PTP_TIME_HOST_NIC_IN_SYNC_WIDTH 1
873 /* For CODE_PTP_TIME events where report sync status is enabled, bits 21-26 of
884 #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_LEN 4
888 #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_LEN 4
892 * should resend it. A non-zero value means that the authorization has been
898 #define MCDI_EVENT_DBRET_DATA_LEN 4
902 #define MCDI_EVENT_LINKCHANGE_V2_DATA_LEN 4
906 #define MCDI_EVENT_MODULECHANGE_DATA_LEN 4
911 #define MCDI_EVENT_DYNAMIC_SENSORS_GENERATION_LEN 4
916 #define MCDI_EVENT_DYNAMIC_SENSORS_HANDLE_LEN 4
921 #define MCDI_EVENT_DYNAMIC_SENSORS_VALUE_LEN 4
928 #define MCDI_EVENT_DESC_PROXY_DATA_LEN 4
933 #define MCDI_EVENT_DESC_PROXY_GENERATION_LEN 4
936 /* Virtio features negotiated with the host driver. First event (CONT=1)
940 #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LEN 4
947 #define FCDI_EVENT_CONT_WIDTH 1
959 #define FCDI_EVENT_DATA_LEN 4
962 #define FCDI_EVENT_LINK_STATE_STATUS_WIDTH 1
970 #define FCDI_EVENT_EV_CODE_WIDTH 4
991 /* enum: Port id config to map MC-FC port idx */
1000 #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LEN 4
1008 #define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LEN 4
1012 #define FCDI_EVENT_LINK_STATE_DATA_LEN 4
1016 #define FCDI_EVENT_PTP_STATE_LEN 4
1025 #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LEN 4
1033 #define FCDI_EVENT_PORT_CONFIG_DATA_LEN 4
1037 #define FCDI_EVENT_BOOT_RESULT_LEN 4
1045 * such that bits 32-63 containing | event code, level, source etc remain the
1053 #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_NUM(len) (((len)-8)/8)
1056 #define FCDI_EXTENDED_EVENT_PPS_COUNT_LEN 4
1061 #define FCDI_EXTENDED_EVENT_PPS_SECONDS_LEN 4
1066 #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LEN 4
1074 #define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
1083 #define MUM_EVENT_CONT_WIDTH 1
1095 #define MUM_EVENT_DATA_LEN 4
1106 #define MUM_EVENT_PORT_PHY_READY_WIDTH 1
1108 #define MUM_EVENT_PORT_PHY_LINK_UP_LBN 1
1109 #define MUM_EVENT_PORT_PHY_LINK_UP_WIDTH 1
1112 #define MUM_EVENT_PORT_PHY_TX_LOL_WIDTH 1
1115 #define MUM_EVENT_PORT_PHY_RX_LOL_WIDTH 1
1117 #define MUM_EVENT_PORT_PHY_TX_LOS_LBN 4
1118 #define MUM_EVENT_PORT_PHY_TX_LOS_WIDTH 1
1121 #define MUM_EVENT_PORT_PHY_RX_LOS_WIDTH 1
1124 #define MUM_EVENT_PORT_PHY_TX_FAULT_WIDTH 1
1130 #define MUM_EVENT_EV_CODE_WIDTH 4
1142 #define MUM_EVENT_SENSOR_DATA_LEN 4
1146 #define MUM_EVENT_PORT_PHY_FLAGS_LEN 4
1150 #define MUM_EVENT_PORT_PHY_COPPER_LEN_LEN 4
1154 #define MUM_EVENT_PORT_PHY_CAPS_LEN 4
1158 #define MUM_EVENT_PORT_PHY_TECH_LEN 4
1170 #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH 4
1177 #define MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH 4
1182 * Read multiple 32byte words from MC memory. Note - this command really
1194 #define MC_CMD_READ32_IN_ADDR_LEN 4
1195 #define MC_CMD_READ32_IN_NUMWORDS_OFST 4
1196 #define MC_CMD_READ32_IN_NUMWORDS_LEN 4
1199 #define MC_CMD_READ32_OUT_LENMIN 4
1202 #define MC_CMD_READ32_OUT_LEN(num) (0+4*(num))
1203 #define MC_CMD_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)
1205 #define MC_CMD_READ32_OUT_BUFFER_LEN 4
1206 #define MC_CMD_READ32_OUT_BUFFER_MINNUM 1
1224 #define MC_CMD_WRITE32_IN_LEN(num) (4+4*(num))
1225 #define MC_CMD_WRITE32_IN_BUFFER_NUM(len) (((len)-4)/4)
1227 #define MC_CMD_WRITE32_IN_ADDR_LEN 4
1228 #define MC_CMD_WRITE32_IN_BUFFER_OFST 4
1229 #define MC_CMD_WRITE32_IN_BUFFER_LEN 4
1230 #define MC_CMD_WRITE32_IN_BUFFER_MINNUM 1
1240 * Copy MC code between two locations and jump. Note - this command really
1258 #define MC_CMD_COPYCODE_IN_SRC_ADDR_LEN 4
1272 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_WIDTH 1
1275 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_WIDTH 1
1278 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_WIDTH 1
1280 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN 4
1281 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_WIDTH 1
1284 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_WIDTH 1
1287 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_WIDTH 1
1289 #define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4
1290 #define MC_CMD_COPYCODE_IN_DEST_ADDR_LEN 4
1292 #define MC_CMD_COPYCODE_IN_NUMWORDS_LEN 4
1295 #define MC_CMD_COPYCODE_IN_JUMP_LEN 4
1305 * Select function for function-specific commands.
1313 #define MC_CMD_SET_FUNC_IN_LEN 4
1316 #define MC_CMD_SET_FUNC_IN_FUNC_LEN 4
1338 #define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_LEN 4
1341 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_OFST 4
1342 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_LEN 4
1343 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_OFST 4
1345 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_WIDTH 1
1346 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_OFST 4
1347 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_LBN 1
1348 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_WIDTH 1
1349 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_BACKUP_OFST 4
1351 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_BACKUP_WIDTH 1
1366 #define MC_CMD_GET_ASSERTS_IN_LEN 4
1369 #define MC_CMD_GET_ASSERTS_IN_CLEAR_LEN 4
1375 #define MC_CMD_GET_ASSERTS_OUT_GLOBAL_FLAGS_LEN 4
1378 /* enum: A system-level assertion has failed. */
1380 /* enum: A thread-level assertion has failed. */
1387 #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_OFST 4
1388 #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_LEN 4
1391 #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_LEN 4
1399 #define MC_CMD_GET_ASSERTS_OUT_THREAD_OFFS_LEN 4
1401 #define MC_CMD_GET_ASSERTS_OUT_RESERVED_LEN 4
1409 #define MC_CMD_GET_ASSERTS_OUT_V2_GLOBAL_FLAGS_LEN 4
1412 /* enum: A system-level assertion has failed. */
1414 /* enum: A thread-level assertion has failed. */
1421 #define MC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_OFST 4
1422 #define MC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_LEN 4
1425 #define MC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_LEN 4
1433 #define MC_CMD_GET_ASSERTS_OUT_V2_THREAD_OFFS_LEN 4
1435 #define MC_CMD_GET_ASSERTS_OUT_V2_RESERVED_LEN 4
1438 #define MC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_LEN 4
1447 #define MC_CMD_GET_ASSERTS_OUT_V3_GLOBAL_FLAGS_LEN 4
1450 /* enum: A system-level assertion has failed. */
1452 /* enum: A thread-level assertion has failed. */
1459 #define MC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_OFST 4
1460 #define MC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_LEN 4
1463 #define MC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_LEN 4
1471 #define MC_CMD_GET_ASSERTS_OUT_V3_THREAD_OFFS_LEN 4
1473 #define MC_CMD_GET_ASSERTS_OUT_V3_RESERVED_LEN 4
1476 #define MC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_LEN 4
1478 /* MC firmware unique build ID (as binary SHA-1 value) */
1493 #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
1494 /* MC firmware extra version info (as null-terminated US-ASCII string) */
1497 /* MC firmware build name (as null-terminated US-ASCII string) */
1516 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4
1522 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_OFST 4
1523 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_LEN 4
1542 #define MC_CMD_GET_VERSION_EXT_IN_LEN 4
1545 #define MC_CMD_GET_VERSION_EXT_IN_EXT_FLAGS_LEN 4
1548 #define MC_CMD_GET_VERSION_V0_OUT_LEN 4
1550 #define MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4
1563 /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
1566 #define MC_CMD_GET_VERSION_OUT_PCOL_OFST 4
1567 #define MC_CMD_GET_VERSION_OUT_PCOL_LEN 4
1579 /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
1582 #define MC_CMD_GET_VERSION_EXT_OUT_PCOL_OFST 4
1583 #define MC_CMD_GET_VERSION_EXT_OUT_PCOL_LEN 4
1603 /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
1606 #define MC_CMD_GET_VERSION_V2_OUT_PCOL_OFST 4
1607 #define MC_CMD_GET_VERSION_V2_OUT_PCOL_LEN 4
1620 #define MC_CMD_GET_VERSION_V2_OUT_FLAGS_LEN 4
1623 #define MC_CMD_GET_VERSION_V2_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
1625 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
1626 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
1629 #define MC_CMD_GET_VERSION_V2_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
1632 #define MC_CMD_GET_VERSION_V2_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
1634 #define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
1635 #define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
1636 /* MC firmware unique build ID (as binary SHA-1 value) */
1641 #define MC_CMD_GET_VERSION_V2_OUT_MCFW_SECURITY_LEVEL_LEN 4
1642 /* MC firmware build name (as null-terminated US-ASCII string) */
1645 /* The SUC firmware version as four numbers - a.b.c.d */
1647 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_LEN 4
1648 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_NUM 4
1649 /* SUC firmware build date (as 64-bit Unix timestamp) */
1655 * indicates family, memory sizes etc. See SF-116728-SW for further details.
1658 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_CHIP_ID_LEN 4
1659 /* The CMC firmware version as four numbers - a.b.c.d */
1661 #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_LEN 4
1662 #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_NUM 4
1663 /* CMC firmware build date (as 64-bit Unix timestamp) */
1670 * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
1671 * => B, ...) FPGA_VERSION[2]: Sub-revision number
1674 #define MC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_LEN 4
1676 /* Extra FPGA revision information (as null-terminated US-ASCII string) */
1679 /* Board name / adapter model (as null-terminated US-ASCII string) */
1684 #define MC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_LEN 4
1685 /* Board serial number (as null-terminated US-ASCII string) */
1700 #define MC_CMD_PTP_IN_LEN 1
1703 #define MC_CMD_PTP_IN_OP_LEN 1
1761 /* enum: Get the clock attributes. NOTE- extended version of
1789 #define MC_CMD_PTP_IN_CMD_LEN 4
1790 #define MC_CMD_PTP_IN_PERIPH_ID_OFST 4
1791 #define MC_CMD_PTP_IN_PERIPH_ID_LEN 4
1794 #define MC_CMD_PTP_IN_ENABLE_QUEUE_LEN 4
1797 #define MC_CMD_PTP_IN_ENABLE_MODE_LEN 4
1798 /* enum: PTP, version 1 */
1800 /* enum: PTP, version 1, with VLAN headers - deprecated */
1804 /* enum: PTP, version 2, with VLAN headers - deprecated */
1814 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1815 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1816 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1822 #define MC_CMD_PTP_IN_TRANSMIT_LEN(num) (12+1*(num))
1823 #define MC_CMD_PTP_IN_TRANSMIT_PACKET_NUM(len) (((len)-12)/1)
1825 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1826 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1827 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1830 #define MC_CMD_PTP_IN_TRANSMIT_LENGTH_LEN 4
1833 #define MC_CMD_PTP_IN_TRANSMIT_PACKET_LEN 1
1834 #define MC_CMD_PTP_IN_TRANSMIT_PACKET_MINNUM 1
1841 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1842 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1843 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1848 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1849 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1850 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1855 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1856 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1857 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1862 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1863 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1864 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1879 #define MC_CMD_PTP_IN_ADJUST_SECONDS_LEN 4
1882 #define MC_CMD_PTP_IN_ADJUST_MAJOR_LEN 4
1885 #define MC_CMD_PTP_IN_ADJUST_NANOSECONDS_LEN 4
1888 #define MC_CMD_PTP_IN_ADJUST_MINOR_LEN 4
1893 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1894 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1895 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1910 #define MC_CMD_PTP_IN_ADJUST_V2_SECONDS_LEN 4
1913 #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_LEN 4
1916 #define MC_CMD_PTP_IN_ADJUST_V2_NANOSECONDS_LEN 4
1919 #define MC_CMD_PTP_IN_ADJUST_V2_MINOR_LEN 4
1922 #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_HI_LEN 4
1927 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1928 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1929 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1932 #define MC_CMD_PTP_IN_SYNCHRONIZE_NUMTIMESETS_LEN 4
1944 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1945 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1946 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1951 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1952 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1953 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1956 #define MC_CMD_PTP_IN_MANFTEST_PACKET_TEST_ENABLE_LEN 4
1961 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1962 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1963 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1968 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1969 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1970 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1973 #define MC_CMD_PTP_IN_DEBUG_DEBUG_PARAM_LEN 4
1978 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1979 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1980 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1982 #define MC_CMD_PTP_IN_FPGAREAD_ADDR_LEN 4
1984 #define MC_CMD_PTP_IN_FPGAREAD_NUMBYTES_LEN 4
1990 #define MC_CMD_PTP_IN_FPGAWRITE_LEN(num) (12+1*(num))
1991 #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_NUM(len) (((len)-12)/1)
1993 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1994 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1995 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1997 #define MC_CMD_PTP_IN_FPGAWRITE_ADDR_LEN 4
1999 #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_LEN 1
2000 #define MC_CMD_PTP_IN_FPGAWRITE_BUFFER_MINNUM 1
2007 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2008 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2009 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2012 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_SECONDS_LEN 4
2015 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MAJOR_LEN 4
2018 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_NANOSECONDS_LEN 4
2021 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MINOR_LEN 4
2026 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2027 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2028 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2031 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_SECONDS_LEN 4
2034 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_LEN 4
2037 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_NANOSECONDS_LEN 4
2040 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MINOR_LEN 4
2043 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_HI_LEN 4
2048 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2049 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2050 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2062 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2063 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2064 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2067 #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_NUM_VLAN_TAGS_LEN 4
2070 #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_LEN 4
2076 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2077 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2078 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2079 /* 1 to enable UUID filtering, 0 to disable */
2081 #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_ENABLE_LEN 4
2091 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2092 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2093 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2094 /* 1 to enable Domain filtering, 0 to disable */
2096 #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_ENABLE_LEN 4
2099 #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_DOMAIN_LEN 4
2104 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2105 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2106 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2109 #define MC_CMD_PTP_IN_SET_CLK_SRC_CLK_LEN 4
2118 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2119 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2120 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2125 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2127 #define MC_CMD_PTP_IN_PPS_ENABLE_OP_OFST 4
2128 #define MC_CMD_PTP_IN_PPS_ENABLE_OP_LEN 4
2135 #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_LEN 4
2140 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2141 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2142 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2147 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2148 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2149 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2154 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2155 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2156 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2161 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2162 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2163 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2166 #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_LEN 4
2172 #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_REPORT_SYNC_STATUS_WIDTH 1
2177 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2178 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2179 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2182 #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_CONTROL_LEN 4
2189 #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_LEN 4
2194 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2195 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2196 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2197 /* 1 to enable PPS test mode, 0 to disable and return result. */
2199 #define MC_CMD_PTP_IN_MANFTEST_PPS_TEST_ENABLE_LEN 4
2204 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2205 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2206 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2207 /* NIC - Host System Clock Synchronization status */
2209 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_STATUS_LEN 4
2218 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_TIMEOUT_LEN 4
2220 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED0_LEN 4
2222 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_LEN 4
2231 #define MC_CMD_PTP_OUT_TRANSMIT_SECONDS_LEN 4
2234 #define MC_CMD_PTP_OUT_TRANSMIT_MAJOR_LEN 4
2236 #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_OFST 4
2237 #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_LEN 4
2239 #define MC_CMD_PTP_OUT_TRANSMIT_MINOR_OFST 4
2240 #define MC_CMD_PTP_OUT_TRANSMIT_MINOR_LEN 4
2252 #define MC_CMD_PTP_OUT_READ_NIC_TIME_SECONDS_LEN 4
2255 #define MC_CMD_PTP_OUT_READ_NIC_TIME_MAJOR_LEN 4
2257 #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_OFST 4
2258 #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_LEN 4
2260 #define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_OFST 4
2261 #define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_LEN 4
2267 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_SECONDS_LEN 4
2270 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_LEN 4
2272 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_NANOSECONDS_OFST 4
2273 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_NANOSECONDS_LEN 4
2275 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MINOR_OFST 4
2276 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MINOR_LEN 4
2279 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_HI_LEN 4
2285 #define MC_CMD_PTP_OUT_STATUS_CLOCK_FREQ_LEN 4
2287 #define MC_CMD_PTP_OUT_STATUS_STATS_TX_OFST 4
2288 #define MC_CMD_PTP_OUT_STATUS_STATS_TX_LEN 4
2291 #define MC_CMD_PTP_OUT_STATUS_STATS_RX_LEN 4
2294 #define MC_CMD_PTP_OUT_STATUS_STATS_TS_LEN 4
2297 #define MC_CMD_PTP_OUT_STATUS_STATS_FM_LEN 4
2300 #define MC_CMD_PTP_OUT_STATUS_STATS_NFM_LEN 4
2303 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFLOW_LEN 4
2306 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_BAD_LEN 4
2309 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MIN_LEN 4
2312 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MAX_LEN 4
2315 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_LAST_LEN 4
2318 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MEAN_LEN 4
2321 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MIN_LEN 4
2324 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MAX_LEN 4
2327 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_LAST_LEN 4
2330 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MEAN_LEN 4
2337 #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_NUM(len) (((len)-0)/20)
2341 #define MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MINNUM 1
2346 #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_LEN 4
2348 #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_OFST 4
2349 #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_LEN 4
2351 #define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_OFST 4
2352 #define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_LEN 4
2355 #define MC_CMD_PTP_OUT_SYNCHRONIZE_NANOSECONDS_LEN 4
2358 #define MC_CMD_PTP_OUT_SYNCHRONIZE_MINOR_LEN 4
2361 #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTEND_LEN 4
2364 #define MC_CMD_PTP_OUT_SYNCHRONIZE_WAITNS_LEN 4
2370 #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_RESULT_LEN 4
2393 /* enum: PPS time event period not sufficiently close to 1s. */
2402 #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_OFST 4
2403 #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_LEN 4
2409 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_RESULT_LEN 4
2411 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_OFST 4
2412 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_LEN 4
2415 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FILTERCOUNT_LEN 4
2418 #define MC_CMD_PTP_OUT_FPGAREAD_LENMIN 1
2421 #define MC_CMD_PTP_OUT_FPGAREAD_LEN(num) (0+1*(num))
2422 #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_NUM(len) (((len)-0)/1)
2424 #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_LEN 1
2425 #define MC_CMD_PTP_OUT_FPGAREAD_BUFFER_MINNUM 1
2430 #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_LEN 4
2434 * be assumed. Note this enum is deprecated. Do not add to it- use the
2438 #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_FORMAT_LEN 4
2443 /* enum: Major register has units of seconds, minor 2^-27s per tick */
2454 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_TIME_FORMAT_LEN 4
2459 /* enum: Major register has units of seconds, minor 2^-27s per tick */
2471 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_OFST 4
2472 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_LEN 4
2475 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_CAPABILITIES_LEN 4
2478 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_REPORT_SYNC_STATUS_WIDTH 1
2480 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RX_TSTAMP_OOB_LBN 1
2481 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RX_TSTAMP_OOB_WIDTH 1
2484 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_64BIT_SECONDS_WIDTH 1
2487 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_FP44_FREQ_ADJ_WIDTH 1
2489 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED0_LEN 4
2491 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED1_LEN 4
2493 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_LEN 4
2499 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_TRANSMIT_LEN 4
2501 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_OFST 4
2502 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_LEN 4
2505 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_OUT_LEN 4
2508 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_IN_LEN 4
2514 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_TX_LEN 4
2516 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_RX_OFST 4
2517 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_RX_LEN 4
2520 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_OUT_LEN 4
2523 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_IN_LEN 4
2524 /* Uncorrected error on non-PTP transmit timestamps in NIC clock format */
2526 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_TX_LEN 4
2527 /* Uncorrected error on non-PTP receive timestamps in NIC clock format */
2529 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_RX_LEN 4
2532 #define MC_CMD_PTP_OUT_MANFTEST_PPS_LEN 4
2535 #define MC_CMD_PTP_OUT_MANFTEST_PPS_TEST_RESULT_LEN 4
2556 #define MC_CMD_CSR_READ32_IN_ADDR_LEN 4
2557 #define MC_CMD_CSR_READ32_IN_STEP_OFST 4
2558 #define MC_CMD_CSR_READ32_IN_STEP_LEN 4
2560 #define MC_CMD_CSR_READ32_IN_NUMWORDS_LEN 4
2563 #define MC_CMD_CSR_READ32_OUT_LENMIN 4
2566 #define MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num))
2567 #define MC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)
2570 #define MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4
2571 #define MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM 1
2589 #define MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num))
2590 #define MC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) (((len)-8)/4)
2593 #define MC_CMD_CSR_WRITE32_IN_ADDR_LEN 4
2594 #define MC_CMD_CSR_WRITE32_IN_STEP_OFST 4
2595 #define MC_CMD_CSR_WRITE32_IN_STEP_LEN 4
2597 #define MC_CMD_CSR_WRITE32_IN_BUFFER_LEN 4
2598 #define MC_CMD_CSR_WRITE32_IN_BUFFER_MINNUM 1
2603 #define MC_CMD_CSR_WRITE32_OUT_LEN 4
2605 #define MC_CMD_CSR_WRITE32_OUT_STATUS_LEN 4
2620 /* HP OCSD sub-command. When address is not NULL, request activation of OCSD at
2622 * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current
2627 #define MC_CMD_HP_IN_SUBCMD_LEN 4
2628 /* enum: OCSD (Option Card Sensor Data) sub-command. */
2630 /* enum: Last known valid HP sub-command. */
2632 /* The address to the array of sensor fields. (Or NULL to use a sub-command.)
2634 #define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
2636 #define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
2638 /* The requested update interval, in seconds. (Or the sub-command if ADDR is
2642 #define MC_CMD_HP_IN_OCSD_INTERVAL_LEN 4
2645 #define MC_CMD_HP_OUT_LEN 4
2647 #define MC_CMD_HP_OUT_OCSD_STATUS_LEN 4
2673 #define MC_CMD_STACKINFO_OUT_THREAD_INFO_NUM(len) (((len)-0)/12)
2677 #define MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM 1
2697 #define MC_CMD_MDIO_READ_IN_BUS_LEN 4
2703 #define MC_CMD_MDIO_READ_IN_PRTAD_OFST 4
2704 #define MC_CMD_MDIO_READ_IN_PRTAD_LEN 4
2707 #define MC_CMD_MDIO_READ_IN_DEVAD_LEN 4
2714 #define MC_CMD_MDIO_READ_IN_ADDR_LEN 4
2720 #define MC_CMD_MDIO_READ_OUT_VALUE_LEN 4
2724 #define MC_CMD_MDIO_READ_OUT_STATUS_OFST 4
2725 #define MC_CMD_MDIO_READ_OUT_STATUS_LEN 4
2745 #define MC_CMD_MDIO_WRITE_IN_BUS_LEN 4
2751 #define MC_CMD_MDIO_WRITE_IN_PRTAD_OFST 4
2752 #define MC_CMD_MDIO_WRITE_IN_PRTAD_LEN 4
2755 #define MC_CMD_MDIO_WRITE_IN_DEVAD_LEN 4
2762 #define MC_CMD_MDIO_WRITE_IN_ADDR_LEN 4
2765 #define MC_CMD_MDIO_WRITE_IN_VALUE_LEN 4
2768 #define MC_CMD_MDIO_WRITE_OUT_LEN 4
2773 #define MC_CMD_MDIO_WRITE_OUT_STATUS_LEN 4
2792 #define MC_CMD_DBI_WRITE_IN_DBIWROP_NUM(len) (((len)-0)/12)
2798 #define MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM 1
2808 #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LEN 4
2811 #define MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST 4
2812 #define MC_CMD_DBIWROP_TYPEDEF_PARMS_LEN 4
2813 #define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_OFST 4
2816 #define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_OFST 4
2818 #define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_WIDTH 1
2819 #define MC_CMD_DBIWROP_TYPEDEF_CS2_OFST 4
2821 #define MC_CMD_DBIWROP_TYPEDEF_CS2_WIDTH 1
2825 #define MC_CMD_DBIWROP_TYPEDEF_VALUE_LEN 4
2832 * Read a 32-bit register from the indirect port register map. The port to
2838 #define MC_CMD_PORT_READ32_IN_LEN 4
2841 #define MC_CMD_PORT_READ32_IN_ADDR_LEN 4
2847 #define MC_CMD_PORT_READ32_OUT_VALUE_LEN 4
2849 #define MC_CMD_PORT_READ32_OUT_STATUS_OFST 4
2850 #define MC_CMD_PORT_READ32_OUT_STATUS_LEN 4
2855 * Write a 32-bit register to the indirect port register map. The port to
2864 #define MC_CMD_PORT_WRITE32_IN_ADDR_LEN 4
2866 #define MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4
2867 #define MC_CMD_PORT_WRITE32_IN_VALUE_LEN 4
2870 #define MC_CMD_PORT_WRITE32_OUT_LEN 4
2873 #define MC_CMD_PORT_WRITE32_OUT_STATUS_LEN 4
2878 * Read a 128-bit register from the indirect port register map. The port to
2884 #define MC_CMD_PORT_READ128_IN_LEN 4
2887 #define MC_CMD_PORT_READ128_IN_ADDR_LEN 4
2896 #define MC_CMD_PORT_READ128_OUT_STATUS_LEN 4
2901 * Write a 128-bit register to the indirect port register map. The port to
2910 #define MC_CMD_PORT_WRITE128_IN_ADDR_LEN 4
2912 #define MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4
2916 #define MC_CMD_PORT_WRITE128_OUT_LEN 4
2919 #define MC_CMD_PORT_WRITE128_OUT_STATUS_LEN 4
2922 #define MC_CMD_CAPABILITIES_LEN 4
2925 #define MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH 1
2927 #define MC_CMD_CAPABILITIES_TURBO_LBN 1
2928 #define MC_CMD_CAPABILITIES_TURBO_WIDTH 1
2931 #define MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH 1
2934 #define MC_CMD_CAPABILITIES_PTP_WIDTH 1
2936 #define MC_CMD_CAPABILITIES_AOE_LBN 4
2937 #define MC_CMD_CAPABILITIES_AOE_WIDTH 1
2940 #define MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH 1
2943 #define MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH 1
2965 #define MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_NUM(len) (((len)-72)/2)
2967 #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_LEN 4
2968 #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_OFST 4
2974 #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT0_LEN 4
2979 #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT1_LEN 4
2994 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT0_LEN 4
2999 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT1_LEN 4
3004 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT0_LEN 4
3009 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT1_LEN 4
3010 /* Siena only. This field contains a 16-bit value for each of the types of
3025 * Read DBI register(s) -- extended functionality
3037 #define MC_CMD_DBI_READX_IN_DBIRDOP_NUM(len) (((len)-0)/8)
3042 #define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
3043 #define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
3048 #define MC_CMD_DBI_READX_OUT_LENMIN 4
3051 #define MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num))
3052 #define MC_CMD_DBI_READX_OUT_VALUE_NUM(len) (((len)-0)/4)
3055 #define MC_CMD_DBI_READX_OUT_VALUE_LEN 4
3056 #define MC_CMD_DBI_READX_OUT_VALUE_MINNUM 1
3063 #define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LEN 4
3066 #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST 4
3067 #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LEN 4
3068 #define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_OFST 4
3071 #define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_OFST 4
3073 #define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_WIDTH 1
3074 #define MC_CMD_DBIRDOP_TYPEDEF_CS2_OFST 4
3076 #define MC_CMD_DBIRDOP_TYPEDEF_CS2_WIDTH 1
3083 * Set the 16byte seed for the MC pseudo-random generator.
3113 #define MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num))
3114 #define MC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) (((len)-0)/4)
3115 /* variable number of LTSSM values, as bytes. The history is read-to-clear. */
3117 #define MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4
3139 /* new state to set if UPDATE=1 */
3141 #define MC_CMD_DRV_ATTACH_IN_NEW_STATE_LEN 4
3144 #define MC_CMD_DRV_ATTACH_WIDTH 1
3147 #define MC_CMD_DRV_ATTACH_IN_ATTACH_WIDTH 1
3149 #define MC_CMD_DRV_PREBOOT_LBN 1
3150 #define MC_CMD_DRV_PREBOOT_WIDTH 1
3152 #define MC_CMD_DRV_ATTACH_IN_PREBOOT_LBN 1
3153 #define MC_CMD_DRV_ATTACH_IN_PREBOOT_WIDTH 1
3156 #define MC_CMD_DRV_ATTACH_IN_SUBVARIANT_AWARE_WIDTH 1
3159 #define MC_CMD_DRV_ATTACH_IN_WANT_VI_SPREADING_WIDTH 1
3161 #define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_LBN 4
3162 #define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_WIDTH 1
3165 #define MC_CMD_DRV_ATTACH_IN_WANT_RX_VI_SPREADING_INHIBIT_WIDTH 1
3168 #define MC_CMD_DRV_ATTACH_IN_WANT_TX_ONLY_SPREADING_WIDTH 1
3169 /* 1 to set new state, or 0 to just report the existing state */
3170 #define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4
3171 #define MC_CMD_DRV_ATTACH_IN_UPDATE_LEN 4
3174 #define MC_CMD_DRV_ATTACH_IN_FIRMWARE_ID_LEN 4
3193 /* enum: Prefer to use "l3xudp" custom datapath firmware (see SF-119495-PD and
3200 * (i.e. non-production) builds.
3203 /* enum: Only this option is allowed for non-admin functions */
3210 /* new state to set if UPDATE=1 */
3212 #define MC_CMD_DRV_ATTACH_IN_V2_NEW_STATE_LEN 4
3215 /* MC_CMD_DRV_ATTACH_WIDTH 1 */
3218 #define MC_CMD_DRV_ATTACH_IN_V2_ATTACH_WIDTH 1
3220 /* MC_CMD_DRV_PREBOOT_LBN 1 */
3221 /* MC_CMD_DRV_PREBOOT_WIDTH 1 */
3223 #define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_LBN 1
3224 #define MC_CMD_DRV_ATTACH_IN_V2_PREBOOT_WIDTH 1
3227 #define MC_CMD_DRV_ATTACH_IN_V2_SUBVARIANT_AWARE_WIDTH 1
3230 #define MC_CMD_DRV_ATTACH_IN_V2_WANT_VI_SPREADING_WIDTH 1
3232 #define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_LBN 4
3233 #define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_WIDTH 1
3236 #define MC_CMD_DRV_ATTACH_IN_V2_WANT_RX_VI_SPREADING_INHIBIT_WIDTH 1
3239 #define MC_CMD_DRV_ATTACH_IN_V2_WANT_TX_ONLY_SPREADING_WIDTH 1
3240 /* 1 to set new state, or 0 to just report the existing state */
3241 #define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_OFST 4
3242 #define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_LEN 4
3245 #define MC_CMD_DRV_ATTACH_IN_V2_FIRMWARE_ID_LEN 4
3264 /* enum: Prefer to use "l3xudp" custom datapath firmware (see SF-119495-PD and
3271 * (i.e. non-production) builds.
3274 /* enum: Only this option is allowed for non-admin functions */
3276 /* Version of the driver to be reported by management protocols (e.g. NC-SI)
3277 * handled by the NIC. This is a zero-terminated ASCII string.
3283 #define MC_CMD_DRV_ATTACH_OUT_LEN 4
3286 #define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_LEN 4
3292 #define MC_CMD_DRV_ATTACH_EXT_OUT_OLD_STATE_LEN 4
3294 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4
3295 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4
3296 /* enum: Labels the lowest-numbered function visible to the OS */
3315 /* enum: If set, indicates that TX only spreading is enabled. Even-numbered
3316 * TXQs will use one engine, and odd-numbered TXQs will use the other. This
3317 * also has the effect that only even-numbered RXQs will receive traffic.
3329 #define MC_CMD_SHMUART_IN_LEN 4
3332 #define MC_CMD_SHMUART_IN_FLAG_LEN 4
3340 * Generic per-port reset. There is no equivalent for per-board reset. Locks
3341 * required: None; Return code: 0, ETIME. NOTE: This command is deprecated -
3358 * Generic per-resource reset. There is no equivalent for per-board reset.
3366 #define MC_CMD_ENTITY_RESET_IN_LEN 4
3371 #define MC_CMD_ENTITY_RESET_IN_FLAG_LEN 4
3374 #define MC_CMD_ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET_WIDTH 1
3390 #define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_LEN 4
3392 #define MC_CMD_PCIE_CREDITS_IN_WIPE_OFST 4
3393 #define MC_CMD_PCIE_CREDITS_IN_WIPE_LEN 4
3401 #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_OFST 4
3424 #define MC_CMD_RXD_MONITOR_IN_QID_LEN 4
3425 #define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_OFST 4
3426 #define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_LEN 4
3428 #define MC_CMD_RXD_MONITOR_IN_WIPE_LEN 4
3433 #define MC_CMD_RXD_MONITOR_OUT_QID_LEN 4
3434 #define MC_CMD_RXD_MONITOR_OUT_RING_FILL_OFST 4
3435 #define MC_CMD_RXD_MONITOR_OUT_RING_FILL_LEN 4
3437 #define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_LEN 4
3439 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_LEN 4
3441 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_LEN 4
3443 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_LEN 4
3445 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_LEN 4
3447 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_LEN 4
3449 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_LEN 4
3451 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_LEN 4
3453 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_LEN 4
3455 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_LEN 4
3457 #define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_LEN 4
3459 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_LEN 4
3461 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_LEN 4
3463 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_LEN 4
3465 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_LEN 4
3467 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_LEN 4
3469 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_LEN 4
3471 #define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_LEN 4
3487 #define MC_CMD_PUTS_IN_LEN(num) (12+1*(num))
3488 #define MC_CMD_PUTS_IN_STRING_NUM(len) (((len)-12)/1)
3490 #define MC_CMD_PUTS_IN_DEST_LEN 4
3493 #define MC_CMD_PUTS_IN_UART_WIDTH 1
3495 #define MC_CMD_PUTS_IN_PORT_LBN 1
3496 #define MC_CMD_PUTS_IN_PORT_WIDTH 1
3497 #define MC_CMD_PUTS_IN_DHOST_OFST 4
3500 #define MC_CMD_PUTS_IN_STRING_LEN 1
3501 #define MC_CMD_PUTS_IN_STRING_MINNUM 1
3526 #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_LEN 4
3529 #define MC_CMD_GET_PHY_CFG_OUT_PRESENT_WIDTH 1
3531 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN 1
3532 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_WIDTH 1
3535 #define MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_WIDTH 1
3538 #define MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_WIDTH 1
3540 #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN 4
3541 #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_WIDTH 1
3544 #define MC_CMD_GET_PHY_CFG_OUT_TXDIS_WIDTH 1
3547 #define MC_CMD_GET_PHY_CFG_OUT_BIST_WIDTH 1
3549 #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4
3550 #define MC_CMD_GET_PHY_CFG_OUT_TYPE_LEN 4
3553 #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_LEN 4
3555 #define MC_CMD_PHY_CAP_10HDX_LBN 1
3556 #define MC_CMD_PHY_CAP_10HDX_WIDTH 1
3559 #define MC_CMD_PHY_CAP_10FDX_WIDTH 1
3562 #define MC_CMD_PHY_CAP_100HDX_WIDTH 1
3564 #define MC_CMD_PHY_CAP_100FDX_LBN 4
3565 #define MC_CMD_PHY_CAP_100FDX_WIDTH 1
3568 #define MC_CMD_PHY_CAP_1000HDX_WIDTH 1
3571 #define MC_CMD_PHY_CAP_1000FDX_WIDTH 1
3574 #define MC_CMD_PHY_CAP_10000FDX_WIDTH 1
3577 #define MC_CMD_PHY_CAP_PAUSE_WIDTH 1
3580 #define MC_CMD_PHY_CAP_ASYM_WIDTH 1
3583 #define MC_CMD_PHY_CAP_AN_WIDTH 1
3586 #define MC_CMD_PHY_CAP_40000FDX_WIDTH 1
3589 #define MC_CMD_PHY_CAP_DDM_WIDTH 1
3592 #define MC_CMD_PHY_CAP_100000FDX_WIDTH 1
3595 #define MC_CMD_PHY_CAP_25000FDX_WIDTH 1
3598 #define MC_CMD_PHY_CAP_50000FDX_WIDTH 1
3601 #define MC_CMD_PHY_CAP_BASER_FEC_WIDTH 1
3604 #define MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_WIDTH 1
3607 #define MC_CMD_PHY_CAP_RS_FEC_WIDTH 1
3610 #define MC_CMD_PHY_CAP_RS_FEC_REQUESTED_WIDTH 1
3613 #define MC_CMD_PHY_CAP_25G_BASER_FEC_WIDTH 1
3616 #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH 1
3619 #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4
3622 #define MC_CMD_GET_PHY_CFG_OUT_PRT_LEN 4
3625 #define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_LEN 4
3631 #define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_LEN 4
3647 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4
3676 #define MC_CMD_START_BIST_IN_LEN 4
3679 #define MC_CMD_START_BIST_IN_TYPE_LEN 4
3722 #define MC_CMD_POLL_BIST_OUT_RESULT_LEN 4
3729 /* enum: Timed-out. */
3731 #define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST 4
3732 #define MC_CMD_POLL_BIST_OUT_PRIVATE_LEN 4
3738 /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */
3741 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_OFST 4
3742 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_LEN 4
3744 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B_LEN 4
3746 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C_LEN 4
3748 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D_LEN 4
3751 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_A_LEN 4
3756 /* enum: Intra-pair short. */
3758 /* enum: Inter-pair short. */
3764 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_B_LEN 4
3769 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_C_LEN 4
3774 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_D_LEN 4
3782 /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */
3785 #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_OFST 4
3786 #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_LEN 4
3810 /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */
3813 #define MC_CMD_POLL_BIST_OUT_MEM_TEST_OFST 4
3814 #define MC_CMD_POLL_BIST_OUT_MEM_TEST_LEN 4
3817 /* enum: RAM test - walk ones. */
3819 /* enum: RAM test - walk zeros. */
3821 /* enum: RAM test - walking inversions zeros/ones. */
3823 /* enum: RAM test - walking inversions checkerboard. */
3825 /* enum: Register test - set / clear individual bits. */
3831 #define MC_CMD_POLL_BIST_OUT_MEM_ADDR_LEN 4
3834 #define MC_CMD_POLL_BIST_OUT_MEM_BUS_LEN 4
3855 #define MC_CMD_POLL_BIST_OUT_MEM_EXPECT_LEN 4
3858 #define MC_CMD_POLL_BIST_OUT_MEM_ACTUAL_LEN 4
3861 #define MC_CMD_POLL_BIST_OUT_MEM_ECC_LEN 4
3864 #define MC_CMD_POLL_BIST_OUT_MEM_ECC_PARITY_LEN 4
3867 #define MC_CMD_POLL_BIST_OUT_MEM_ECC_FATAL_LEN 4
3882 #define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
3885 #define MC_CMD_FLUSH_RX_QUEUES_IN_LEN(num) (0+4*(num))
3886 #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_NUM(len) (((len)-0)/4)
3888 #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_LEN 4
3889 #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MINNUM 1
3915 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
3950 /* enum: PMA-PMD. */
3952 /* enum: Cross-Port. */
3954 /* enum: XGMII-Wireside. */
3970 /* enum: PMA lanes MAC-Serdes. */
3976 /* enum: PMA lanes MAC-Serdes Wireside. */
4031 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
4066 /* enum: PMA-PMD. */
4068 /* enum: Cross-Port. */
4070 /* enum: XGMII-Wireside. */
4086 /* enum: PMA lanes MAC-Serdes. */
4092 /* enum: PMA lanes MAC-Serdes Wireside. */
4160 /* AN_TYPE structuredef: Auto-negotiation types defined in IEEE802.3 */
4161 #define AN_TYPE_LEN 4
4163 #define AN_TYPE_TYPE_LEN 4
4166 /* enum: Clause 28 - BASE-T */
4168 /* enum: Clause 37 - BASE-X */
4170 /* enum: Clause 73 - BASE-R startup protocol for backplane and copper cable
4171 * assemblies. Includes Clause 72/Clause 92 link-training.
4179 #define FEC_TYPE_LEN 4
4181 #define FEC_TYPE_TYPE_LEN 4
4184 /* enum: Clause 74 BASE-R FEC (a.k.a Firecode) */
4186 /* enum: Clause 91/Clause 108 Reed-Solomon FEC */
4207 /* Near-side advertised capabilities. Refer to
4211 #define MC_CMD_GET_LINK_OUT_CAP_LEN 4
4212 /* Link-partner advertised capabilities. Refer to
4215 #define MC_CMD_GET_LINK_OUT_LP_CAP_OFST 4
4216 #define MC_CMD_GET_LINK_OUT_LP_CAP_LEN 4
4218 * reads non-zero.
4221 #define MC_CMD_GET_LINK_OUT_LINK_SPEED_LEN 4
4224 #define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_LEN 4
4228 #define MC_CMD_GET_LINK_OUT_FLAGS_LEN 4
4231 #define MC_CMD_GET_LINK_OUT_LINK_UP_WIDTH 1
4233 #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN 1
4234 #define MC_CMD_GET_LINK_OUT_FULL_DUPLEX_WIDTH 1
4237 #define MC_CMD_GET_LINK_OUT_BPX_LINK_WIDTH 1
4240 #define MC_CMD_GET_LINK_OUT_PHY_LINK_WIDTH 1
4243 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_RX_WIDTH 1
4246 #define MC_CMD_GET_LINK_OUT_LINK_FAULT_TX_WIDTH 1
4249 #define MC_CMD_GET_LINK_OUT_MODULE_UP_VALID_WIDTH 1
4252 #define MC_CMD_GET_LINK_OUT_MODULE_UP_WIDTH 1
4255 #define MC_CMD_GET_LINK_OUT_FCNTL_LEN 4
4259 #define MC_CMD_GET_LINK_OUT_MAC_FAULT_LEN 4
4262 #define MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH 1
4264 #define MC_CMD_MAC_FAULT_XGMII_REMOTE_LBN 1
4265 #define MC_CMD_MAC_FAULT_XGMII_REMOTE_WIDTH 1
4268 #define MC_CMD_MAC_FAULT_SGMII_REMOTE_WIDTH 1
4271 #define MC_CMD_MAC_FAULT_PENDING_RECONFIG_WIDTH 1
4275 /* Near-side advertised capabilities. Refer to
4279 #define MC_CMD_GET_LINK_OUT_V2_CAP_LEN 4
4280 /* Link-partner advertised capabilities. Refer to
4283 #define MC_CMD_GET_LINK_OUT_V2_LP_CAP_OFST 4
4284 #define MC_CMD_GET_LINK_OUT_V2_LP_CAP_LEN 4
4286 * reads non-zero.
4289 #define MC_CMD_GET_LINK_OUT_V2_LINK_SPEED_LEN 4
4292 #define MC_CMD_GET_LINK_OUT_V2_LOOPBACK_MODE_LEN 4
4296 #define MC_CMD_GET_LINK_OUT_V2_FLAGS_LEN 4
4299 #define MC_CMD_GET_LINK_OUT_V2_LINK_UP_WIDTH 1
4301 #define MC_CMD_GET_LINK_OUT_V2_FULL_DUPLEX_LBN 1
4302 #define MC_CMD_GET_LINK_OUT_V2_FULL_DUPLEX_WIDTH 1
4305 #define MC_CMD_GET_LINK_OUT_V2_BPX_LINK_WIDTH 1
4308 #define MC_CMD_GET_LINK_OUT_V2_PHY_LINK_WIDTH 1
4311 #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_RX_WIDTH 1
4314 #define MC_CMD_GET_LINK_OUT_V2_LINK_FAULT_TX_WIDTH 1
4317 #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_VALID_WIDTH 1
4320 #define MC_CMD_GET_LINK_OUT_V2_MODULE_UP_WIDTH 1
4323 #define MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN 4
4327 #define MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_LEN 4
4330 /* MC_CMD_MAC_FAULT_XGMII_LOCAL_WIDTH 1 */
4332 /* MC_CMD_MAC_FAULT_XGMII_REMOTE_LBN 1 */
4333 /* MC_CMD_MAC_FAULT_XGMII_REMOTE_WIDTH 1 */
4336 /* MC_CMD_MAC_FAULT_SGMII_REMOTE_WIDTH 1 */
4339 /* MC_CMD_MAC_FAULT_PENDING_RECONFIG_WIDTH 1 */
4341 * e.g. plugged-in module). In general, subset of
4344 * to SUPPORTED_CAP for non-pluggable PMDs. Refer to
4348 #define MC_CMD_GET_LINK_OUT_V2_LD_CAP_LEN 4
4349 /* Auto-negotiation type used on the link */
4351 #define MC_CMD_GET_LINK_OUT_V2_AN_TYPE_LEN 4
4356 #define MC_CMD_GET_LINK_OUT_V2_FEC_TYPE_LEN 4
4360 #define MC_CMD_GET_LINK_OUT_V2_EXT_FLAGS_LEN 4
4363 #define MC_CMD_GET_LINK_OUT_V2_PMD_MDI_CONNECTED_WIDTH 1
4365 #define MC_CMD_GET_LINK_OUT_V2_PMD_READY_LBN 1
4366 #define MC_CMD_GET_LINK_OUT_V2_PMD_READY_WIDTH 1
4369 #define MC_CMD_GET_LINK_OUT_V2_PMD_LINK_UP_WIDTH 1
4372 #define MC_CMD_GET_LINK_OUT_V2_PMA_LINK_UP_WIDTH 1
4374 #define MC_CMD_GET_LINK_OUT_V2_PCS_LOCK_LBN 4
4375 #define MC_CMD_GET_LINK_OUT_V2_PCS_LOCK_WIDTH 1
4378 #define MC_CMD_GET_LINK_OUT_V2_ALIGN_LOCK_WIDTH 1
4381 #define MC_CMD_GET_LINK_OUT_V2_HI_BER_WIDTH 1
4384 #define MC_CMD_GET_LINK_OUT_V2_FEC_LOCK_WIDTH 1
4387 #define MC_CMD_GET_LINK_OUT_V2_AN_DONE_WIDTH 1
4390 #define MC_CMD_GET_LINK_OUT_V2_PORT_SHUTDOWN_WIDTH 1
4405 /* Near-side advertised capabilities. Refer to
4409 #define MC_CMD_SET_LINK_IN_CAP_LEN 4
4411 #define MC_CMD_SET_LINK_IN_FLAGS_OFST 4
4412 #define MC_CMD_SET_LINK_IN_FLAGS_LEN 4
4413 #define MC_CMD_SET_LINK_IN_LOWPOWER_OFST 4
4415 #define MC_CMD_SET_LINK_IN_LOWPOWER_WIDTH 1
4416 #define MC_CMD_SET_LINK_IN_POWEROFF_OFST 4
4417 #define MC_CMD_SET_LINK_IN_POWEROFF_LBN 1
4418 #define MC_CMD_SET_LINK_IN_POWEROFF_WIDTH 1
4419 #define MC_CMD_SET_LINK_IN_TXDIS_OFST 4
4421 #define MC_CMD_SET_LINK_IN_TXDIS_WIDTH 1
4422 #define MC_CMD_SET_LINK_IN_LINKDOWN_OFST 4
4424 #define MC_CMD_SET_LINK_IN_LINKDOWN_WIDTH 1
4427 #define MC_CMD_SET_LINK_IN_LOOPBACK_MODE_LEN 4
4434 #define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_LEN 4
4441 /* Near-side advertised capabilities. Refer to
4445 #define MC_CMD_SET_LINK_IN_V2_CAP_LEN 4
4447 #define MC_CMD_SET_LINK_IN_V2_FLAGS_OFST 4
4448 #define MC_CMD_SET_LINK_IN_V2_FLAGS_LEN 4
4449 #define MC_CMD_SET_LINK_IN_V2_LOWPOWER_OFST 4
4451 #define MC_CMD_SET_LINK_IN_V2_LOWPOWER_WIDTH 1
4452 #define MC_CMD_SET_LINK_IN_V2_POWEROFF_OFST 4
4453 #define MC_CMD_SET_LINK_IN_V2_POWEROFF_LBN 1
4454 #define MC_CMD_SET_LINK_IN_V2_POWEROFF_WIDTH 1
4455 #define MC_CMD_SET_LINK_IN_V2_TXDIS_OFST 4
4457 #define MC_CMD_SET_LINK_IN_V2_TXDIS_WIDTH 1
4458 #define MC_CMD_SET_LINK_IN_V2_LINKDOWN_OFST 4
4460 #define MC_CMD_SET_LINK_IN_V2_LINKDOWN_WIDTH 1
4463 #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_MODE_LEN 4
4470 #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_SPEED_LEN 4
4472 #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_LEN 1
4478 #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1
4494 #define MC_CMD_SET_ID_LED_IN_LEN 4
4497 #define MC_CMD_SET_ID_LED_IN_STATE_LEN 4
4521 #define MC_CMD_SET_MAC_IN_MTU_LEN 4
4522 #define MC_CMD_SET_MAC_IN_DRAIN_OFST 4
4523 #define MC_CMD_SET_MAC_IN_DRAIN_LEN 4
4529 #define MC_CMD_SET_MAC_IN_REJECT_LEN 4
4532 #define MC_CMD_SET_MAC_IN_REJECT_UNCST_WIDTH 1
4534 #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_LBN 1
4535 #define MC_CMD_SET_MAC_IN_REJECT_BRDCST_WIDTH 1
4537 #define MC_CMD_SET_MAC_IN_FCNTL_LEN 4
4551 #define MC_CMD_SET_MAC_IN_FLAGS_LEN 4
4554 #define MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_WIDTH 1
4562 #define MC_CMD_SET_MAC_EXT_IN_MTU_LEN 4
4563 #define MC_CMD_SET_MAC_EXT_IN_DRAIN_OFST 4
4564 #define MC_CMD_SET_MAC_EXT_IN_DRAIN_LEN 4
4570 #define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
4573 #define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_WIDTH 1
4575 #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_LBN 1
4576 #define MC_CMD_SET_MAC_EXT_IN_REJECT_BRDCST_WIDTH 1
4578 #define MC_CMD_SET_MAC_EXT_IN_FCNTL_LEN 4
4592 #define MC_CMD_SET_MAC_EXT_IN_FLAGS_LEN 4
4595 #define MC_CMD_SET_MAC_EXT_IN_FLAG_INCLUDE_FCS_WIDTH 1
4602 #define MC_CMD_SET_MAC_EXT_IN_CONTROL_LEN 4
4605 #define MC_CMD_SET_MAC_EXT_IN_CFG_MTU_WIDTH 1
4607 #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_LBN 1
4608 #define MC_CMD_SET_MAC_EXT_IN_CFG_DRAIN_WIDTH 1
4611 #define MC_CMD_SET_MAC_EXT_IN_CFG_REJECT_WIDTH 1
4614 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCNTL_WIDTH 1
4616 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
4617 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
4623 #define MC_CMD_SET_MAC_V2_OUT_LEN 4
4629 #define MC_CMD_SET_MAC_V2_OUT_MTU_LEN 4
4638 * statistics are dmad to that (page-aligned location). Locks required: None.
4652 #define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
4660 #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_LEN 4
4664 /* enum: PMA-PMD Link Up. */
4666 /* enum: PMA-PMD RX Fault. */
4668 /* enum: PMA-PMD TX Fault. */
4670 /* enum: PMA-PMD Signal */
4672 /* enum: PMA-PMD SNR A. */
4674 /* enum: PMA-PMD SNR B. */
4676 /* enum: PMA-PMD SNR C. */
4678 /* enum: PMA-PMD SNR D. */
4700 /* enum: AN link-up. */
4706 /* enum: Clause 22 Link-Up. */
4719 * DMA_ADDR != 0, then the statistics are dmad to that (page-aligned location).
4734 #define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
4736 #define MC_CMD_MAC_STATS_IN_CMD_LEN 4
4739 #define MC_CMD_MAC_STATS_IN_DMA_WIDTH 1
4741 #define MC_CMD_MAC_STATS_IN_CLEAR_LBN 1
4742 #define MC_CMD_MAC_STATS_IN_CLEAR_WIDTH 1
4745 #define MC_CMD_MAC_STATS_IN_PERIODIC_CHANGE_WIDTH 1
4748 #define MC_CMD_MAC_STATS_IN_PERIODIC_ENABLE_WIDTH 1
4750 #define MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR_LBN 4
4751 #define MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR_WIDTH 1
4754 #define MC_CMD_MAC_STATS_IN_PERIODIC_NOEVENT_WIDTH 1
4764 #define MC_CMD_MAC_STATS_IN_DMA_LEN_LEN 4
4767 #define MC_CMD_MAC_STATS_IN_PORT_ID_LEN 4
4777 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
4876 /* enum: RXDP counter: Number of non-host packets. Valid for EF10 with
4917 * 64-bit word of the DMA buffer (at DMA_LEN - sizeof(uint64_t)). Note that
4919 * the last 64-bit word in the buffer when DMA_LEN == MC_CMD_MAC_NSTATS *
4920 * sizeof(uint64_t). See SF-109306-TC, Section 9.2 for details.
4933 #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
4937 /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2)
4940 /* enum: Number of corrected FEC codewords on link (RS-FEC only for Medford2)
4943 /* enum: Number of corrected 10-bit symbol errors, lane 0 (RS-FEC only) */
4945 /* enum: Number of corrected 10-bit symbol errors, lane 1 (RS-FEC only) */
4947 /* enum: Number of corrected 10-bit symbol errors, lane 2 (RS-FEC only) */
4949 /* enum: Number of corrected 10-bit symbol errors, lane 3 (RS-FEC only) */
4966 #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
5001 * or not 32-bit aligned
5040 #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
5073 #define MC_CMD_SRIOV_IN_ENABLE_LEN 4
5074 #define MC_CMD_SRIOV_IN_VI_BASE_OFST 4
5075 #define MC_CMD_SRIOV_IN_VI_BASE_LEN 4
5077 #define MC_CMD_SRIOV_IN_VF_COUNT_LEN 4
5082 #define MC_CMD_SRIOV_OUT_VI_SCALE_LEN 4
5083 #define MC_CMD_SRIOV_OUT_VF_TOTAL_OFST 4
5084 #define MC_CMD_SRIOV_OUT_VF_TOTAL_LEN 4
5090 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LEN 4
5093 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_OFST 4
5094 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LEN 4
5104 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LEN 4
5115 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LEN 4
5147 #define MC_CMD_MEMCPY_IN_RECORD_NUM(len) (((len)-0)/32)
5151 #define MC_CMD_MEMCPY_IN_RECORD_MINNUM 1
5171 #define MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4
5174 /* A type value of 1 is unused. */
5175 #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4
5176 #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4
5192 #define MC_CMD_WOL_FILTER_SET_IN_DATA_LEN 4
5198 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5199 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5200 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5209 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5210 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5211 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5213 #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_IP_LEN 4
5215 #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_IP_LEN 4
5224 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5225 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5226 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5239 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5240 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5241 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5247 #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LEN_LEN 1
5249 #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER3_LEN 1
5251 #define MC_CMD_WOL_FILTER_SET_IN_BITMAP_LAYER4_LEN 1
5256 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5257 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5258 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5260 #define MC_CMD_WOL_FILTER_SET_IN_LINK_MASK_LEN 4
5263 #define MC_CMD_WOL_FILTER_SET_IN_LINK_UP_WIDTH 1
5265 #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_LBN 1
5266 #define MC_CMD_WOL_FILTER_SET_IN_LINK_DOWN_WIDTH 1
5269 #define MC_CMD_WOL_FILTER_SET_OUT_LEN 4
5271 #define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_LEN 4
5284 #define MC_CMD_WOL_FILTER_REMOVE_IN_LEN 4
5286 #define MC_CMD_WOL_FILTER_REMOVE_IN_FILTER_ID_LEN 4
5303 #define MC_CMD_WOL_FILTER_RESET_IN_LEN 4
5305 #define MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4
5344 #define MC_CMD_NVRAM_TYPES_OUT_LEN 4
5347 #define MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4
5403 #define MC_CMD_NVRAM_INFO_IN_LEN 4
5405 #define MC_CMD_NVRAM_INFO_IN_TYPE_LEN 4
5412 #define MC_CMD_NVRAM_INFO_OUT_TYPE_LEN 4
5415 #define MC_CMD_NVRAM_INFO_OUT_SIZE_OFST 4
5416 #define MC_CMD_NVRAM_INFO_OUT_SIZE_LEN 4
5418 #define MC_CMD_NVRAM_INFO_OUT_ERASESIZE_LEN 4
5420 #define MC_CMD_NVRAM_INFO_OUT_FLAGS_LEN 4
5423 #define MC_CMD_NVRAM_INFO_OUT_PROTECTED_WIDTH 1
5425 #define MC_CMD_NVRAM_INFO_OUT_TLV_LBN 1
5426 #define MC_CMD_NVRAM_INFO_OUT_TLV_WIDTH 1
5429 #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_IF_TSA_BOUND_WIDTH 1
5432 #define MC_CMD_NVRAM_INFO_OUT_CRC_WIDTH 1
5435 #define MC_CMD_NVRAM_INFO_OUT_READ_ONLY_WIDTH 1
5438 #define MC_CMD_NVRAM_INFO_OUT_CMAC_WIDTH 1
5441 #define MC_CMD_NVRAM_INFO_OUT_A_B_WIDTH 1
5443 #define MC_CMD_NVRAM_INFO_OUT_PHYSDEV_LEN 4
5445 #define MC_CMD_NVRAM_INFO_OUT_PHYSADDR_LEN 4
5450 #define MC_CMD_NVRAM_INFO_V2_OUT_TYPE_LEN 4
5453 #define MC_CMD_NVRAM_INFO_V2_OUT_SIZE_OFST 4
5454 #define MC_CMD_NVRAM_INFO_V2_OUT_SIZE_LEN 4
5456 #define MC_CMD_NVRAM_INFO_V2_OUT_ERASESIZE_LEN 4
5458 #define MC_CMD_NVRAM_INFO_V2_OUT_FLAGS_LEN 4
5461 #define MC_CMD_NVRAM_INFO_V2_OUT_PROTECTED_WIDTH 1
5463 #define MC_CMD_NVRAM_INFO_V2_OUT_TLV_LBN 1
5464 #define MC_CMD_NVRAM_INFO_V2_OUT_TLV_WIDTH 1
5467 #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_IF_TSA_BOUND_WIDTH 1
5470 #define MC_CMD_NVRAM_INFO_V2_OUT_READ_ONLY_WIDTH 1
5473 #define MC_CMD_NVRAM_INFO_V2_OUT_A_B_WIDTH 1
5475 #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSDEV_LEN 4
5477 #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSADDR_LEN 4
5481 #define MC_CMD_NVRAM_INFO_V2_OUT_WRITESIZE_LEN 4
5502 #define MC_CMD_NVRAM_UPDATE_START_IN_LEN 4
5504 #define MC_CMD_NVRAM_UPDATE_START_IN_TYPE_LEN 4
5515 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_TYPE_LEN 4
5518 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAGS_OFST 4
5519 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAGS_LEN 4
5520 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT_OFST 4
5522 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT_WIDTH 1
5542 #define MC_CMD_NVRAM_READ_IN_TYPE_LEN 4
5545 #define MC_CMD_NVRAM_READ_IN_OFFSET_OFST 4
5546 #define MC_CMD_NVRAM_READ_IN_OFFSET_LEN 4
5549 #define MC_CMD_NVRAM_READ_IN_LENGTH_LEN 4
5554 #define MC_CMD_NVRAM_READ_IN_V2_TYPE_LEN 4
5557 #define MC_CMD_NVRAM_READ_IN_V2_OFFSET_OFST 4
5558 #define MC_CMD_NVRAM_READ_IN_V2_OFFSET_LEN 4
5561 #define MC_CMD_NVRAM_READ_IN_V2_LENGTH_LEN 4
5565 * from. This allows it to perform a read-modify-write-verify with the write
5571 #define MC_CMD_NVRAM_READ_IN_V2_MODE_LEN 4
5581 /* enum: Read from the non-current (i.e. to be updated) partition of an A/B
5587 #define MC_CMD_NVRAM_READ_OUT_LENMIN 1
5590 #define MC_CMD_NVRAM_READ_OUT_LEN(num) (0+1*(num))
5591 #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_NUM(len) (((len)-0)/1)
5593 #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_LEN 1
5594 #define MC_CMD_NVRAM_READ_OUT_READ_BUFFER_MINNUM 1
5614 #define MC_CMD_NVRAM_WRITE_IN_LEN(num) (12+1*(num))
5615 #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_NUM(len) (((len)-12)/1)
5617 #define MC_CMD_NVRAM_WRITE_IN_TYPE_LEN 4
5620 #define MC_CMD_NVRAM_WRITE_IN_OFFSET_OFST 4
5621 #define MC_CMD_NVRAM_WRITE_IN_OFFSET_LEN 4
5623 #define MC_CMD_NVRAM_WRITE_IN_LENGTH_LEN 4
5625 #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_LEN 1
5626 #define MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MINNUM 1
5648 #define MC_CMD_NVRAM_ERASE_IN_TYPE_LEN 4
5651 #define MC_CMD_NVRAM_ERASE_IN_OFFSET_OFST 4
5652 #define MC_CMD_NVRAM_ERASE_IN_OFFSET_LEN 4
5654 #define MC_CMD_NVRAM_ERASE_IN_LENGTH_LEN 4
5680 #define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_LEN 4
5683 #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_OFST 4
5684 #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_LEN 4
5693 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_TYPE_LEN 4
5696 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_REBOOT_OFST 4
5697 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_REBOOT_LEN 4
5699 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAGS_LEN 4
5702 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT_WIDTH 1
5704 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_LBN 1
5705 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND_WIDTH 1
5708 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
5727 * per-partition nvram lock in firmware is only released after the verification
5730 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN 4
5733 * the field are marked with a prefix 'Internal-error'.
5736 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE_LEN 4
5737 /* enum: Invalid return code; only non-zero values are defined. Defined as
5749 /* enum: Error in message digest calculated over the reflash-header, payload
5750 * and reflash-trailer.
5767 /* enum: The image contains a test-signed certificate, but the adapter accepts
5773 /* enum: Internal-error. The signed image is missing the 'contents' section,
5777 /* enum: Internal-error. The bundle header is invalid. */
5779 /* enum: Internal-error. The bundle does not have a valid reflash image layout.
5782 /* enum: Internal-error. The bundle has an inconsistent layout of components or
5786 /* enum: Internal-error. The bundle manifest is inconsistent with components in
5790 /* enum: Internal-error. The number of components in a bundle do not match the
5794 /* enum: Internal-error. The bundle contains too many components for the MC
5798 /* enum: Internal-error. The bundle manifest has an invalid/inconsistent
5802 /* enum: Internal-error. The hash of a component does not match the hash stored
5806 /* enum: Internal-error. Component hash calculation failed. */
5808 /* enum: Internal-error. The component does not have a valid reflash image
5816 /* enum: The update operation is in-progress. */
5829 * Production mc firmwares are generally compiled with REBOOT_ON_ASSERT=1,
5835 * Locks required: NONE Returns: Nothing. You get back a response with ERR=1,
5844 #define MC_CMD_REBOOT_IN_LEN 4
5846 #define MC_CMD_REBOOT_IN_FLAGS_LEN 4
5868 #define MC_CMD_SCHEDINFO_OUT_LENMIN 4
5871 #define MC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num))
5872 #define MC_CMD_SCHEDINFO_OUT_DATA_NUM(len) (((len)-0)/4)
5874 #define MC_CMD_SCHEDINFO_OUT_DATA_LEN 4
5875 #define MC_CMD_SCHEDINFO_OUT_DATA_MINNUM 1
5891 #define MC_CMD_REBOOT_MODE_IN_LEN 4
5893 #define MC_CMD_REBOOT_MODE_IN_VALUE_LEN 4
5896 /* enum: Power-on Reset. */
5904 #define MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH 1
5907 #define MC_CMD_REBOOT_MODE_OUT_LEN 4
5909 #define MC_CMD_REBOOT_MODE_OUT_VALUE_LEN 4
5952 #define MC_CMD_SENSOR_INFO_EXT_IN_LEN 4
5957 * Page 1 contains sensors 32 to 62 (sensor 63 is the next page bit). etc.
5960 #define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_LEN 4
5968 * Page 1 contains sensors 32 to 62 (sensor 63 is the next page bit). etc.
5971 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_PAGE_LEN 4
5973 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_OFST 4
5974 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_LEN 4
5975 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_OFST 4
5977 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_WIDTH 1
5980 #define MC_CMD_SENSOR_INFO_OUT_LENMIN 4
5983 #define MC_CMD_SENSOR_INFO_OUT_LEN(num) (4+8*(num))
5984 #define MC_CMD_SENSOR_INFO_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) (((len)-4)/8)
5986 #define MC_CMD_SENSOR_INFO_OUT_MASK_LEN 4
5997 /* enum: Phy 1 temperature: degC */
5999 /* enum: Phy 1 cooling: bool */
6027 /* enum: Fan 1 speed: RPM */
6033 /* enum: Fan 4 speed: RPM */
6079 /* enum: Port 0 PHY power switch over-current: bool */
6081 /* enum: Port 1 PHY power switch over-current: bool */
6083 /* enum: Mop-up microcontroller reference voltage: mV */
6097 /* enum: CCOM AVREG 1v2 supply (interval ADC): mV */
6099 /* enum: CCOM AVREG 1v2 supply (external ADC): mV */
6101 /* enum: CCOM AVREG 1v8 supply (interval ADC): mV */
6103 /* enum: CCOM AVREG 1v8 supply (external ADC): mV */
6137 /* enum: Temperature of SODIMM 1 (if installed): degC */
6141 /* enum: Voltage supplied to the QSFP #1 from their power supply: mV */
6161 /* enum: Engineering sensor 1 */
6167 /* enum: Engineering sensor 4 */
6180 #define MC_CMD_SENSOR_ENTRY_OFST 4
6182 #define MC_CMD_SENSOR_ENTRY_LO_OFST 4
6189 #define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN 4
6192 #define MC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) (4+8*(num))
6193 #define MC_CMD_SENSOR_INFO_EXT_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) (((len)-4)/8)
6195 #define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_LEN 4
6200 #define MC_CMD_SENSOR_INFO_EXT_OUT_NEXT_PAGE_WIDTH 1
6202 /* MC_CMD_SENSOR_ENTRY_OFST 4 */
6204 /* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
6220 #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2_OFST 4
6254 /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned).
6262 #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
6266 /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned).
6274 #define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
6277 #define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
6281 /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned).
6289 #define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
6292 #define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
6295 #define MC_CMD_READ_SENSORS_EXT_IN_V2_FLAGS_LEN 4
6298 #define MC_CMD_READ_SENSORS_EXT_IN_V2_ENGINEERING_WIDTH 1
6307 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_LEN 4
6313 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE_LEN 1
6329 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_TYPE_LEN 1
6351 #define MC_CMD_GET_PHY_STATE_OUT_LEN 4
6353 #define MC_CMD_GET_PHY_STATE_OUT_STATE_LEN 4
6362 * 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to
6389 #define MC_CMD_WOL_FILTER_GET_OUT_LEN 4
6391 #define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_LEN 4
6396 * Add a protocol offload to NIC for lights-out state. Locks required: None.
6408 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num))
6409 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) (((len)-4)/4)
6411 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4
6414 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST 4
6415 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN 4
6416 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MINNUM 1
6423 /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */
6424 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_OFST 4
6427 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_LEN 4
6432 /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */
6433 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_OFST 4
6441 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN 4
6443 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_LEN 4
6448 * Remove a protocol offload from NIC for lights-out state. Locks required:
6459 #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4
6460 #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST 4
6461 #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_LEN 4
6482 * Deliberately trigger an assert-detonation in the firmware for testing
6498 #define MC_CMD_TESTASSERT_V2_IN_LEN 4
6501 #define MC_CMD_TESTASSERT_V2_IN_TYPE_LEN 4
6524 * understand the given workaround number - which should not be treated as a
6526 * workaround, that's between the driver and the mcfw on a per-workaround
6538 #define MC_CMD_WORKAROUND_IN_TYPE_LEN 4
6548 * - before adding code that queries this workaround, remember that there's
6563 /* 0 = disable the workaround indicated by TYPE; any non-zero value = enable
6566 #define MC_CMD_WORKAROUND_IN_ENABLED_OFST 4
6567 #define MC_CMD_WORKAROUND_IN_ENABLED_LEN 4
6575 #define MC_CMD_WORKAROUND_EXT_OUT_LEN 4
6577 #define MC_CMD_WORKAROUND_EXT_OUT_FLAGS_LEN 4
6580 #define MC_CMD_WORKAROUND_EXT_OUT_FLR_DONE_WIDTH 1
6585 * Read media-specific data from PHY (e.g. SFP/SFP+ module ID information for
6588 * output data, are interpreted on a per-type basis. For SFP+: PAGE=0 or 1
6589 * returns a 128-byte block read from module I2C address 0xA0 offset 0 or 0x80.
6598 #define MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN 4
6600 #define MC_CMD_GET_PHY_MEDIA_INFO_IN_PAGE_LEN 4
6606 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(num) (4+1*(num))
6607 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_NUM(len) (((len)-4)/1)
6610 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_LEN 4
6611 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST 4
6612 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_LEN 1
6613 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_MINNUM 1
6629 #define MC_CMD_NVRAM_TEST_IN_LEN 4
6631 #define MC_CMD_NVRAM_TEST_IN_TYPE_LEN 4
6636 #define MC_CMD_NVRAM_TEST_OUT_LEN 4
6638 #define MC_CMD_NVRAM_TEST_OUT_RESULT_LEN 4
6657 /* 0-6 low->high de-emph. */
6659 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_LEN 4
6660 /* 0-8 low->high ref.V */
6661 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST 4
6662 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_LEN 4
6663 /* 0-8 0-8 low->high boost */
6665 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_LEN 4
6666 /* 0-8 low->high ref.V */
6668 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_LEN 4
6677 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_LEN 4
6679 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4
6680 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_LEN 4
6683 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_LEN 4
6692 * Adjusts the sensor limits. This is a warranty-voiding operation. Returns:
6704 #define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4
6707 /* interpretation is is sensor-specific. */
6708 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4
6709 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4
6710 /* interpretation is is sensor-specific. */
6712 #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4
6713 /* interpretation is is sensor-specific. */
6715 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4
6716 /* interpretation is is sensor-specific. */
6718 #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4
6735 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_LEN 4
6736 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_OFST 4
6737 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_LEN 4
6739 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_LEN 4
6741 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_LEN 4
6758 #define MC_CMD_NVRAM_PARTITIONS_OUT_LENMIN 4
6761 #define MC_CMD_NVRAM_PARTITIONS_OUT_LEN(num) (4+4*(num))
6762 #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_NUM(len) (((len)-4)/4)
6765 #define MC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_LEN 4
6767 #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_OFST 4
6768 #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_LEN 4
6785 #define MC_CMD_NVRAM_METADATA_IN_LEN 4
6788 #define MC_CMD_NVRAM_METADATA_IN_TYPE_LEN 4
6794 #define MC_CMD_NVRAM_METADATA_OUT_LEN(num) (20+1*(num))
6795 #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(len) (((len)-20)/1)
6798 #define MC_CMD_NVRAM_METADATA_OUT_TYPE_LEN 4
6799 #define MC_CMD_NVRAM_METADATA_OUT_FLAGS_OFST 4
6800 #define MC_CMD_NVRAM_METADATA_OUT_FLAGS_LEN 4
6801 #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_OFST 4
6803 #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_WIDTH 1
6804 #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_OFST 4
6805 #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_LBN 1
6806 #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_WIDTH 1
6807 #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_OFST 4
6809 #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_WIDTH 1
6812 #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_LEN 4
6813 /* 1st component of W.X.Y.Z version number for content of this partition */
6822 /* 4th component of W.X.Y.Z version number for content of this partition */
6825 /* Zero-terminated string describing the content of this partition */
6827 #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_LEN 1
6855 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_COUNT_LEN 4
6858 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_LEN 4
6863 * Perform a CLP related operation, see SF-110495-PS for details of CLP
6865 * different manufacturers which are to be found in SF-119187-TC, SF-119186-TC,
6866 * SF-120509-TC and SF-117282-PS.
6874 #define MC_CMD_CLP_IN_LEN 4
6877 #define MC_CMD_CLP_IN_OP_LEN 4
6893 #define MC_CMD_CLP_IN_DEFAULT_LEN 4
6895 /* MC_CMD_CLP_IN_OP_LEN 4 */
6903 /* MC_CMD_CLP_IN_OP_LEN 4 */
6905 * restores the permanent (factory-programmed) MAC address associated with the
6906 * port. A non-zero MAC address persists until a PCIe reset or a power cycle.
6908 #define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4
6920 /* MC_CMD_CLP_IN_OP_LEN 4 */
6922 * restores the permanent (factory-programmed) MAC address associated with the
6923 * port. A non-zero MAC address persists until a PCIe reset or a power cycle.
6925 #define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST 4
6931 #define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN 4
6934 #define MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_WIDTH 1
6937 #define MC_CMD_CLP_IN_GET_MAC_LEN 4
6939 /* MC_CMD_CLP_IN_OP_LEN 4 */
6944 /* MC_CMD_CLP_IN_OP_LEN 4 */
6945 #define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST 4
6946 #define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN 4
6947 #define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_OFST 4
6949 #define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_WIDTH 1
6963 /* MC_CMD_CLP_IN_OP_LEN 4 */
6965 #define MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST 4
6966 #define MC_CMD_CLP_IN_SET_BOOT_FLAG_LEN 1
6972 #define MC_CMD_CLP_IN_GET_BOOT_LEN 4
6974 /* MC_CMD_CLP_IN_OP_LEN 4 */
6977 #define MC_CMD_CLP_OUT_GET_BOOT_LEN 4
6980 #define MC_CMD_CLP_OUT_GET_BOOT_FLAG_LEN 1
6982 #define MC_CMD_CLP_OUT_GET_BOOT_RESERVED_OFST 1
6996 #define MC_CMD_MUM_IN_LEN 4
6998 #define MC_CMD_MUM_IN_OP_HDR_LEN 4
7036 #define MC_CMD_MUM_IN_NULL_LEN 4
7039 #define MC_CMD_MUM_IN_CMD_LEN 4
7042 #define MC_CMD_MUM_IN_GET_VERSION_LEN 4
7045 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7051 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7053 #define MC_CMD_MUM_IN_READ_DEVICE_OFST 4
7054 #define MC_CMD_MUM_IN_READ_DEVICE_LEN 4
7057 /* enum: Hittite HMC1035 clock generator for NIC-side on Sorrento board */
7059 /* 32-bit address to read from */
7061 #define MC_CMD_MUM_IN_READ_ADDR_LEN 4
7064 #define MC_CMD_MUM_IN_READ_NUMWORDS_LEN 4
7070 #define MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num))
7071 #define MC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) (((len)-12)/4)
7074 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7076 #define MC_CMD_MUM_IN_WRITE_DEVICE_OFST 4
7077 #define MC_CMD_MUM_IN_WRITE_DEVICE_LEN 4
7080 /* 32-bit address to write to */
7082 #define MC_CMD_MUM_IN_WRITE_ADDR_LEN 4
7085 #define MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4
7086 #define MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM 1
7094 #define MC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num))
7095 #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_NUM(len) (((len)-16)/1)
7098 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7100 #define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST 4
7101 #define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_LEN 4
7104 #define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_LEN 4
7107 #define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_LEN 4
7110 #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN 1
7111 #define MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM 1
7119 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7120 #define MC_CMD_MUM_IN_LOG_OP_OFST 4
7121 #define MC_CMD_MUM_IN_LOG_OP_LEN 4
7127 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7128 /* MC_CMD_MUM_IN_LOG_OP_OFST 4 */
7129 /* MC_CMD_MUM_IN_LOG_OP_LEN 4 */
7132 #define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_LEN 4
7138 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7139 #define MC_CMD_MUM_IN_GPIO_HDR_OFST 4
7140 #define MC_CMD_MUM_IN_GPIO_HDR_LEN 4
7141 #define MC_CMD_MUM_IN_GPIO_OPCODE_OFST 4
7154 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7155 #define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST 4
7156 #define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_LEN 4
7161 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7162 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST 4
7163 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_LEN 4
7164 /* The first 32-bit word to be written to the GPIO OUT register. */
7166 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_LEN 4
7167 /* The second 32-bit word to be written to the GPIO OUT register. */
7169 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_LEN 4
7174 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7175 #define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST 4
7176 #define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_LEN 4
7181 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7182 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST 4
7183 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_LEN 4
7184 /* The first 32-bit word to be written to the GPIO OUT ENABLE register. */
7186 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_LEN 4
7187 /* The second 32-bit word to be written to the GPIO OUT ENABLE register. */
7189 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_LEN 4
7194 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7195 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST 4
7196 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_LEN 4
7201 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7202 #define MC_CMD_MUM_IN_GPIO_OP_HDR_OFST 4
7203 #define MC_CMD_MUM_IN_GPIO_OP_HDR_LEN 4
7204 #define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_OFST 4
7211 #define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_OFST 4
7218 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7219 #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST 4
7220 #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_LEN 4
7225 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7226 #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST 4
7227 #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_LEN 4
7228 #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_OFST 4
7235 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7236 #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST 4
7237 #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_LEN 4
7238 #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_OFST 4
7245 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7246 #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST 4
7247 #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_LEN 4
7248 #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_OFST 4
7256 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7257 #define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST 4
7258 #define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_LEN 4
7259 #define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_OFST 4
7262 #define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_OFST 4
7270 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7271 /* Bit-mask of clocks to be programmed */
7272 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST 4
7273 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_LEN 4
7279 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_LEN 4
7282 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_WIDTH 1
7284 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_LBN 1
7285 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_WIDTH 1
7288 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_WIDTH 1
7294 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7296 #define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST 4
7297 #define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_LEN 4
7300 #define MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN 4
7303 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7309 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7310 #define MC_CMD_MUM_IN_QSFP_HDR_OFST 4
7311 #define MC_CMD_MUM_IN_QSFP_HDR_LEN 4
7312 #define MC_CMD_MUM_IN_QSFP_OPCODE_OFST 4
7314 #define MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH 4
7322 #define MC_CMD_MUM_IN_QSFP_IDX_LEN 4
7327 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7328 #define MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST 4
7329 #define MC_CMD_MUM_IN_QSFP_INIT_HDR_LEN 4
7331 #define MC_CMD_MUM_IN_QSFP_INIT_IDX_LEN 4
7333 #define MC_CMD_MUM_IN_QSFP_INIT_CAGE_LEN 4
7338 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7339 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST 4
7340 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_LEN 4
7342 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_LEN 4
7344 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_LEN 4
7346 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_LEN 4
7348 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_LEN 4
7353 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7354 #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST 4
7355 #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_LEN 4
7357 #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_LEN 4
7362 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7363 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST 4
7364 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_LEN 4
7366 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_LEN 4
7368 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_LEN 4
7373 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7374 #define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST 4
7375 #define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_LEN 4
7377 #define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_LEN 4
7382 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7383 #define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST 4
7384 #define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_LEN 4
7386 #define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_LEN 4
7389 #define MC_CMD_MUM_IN_READ_DDR_INFO_LEN 4
7392 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7403 #define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_LEN 4
7404 #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
7406 #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
7410 #define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
7413 #define MC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num))
7414 #define MC_CMD_MUM_OUT_RAW_CMD_DATA_NUM(len) (((len)-0)/1)
7417 #define MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1
7418 #define MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM 1
7423 #define MC_CMD_MUM_OUT_READ_LENMIN 4
7426 #define MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num))
7427 #define MC_CMD_MUM_OUT_READ_BUFFER_NUM(len) (((len)-0)/4)
7429 #define MC_CMD_MUM_OUT_READ_BUFFER_LEN 4
7430 #define MC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1
7445 /* The first 32-bit word read from the GPIO IN register. */
7447 #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_LEN 4
7448 /* The second 32-bit word read from the GPIO IN register. */
7449 #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST 4
7450 #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_LEN 4
7457 /* The first 32-bit word read from the GPIO OUT register. */
7459 #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_LEN 4
7460 /* The second 32-bit word read from the GPIO OUT register. */
7461 #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST 4
7462 #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_LEN 4
7470 #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_LEN 4
7471 #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST 4
7472 #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_LEN 4
7475 #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN 4
7477 #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_LEN 4
7489 #define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4
7492 #define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num))
7493 #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) (((len)-0)/4)
7495 #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4
7496 #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1
7510 #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN 4
7512 #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_LEN 4
7518 #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN 4
7520 #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_LEN 4
7528 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_LEN 4
7529 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST 4
7530 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_LEN 4
7531 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_OFST 4
7533 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_WIDTH 1
7534 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_OFST 4
7535 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_LBN 1
7536 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_WIDTH 1
7539 #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN 4
7541 #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_LEN 4
7547 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num))
7548 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1)
7551 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN 4
7552 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST 4
7553 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN 1
7554 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM 1
7561 #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_LEN 4
7562 #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST 4
7563 #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_LEN 4
7566 #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN 4
7568 #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_LEN 4
7575 #define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_NUM(len) (((len)-8)/8)
7578 #define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN 4
7586 #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_OFST 4
7587 #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_LEN 4
7599 /* enum: SODIMM bank 1 (Top SODIMM for Sorrento) */
7610 #define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_WIDTH 4
7613 #define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_WIDTH 4
7618 /* enum: Values 5-15 are reserved for future usage */
7628 #define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_WIDTH 4
7654 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_LEN 4
7658 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_OFST 4
7659 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_LEN 4
7664 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_LEN 4
7669 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_LEN 4
7674 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_LEN 4
7679 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_LEN 4
7692 #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_LEN 4
7695 /* A human-readable name for the sensor (zero terminated string, max 32 bytes)
7697 #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_OFST 4
7705 #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_LEN 4
7731 #define MC_CMD_DYNAMIC_SENSORS_READING_HANDLE_LEN 4
7735 #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_OFST 4
7736 #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_LEN 4
7741 #define MC_CMD_DYNAMIC_SENSORS_READING_STATE_LEN 4
7765 * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors
7800 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_LEN(num) (8+4*(num))
7801 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_NUM(len) (((len)-8)/4)
7806 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_GENERATION_LEN 4
7810 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_OFST 4
7811 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_LEN 4
7814 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_LEN 4
7842 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LEN(num) (0+4*(num))
7843 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_NUM(len) (((len)-0)/4)
7846 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_LEN 4
7856 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_OUT_SENSORS_NUM(len) (((len)-0)/64)
7891 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LEN(num) (0+4*(num))
7892 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_NUM(len) (((len)-0)/4)
7895 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_LEN 4
7905 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_NUM(len) (((len)-0)/12)
7928 #define MC_CMD_EVENT_CTRL_IN_LEN(num) (0+4*(num))
7929 #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) (((len)-0)/4)
7932 #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN 4
7954 #define EVB_PORT_ID_LEN 4
7956 #define EVB_PORT_ID_PORT_ID_LEN 4
7963 /* enum: External network port 1 */
7978 #define EVB_VLAN_TAG_MODE_WIDTH 4
7996 /* the raw 64-bit address field from the SMC, not adjusted for page size */
7997 #define BUFTBL_ENTRY_RAWADDR_OFST 4
7999 #define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
8022 /* enum: Expansion ROM configuration data for port 1 */
8028 /* enum: Non-volatile log output partition */
8030 /* enum: Non-volatile log output of second core on dual-core device */
8048 /* enum: Non-volatile log output partition for FC */
8056 /* enum: MUM Non-volatile log output partition. */
8080 /* enum: Spare partition 4 */
8101 * platforms. See SF-119124-PS. The STATIC_CONFIG partition may contain a
8111 /* enum: Bundle update non-volatile log output partition */
8127 #define LICENSED_APP_ID_LEN 4
8129 #define LICENSED_APP_ID_ID_LEN 4
8154 /* enum: Capture SolarSystem 1G */
8171 #define LICENSED_FEATURES_MASK_HI_OFST 4
8174 #define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
8176 #define LICENSED_FEATURES_PIO_LBN 1
8177 #define LICENSED_FEATURES_PIO_WIDTH 1
8180 #define LICENSED_FEATURES_EVQ_TIMER_WIDTH 1
8183 #define LICENSED_FEATURES_CLOCK_WIDTH 1
8185 #define LICENSED_FEATURES_RX_TIMESTAMPS_LBN 4
8186 #define LICENSED_FEATURES_RX_TIMESTAMPS_WIDTH 1
8189 #define LICENSED_FEATURES_TX_TIMESTAMPS_WIDTH 1
8192 #define LICENSED_FEATURES_RX_SNIFF_WIDTH 1
8195 #define LICENSED_FEATURES_TX_SNIFF_WIDTH 1
8198 #define LICENSED_FEATURES_PROXY_FILTER_OPS_WIDTH 1
8201 #define LICENSED_FEATURES_EVENT_CUT_THROUGH_WIDTH 1
8211 #define LICENSED_V3_APPS_MASK_HI_OFST 4
8214 #define LICENSED_V3_APPS_ONLOAD_WIDTH 1
8216 #define LICENSED_V3_APPS_PTP_LBN 1
8217 #define LICENSED_V3_APPS_PTP_WIDTH 1
8220 #define LICENSED_V3_APPS_SOLARCAPTURE_PRO_WIDTH 1
8223 #define LICENSED_V3_APPS_SOLARSECURE_WIDTH 1
8225 #define LICENSED_V3_APPS_PERF_MONITOR_LBN 4
8226 #define LICENSED_V3_APPS_PERF_MONITOR_WIDTH 1
8229 #define LICENSED_V3_APPS_SOLARCAPTURE_LIVE_WIDTH 1
8232 #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_WIDTH 1
8235 #define LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_WIDTH 1
8238 #define LICENSED_V3_APPS_TCP_DIRECT_WIDTH 1
8241 #define LICENSED_V3_APPS_LOW_LATENCY_WIDTH 1
8244 #define LICENSED_V3_APPS_SOLARCAPTURE_TAP_WIDTH 1
8247 #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_WIDTH 1
8250 #define LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_WIDTH 1
8253 #define LICENSED_V3_APPS_SCALEOUT_ONLOAD_WIDTH 1
8256 #define LICENSED_V3_APPS_DSHBRD_WIDTH 1
8259 #define LICENSED_V3_APPS_SCATRD_WIDTH 1
8269 #define LICENSED_V3_FEATURES_MASK_HI_OFST 4
8272 #define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
8274 #define LICENSED_V3_FEATURES_PIO_LBN 1
8275 #define LICENSED_V3_FEATURES_PIO_WIDTH 1
8278 #define LICENSED_V3_FEATURES_EVQ_TIMER_WIDTH 1
8281 #define LICENSED_V3_FEATURES_CLOCK_WIDTH 1
8283 #define LICENSED_V3_FEATURES_RX_TIMESTAMPS_LBN 4
8284 #define LICENSED_V3_FEATURES_RX_TIMESTAMPS_WIDTH 1
8287 #define LICENSED_V3_FEATURES_TX_TIMESTAMPS_WIDTH 1
8290 #define LICENSED_V3_FEATURES_RX_SNIFF_WIDTH 1
8293 #define LICENSED_V3_FEATURES_TX_SNIFF_WIDTH 1
8296 #define LICENSED_V3_FEATURES_PROXY_FILTER_OPS_WIDTH 1
8299 #define LICENSED_V3_FEATURES_EVENT_CUT_THROUGH_WIDTH 1
8313 #define TX_TIMESTAMP_EVENT_TX_EV_TYPE_LEN 1
8335 #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_OFST 4
8341 #define RSS_MODE_LEN 1
8342 /* The RSS mode for a particular packet type is a value from 0 - 15 which can
8343 * be considered as 4 bits selecting which fields are included in the hash. (A
8346 * but only 4 bits are relevant.
8349 #define RSS_MODE_HASH_SELECTOR_LEN 1
8352 #define RSS_MODE_HASH_SRC_ADDR_WIDTH 1
8354 #define RSS_MODE_HASH_DST_ADDR_LBN 1
8355 #define RSS_MODE_HASH_DST_ADDR_WIDTH 1
8358 #define RSS_MODE_HASH_SRC_PORT_WIDTH 1
8361 #define RSS_MODE_HASH_DST_PORT_WIDTH 1
8366 #define CTPIO_STATS_MAP_LEN 4
8396 /* Same order as MIPS GDB (r0-r31, sr, lo, hi, bad, cause, 32 x float, fsr,
8400 #define MC_CMD_READ_REGS_OUT_REGS_LEN 4
8407 * end with an address for each 4k of host memory required to back the EVQ.
8419 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_NUM(len) (((len)-36)/8)
8422 #define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
8426 #define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
8427 #define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
8431 #define MC_CMD_INIT_EVQ_IN_TMR_LOAD_LEN 4
8432 /* The reload value is ignored in one-shot modes */
8434 #define MC_CMD_INIT_EVQ_IN_TMR_RELOAD_LEN 4
8437 #define MC_CMD_INIT_EVQ_IN_FLAGS_LEN 4
8440 #define MC_CMD_INIT_EVQ_IN_FLAG_INTERRUPTING_WIDTH 1
8442 #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_LBN 1
8443 #define MC_CMD_INIT_EVQ_IN_FLAG_RPTR_DOS_WIDTH 1
8446 #define MC_CMD_INIT_EVQ_IN_FLAG_INT_ARMD_WIDTH 1
8449 #define MC_CMD_INIT_EVQ_IN_FLAG_CUT_THRU_WIDTH 1
8451 #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_LBN 4
8452 #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_WIDTH 1
8455 #define MC_CMD_INIT_EVQ_IN_FLAG_TX_MERGE_WIDTH 1
8458 #define MC_CMD_INIT_EVQ_IN_FLAG_USE_TIMER_WIDTH 1
8460 #define MC_CMD_INIT_EVQ_IN_TMR_MODE_LEN 4
8467 /* enum: Hold-off */
8471 #define MC_CMD_INIT_EVQ_IN_TARGET_EVQ_LEN 4
8477 #define MC_CMD_INIT_EVQ_IN_IRQ_NUM_LEN 4
8480 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_LEN 4
8491 #define MC_CMD_INIT_EVQ_IN_COUNT_THRSHLD_LEN 4
8492 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8497 #define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
8502 #define MC_CMD_INIT_EVQ_OUT_LEN 4
8505 #define MC_CMD_INIT_EVQ_OUT_IRQ_LEN 4
8512 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_NUM(len) (((len)-36)/8)
8515 #define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
8519 #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
8520 #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
8524 #define MC_CMD_INIT_EVQ_V2_IN_TMR_LOAD_LEN 4
8525 /* The reload value is ignored in one-shot modes */
8527 #define MC_CMD_INIT_EVQ_V2_IN_TMR_RELOAD_LEN 4
8530 #define MC_CMD_INIT_EVQ_V2_IN_FLAGS_LEN 4
8533 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INTERRUPTING_WIDTH 1
8535 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_LBN 1
8536 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RPTR_DOS_WIDTH 1
8539 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_INT_ARMD_WIDTH 1
8542 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_CUT_THRU_WIDTH 1
8544 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_LBN 4
8545 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_WIDTH 1
8548 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TX_MERGE_WIDTH 1
8551 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_USE_TIMER_WIDTH 1
8554 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_WIDTH 4
8558 * over-ridden by firmware based on licenses and firmware variant in order to
8564 * over-ridden by firmware based on licenses and firmware variant in order to
8569 /* enum: MEDFORD only. Certain initialisation flags may be over-ridden by
8576 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_EXT_WIDTH_WIDTH 1
8578 #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_LEN 4
8585 /* enum: Hold-off */
8589 #define MC_CMD_INIT_EVQ_V2_IN_TARGET_EVQ_LEN 4
8595 #define MC_CMD_INIT_EVQ_V2_IN_IRQ_NUM_LEN 4
8598 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_LEN 4
8609 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_THRSHLD_LEN 4
8610 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8615 #define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
8623 #define MC_CMD_INIT_EVQ_V2_OUT_IRQ_LEN 4
8625 #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_OFST 4
8626 #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_LEN 4
8627 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_OFST 4
8629 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_WIDTH 1
8630 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_OFST 4
8631 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_LBN 1
8632 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_WIDTH 1
8633 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_OFST 4
8635 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_WIDTH 1
8636 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_OFST 4
8638 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_WIDTH 1
8641 #define QUEUE_CRC_MODE_LEN 1
8643 #define QUEUE_CRC_MODE_MODE_WIDTH 4
8656 #define QUEUE_CRC_MODE_SPARE_LBN 4
8657 #define QUEUE_CRC_MODE_SPARE_WIDTH 4
8663 * arguments end with an address for each 4k of host memory required to back
8678 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_NUM(len) (((len)-28)/8)
8681 #define MC_CMD_INIT_RXQ_IN_SIZE_LEN 4
8684 #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_OFST 4
8685 #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_LEN 4
8688 #define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
8693 #define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
8696 #define MC_CMD_INIT_RXQ_IN_FLAGS_LEN 4
8699 #define MC_CMD_INIT_RXQ_IN_FLAG_BUFF_MODE_WIDTH 1
8701 #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_LBN 1
8702 #define MC_CMD_INIT_RXQ_IN_FLAG_HDR_SPLIT_WIDTH 1
8705 #define MC_CMD_INIT_RXQ_IN_FLAG_TIMESTAMP_WIDTH 1
8708 #define MC_CMD_INIT_RXQ_IN_CRC_MODE_WIDTH 4
8711 #define MC_CMD_INIT_RXQ_IN_FLAG_CHAIN_WIDTH 1
8714 #define MC_CMD_INIT_RXQ_IN_FLAG_PREFIX_WIDTH 1
8717 #define MC_CMD_INIT_RXQ_IN_FLAG_DISABLE_SCATTER_WIDTH 1
8720 #define MC_CMD_INIT_RXQ_IN_UNUSED_WIDTH 1
8723 #define MC_CMD_INIT_RXQ_IN_OWNER_ID_LEN 4
8724 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
8726 #define MC_CMD_INIT_RXQ_IN_PORT_ID_LEN 4
8727 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8732 #define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
8742 #define MC_CMD_INIT_RXQ_EXT_IN_SIZE_LEN 4
8746 #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_OFST 4
8747 #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_LEN 4
8753 #define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
8758 #define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
8761 #define MC_CMD_INIT_RXQ_EXT_IN_FLAGS_LEN 4
8764 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH 1
8766 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_LBN 1
8767 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT_WIDTH 1
8770 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH 1
8773 #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_WIDTH 4
8776 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_CHAIN_WIDTH 1
8779 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_PREFIX_WIDTH 1
8782 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER_WIDTH 1
8785 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_WIDTH 4
8791 * to maximise packet rate. This mode uses 1 "bucket" per descriptor with
8792 * multiple fixed-size packet buffers within each bucket. For a full
8793 * description see SF-119419-TC. This mode is only supported by "dpdk" datapath
8801 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_SNAPSHOT_MODE_WIDTH 1
8812 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
8815 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
8818 #define MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_WIDTH 1
8821 #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN 4
8822 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
8824 #define MC_CMD_INIT_RXQ_EXT_IN_PORT_ID_LEN 4
8825 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8833 #define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_LEN 4
8839 #define MC_CMD_INIT_RXQ_V3_IN_SIZE_LEN 4
8843 #define MC_CMD_INIT_RXQ_V3_IN_TARGET_EVQ_OFST 4
8844 #define MC_CMD_INIT_RXQ_V3_IN_TARGET_EVQ_LEN 4
8850 #define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
8855 #define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
8858 #define MC_CMD_INIT_RXQ_V3_IN_FLAGS_LEN 4
8861 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_BUFF_MODE_WIDTH 1
8863 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_HDR_SPLIT_LBN 1
8864 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_HDR_SPLIT_WIDTH 1
8867 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_TIMESTAMP_WIDTH 1
8870 #define MC_CMD_INIT_RXQ_V3_IN_CRC_MODE_WIDTH 4
8873 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_CHAIN_WIDTH 1
8876 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_PREFIX_WIDTH 1
8879 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_DISABLE_SCATTER_WIDTH 1
8882 #define MC_CMD_INIT_RXQ_V3_IN_DMA_MODE_WIDTH 4
8888 * to maximise packet rate. This mode uses 1 "bucket" per descriptor with
8889 * multiple fixed-size packet buffers within each bucket. For a full
8890 * description see SF-119419-TC. This mode is only supported by "dpdk" datapath
8898 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_SNAPSHOT_MODE_WIDTH 1
8909 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
8912 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
8915 #define MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_WIDTH 1
8918 #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN 4
8919 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
8921 #define MC_CMD_INIT_RXQ_V3_IN_PORT_ID_LEN 4
8922 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8930 #define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_LEN 4
8936 #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
8943 #define MC_CMD_INIT_RXQ_V3_IN_ES_MAX_DMA_LEN_LEN 4
8949 #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_STRIDE_LEN 4
8957 #define MC_CMD_INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
8965 #define MC_CMD_INIT_RXQ_V4_IN_SIZE_LEN 4
8969 #define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_OFST 4
8970 #define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_LEN 4
8976 #define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
8981 #define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
8984 #define MC_CMD_INIT_RXQ_V4_IN_FLAGS_LEN 4
8987 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_BUFF_MODE_WIDTH 1
8989 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_LBN 1
8990 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_HDR_SPLIT_WIDTH 1
8993 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_TIMESTAMP_WIDTH 1
8996 #define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_WIDTH 4
8999 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_CHAIN_WIDTH 1
9002 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_PREFIX_WIDTH 1
9005 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_DISABLE_SCATTER_WIDTH 1
9008 #define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_WIDTH 4
9014 * to maximise packet rate. This mode uses 1 "bucket" per descriptor with
9015 * multiple fixed-size packet buffers within each bucket. For a full
9016 * description see SF-119419-TC. This mode is only supported by "dpdk" datapath
9024 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_SNAPSHOT_MODE_WIDTH 1
9035 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
9038 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
9041 #define MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_WIDTH 1
9044 #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN 4
9045 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
9047 #define MC_CMD_INIT_RXQ_V4_IN_PORT_ID_LEN 4
9048 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9056 #define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_LEN 4
9062 #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
9069 #define MC_CMD_INIT_RXQ_V4_IN_ES_MAX_DMA_LEN_LEN 4
9075 #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_STRIDE_LEN 4
9083 #define MC_CMD_INIT_RXQ_V4_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
9086 #define MC_CMD_INIT_RXQ_V4_IN_V4_DATA_LEN 4
9088 * to zero if using this message on non-QDMA based platforms. Currently in
9090 * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a
9096 #define MC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_LEN 4
9104 #define MC_CMD_INIT_RXQ_V5_IN_SIZE_LEN 4
9108 #define MC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_OFST 4
9109 #define MC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_LEN 4
9115 #define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
9120 #define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
9123 #define MC_CMD_INIT_RXQ_V5_IN_FLAGS_LEN 4
9126 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_BUFF_MODE_WIDTH 1
9128 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_LBN 1
9129 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_HDR_SPLIT_WIDTH 1
9132 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_TIMESTAMP_WIDTH 1
9135 #define MC_CMD_INIT_RXQ_V5_IN_CRC_MODE_WIDTH 4
9138 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_CHAIN_WIDTH 1
9141 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_PREFIX_WIDTH 1
9144 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_DISABLE_SCATTER_WIDTH 1
9147 #define MC_CMD_INIT_RXQ_V5_IN_DMA_MODE_WIDTH 4
9153 * to maximise packet rate. This mode uses 1 "bucket" per descriptor with
9154 * multiple fixed-size packet buffers within each bucket. For a full
9155 * description see SF-119419-TC. This mode is only supported by "dpdk" datapath
9163 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_SNAPSHOT_MODE_WIDTH 1
9174 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_WANT_OUTER_CLASSES_WIDTH 1
9177 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_FORCE_EV_MERGING_WIDTH 1
9180 #define MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_WIDTH 1
9183 #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN 4
9184 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
9186 #define MC_CMD_INIT_RXQ_V5_IN_PORT_ID_LEN 4
9187 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9195 #define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_LEN 4
9201 #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
9208 #define MC_CMD_INIT_RXQ_V5_IN_ES_MAX_DMA_LEN_LEN 4
9214 #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_STRIDE_LEN 4
9222 #define MC_CMD_INIT_RXQ_V5_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
9225 #define MC_CMD_INIT_RXQ_V5_IN_V4_DATA_LEN 4
9227 * to zero if using this message on non-QDMA based platforms. Currently in
9229 * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a
9235 #define MC_CMD_INIT_RXQ_V5_IN_BUFFER_SIZE_BYTES_LEN 4
9242 #define MC_CMD_INIT_RXQ_V5_IN_RX_PREFIX_ID_LEN 4
9275 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_NUM(len) (((len)-28)/8)
9278 #define MC_CMD_INIT_TXQ_IN_SIZE_LEN 4
9282 #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_OFST 4
9283 #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_LEN 4
9286 #define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
9291 #define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
9294 #define MC_CMD_INIT_TXQ_IN_FLAGS_LEN 4
9297 #define MC_CMD_INIT_TXQ_IN_FLAG_BUFF_MODE_WIDTH 1
9299 #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_LBN 1
9300 #define MC_CMD_INIT_TXQ_IN_FLAG_IP_CSUM_DIS_WIDTH 1
9303 #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_CSUM_DIS_WIDTH 1
9306 #define MC_CMD_INIT_TXQ_IN_FLAG_TCP_UDP_ONLY_WIDTH 1
9308 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_LBN 4
9309 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_WIDTH 4
9312 #define MC_CMD_INIT_TXQ_IN_FLAG_TIMESTAMP_WIDTH 1
9315 #define MC_CMD_INIT_TXQ_IN_FLAG_PACER_BYPASS_WIDTH 1
9318 #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_IP_CSUM_EN_WIDTH 1
9321 #define MC_CMD_INIT_TXQ_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH 1
9324 #define MC_CMD_INIT_TXQ_IN_OWNER_ID_LEN 4
9325 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
9327 #define MC_CMD_INIT_TXQ_IN_PORT_ID_LEN 4
9328 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9333 #define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
9343 #define MC_CMD_INIT_TXQ_EXT_IN_SIZE_LEN 4
9347 #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_OFST 4
9348 #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_LEN 4
9351 #define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
9356 #define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
9359 #define MC_CMD_INIT_TXQ_EXT_IN_FLAGS_LEN 4
9362 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_BUFF_MODE_WIDTH 1
9364 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_LBN 1
9365 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_IP_CSUM_DIS_WIDTH 1
9368 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_CSUM_DIS_WIDTH 1
9371 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TCP_UDP_ONLY_WIDTH 1
9373 #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_LBN 4
9374 #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_WIDTH 4
9377 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TIMESTAMP_WIDTH 1
9380 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_PACER_BYPASS_WIDTH 1
9383 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN_WIDTH 1
9386 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN_WIDTH 1
9389 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_TSOV2_EN_WIDTH 1
9392 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_WIDTH 1
9395 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_CTPIO_UTHRESH_WIDTH 1
9398 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_M2M_D2C_WIDTH 1
9401 #define MC_CMD_INIT_TXQ_EXT_IN_FLAG_DESC_PROXY_WIDTH 1
9404 #define MC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_LEN 4
9405 /* The port ID associated with the v-adaptor which should contain this DMAQ. */
9407 #define MC_CMD_INIT_TXQ_EXT_IN_PORT_ID_LEN 4
9408 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9413 #define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
9418 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_LEN 4
9421 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_ENABLE_WIDTH 1
9423 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_PRIORITY_LBN 1
9443 #define MC_CMD_FINI_EVQ_IN_LEN 4
9448 #define MC_CMD_FINI_EVQ_IN_INSTANCE_LEN 4
9464 #define MC_CMD_FINI_RXQ_IN_LEN 4
9467 #define MC_CMD_FINI_RXQ_IN_INSTANCE_LEN 4
9483 #define MC_CMD_FINI_TXQ_IN_LEN 4
9486 #define MC_CMD_FINI_TXQ_IN_INSTANCE_LEN 4
9505 #define MC_CMD_DRIVER_EVENT_IN_EVQ_LEN 4
9506 /* Bits 0 - 63 of event */
9507 #define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
9509 #define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
9531 #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_LEN 4
9535 #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST 4
9536 #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_LEN 4
9541 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_LEN 4
9542 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST 4
9543 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_LEN 4
9546 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_LEN 4
9563 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_NUM(len) (((len)-12)/8)
9565 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4
9567 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST 4
9568 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4
9571 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4
9577 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
9594 #define MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN 4
9596 #define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_LEN 4
9615 #define MC_CMD_FILTER_OP_IN_OP_LEN 4
9616 /* enum: single-recipient filter insert */
9618 /* enum: single-recipient filter remove */
9620 /* enum: multi-recipient filter subscribe */
9622 /* enum: multi-recipient filter unsubscribe */
9624 /* enum: replace one recipient with another (warning - the filter handle may
9629 #define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
9631 #define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
9633 /* The port ID associated with the v-adaptor which should contain this filter.
9636 #define MC_CMD_FILTER_OP_IN_PORT_ID_LEN 4
9639 #define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_LEN 4
9642 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_IP_WIDTH 1
9644 #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_LBN 1
9645 #define MC_CMD_FILTER_OP_IN_MATCH_DST_IP_WIDTH 1
9648 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_MAC_WIDTH 1
9651 #define MC_CMD_FILTER_OP_IN_MATCH_SRC_PORT_WIDTH 1
9653 #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_LBN 4
9654 #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_WIDTH 1
9657 #define MC_CMD_FILTER_OP_IN_MATCH_DST_PORT_WIDTH 1
9660 #define MC_CMD_FILTER_OP_IN_MATCH_ETHER_TYPE_WIDTH 1
9663 #define MC_CMD_FILTER_OP_IN_MATCH_INNER_VLAN_WIDTH 1
9666 #define MC_CMD_FILTER_OP_IN_MATCH_OUTER_VLAN_WIDTH 1
9669 #define MC_CMD_FILTER_OP_IN_MATCH_IP_PROTO_WIDTH 1
9672 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF0_WIDTH 1
9675 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_WIDTH 1
9678 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1
9681 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1
9684 #define MC_CMD_FILTER_OP_IN_RX_DEST_LEN 4
9693 /* enum: loop back to TXDP 1 */
9697 #define MC_CMD_FILTER_OP_IN_RX_QUEUE_LEN 4
9700 #define MC_CMD_FILTER_OP_IN_RX_MODE_LEN 4
9705 /* enum: receive to multiple queues using .1p mapping */
9710 /* RSS context (for RX_MODE_RSS) or .1p mapping handle (for
9715 #define MC_CMD_FILTER_OP_IN_RX_CONTEXT_LEN 4
9718 #define MC_CMD_FILTER_OP_IN_TX_DOMAIN_LEN 4
9724 #define MC_CMD_FILTER_OP_IN_TX_DEST_LEN 4
9729 #define MC_CMD_FILTER_OP_IN_TX_DEST_MAC_WIDTH 1
9731 #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_LBN 1
9732 #define MC_CMD_FILTER_OP_IN_TX_DEST_PM_WIDTH 1
9759 #define MC_CMD_FILTER_OP_IN_FWDEF0_LEN 4
9760 /* Firmware defined register 1 to match (reserved; set to 0) */
9762 #define MC_CMD_FILTER_OP_IN_FWDEF1_LEN 4
9781 #define MC_CMD_FILTER_OP_EXT_IN_OP_LEN 4
9785 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
9787 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
9789 /* The port ID associated with the v-adaptor which should contain this filter.
9792 #define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_LEN 4
9795 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FIELDS_LEN 4
9798 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_IP_WIDTH 1
9800 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_LBN 1
9801 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_IP_WIDTH 1
9804 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_MAC_WIDTH 1
9807 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_SRC_PORT_WIDTH 1
9809 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_LBN 4
9810 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_WIDTH 1
9813 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_PORT_WIDTH 1
9816 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_ETHER_TYPE_WIDTH 1
9819 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_INNER_VLAN_WIDTH 1
9822 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_OUTER_VLAN_WIDTH 1
9825 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IP_PROTO_WIDTH 1
9828 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FWDEF0_WIDTH 1
9831 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_VNI_OR_VSID_WIDTH 1
9834 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_IP_WIDTH 1
9837 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_IP_WIDTH 1
9840 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_MAC_WIDTH 1
9843 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_SRC_PORT_WIDTH 1
9846 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_MAC_WIDTH 1
9849 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_DST_PORT_WIDTH 1
9852 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_ETHER_TYPE_WIDTH 1
9855 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_INNER_VLAN_WIDTH 1
9858 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_OUTER_VLAN_WIDTH 1
9861 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_IP_PROTO_WIDTH 1
9864 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF0_WIDTH 1
9867 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_FWDEF1_WIDTH 1
9870 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_WIDTH 1
9873 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1
9876 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1
9879 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1
9882 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_LEN 4
9891 /* enum: loop back to TXDP 1 */
9895 #define MC_CMD_FILTER_OP_EXT_IN_RX_QUEUE_LEN 4
9898 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_LEN 4
9903 /* enum: receive to multiple queues using .1p mapping */
9908 /* RSS context (for RX_MODE_RSS) or .1p mapping handle (for
9913 #define MC_CMD_FILTER_OP_EXT_IN_RX_CONTEXT_LEN 4
9916 #define MC_CMD_FILTER_OP_EXT_IN_TX_DOMAIN_LEN 4
9922 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_LEN 4
9927 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_MAC_WIDTH 1
9929 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_LBN 1
9930 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_PM_WIDTH 1
9957 #define MC_CMD_FILTER_OP_EXT_IN_FWDEF0_LEN 4
9960 * VXLAN/NVGRE, or 1 for Geneve)
9963 #define MC_CMD_FILTER_OP_EXT_IN_VNI_OR_VSID_LEN 4
10033 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF0_LEN 4
10034 /* VXLAN/NVGRE inner frame Firmware defined register 1 to match (reserved; set
10038 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF1_LEN 4
10059 #define MC_CMD_FILTER_OP_V3_IN_OP_LEN 4
10063 #define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
10065 #define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
10067 /* The port ID associated with the v-adaptor which should contain this filter.
10070 #define MC_CMD_FILTER_OP_V3_IN_PORT_ID_LEN 4
10073 #define MC_CMD_FILTER_OP_V3_IN_MATCH_FIELDS_LEN 4
10076 #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_IP_WIDTH 1
10078 #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_IP_LBN 1
10079 #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_IP_WIDTH 1
10082 #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_MAC_WIDTH 1
10085 #define MC_CMD_FILTER_OP_V3_IN_MATCH_SRC_PORT_WIDTH 1
10087 #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_MAC_LBN 4
10088 #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_MAC_WIDTH 1
10091 #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_PORT_WIDTH 1
10094 #define MC_CMD_FILTER_OP_V3_IN_MATCH_ETHER_TYPE_WIDTH 1
10097 #define MC_CMD_FILTER_OP_V3_IN_MATCH_INNER_VLAN_WIDTH 1
10100 #define MC_CMD_FILTER_OP_V3_IN_MATCH_OUTER_VLAN_WIDTH 1
10103 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IP_PROTO_WIDTH 1
10106 #define MC_CMD_FILTER_OP_V3_IN_MATCH_FWDEF0_WIDTH 1
10109 #define MC_CMD_FILTER_OP_V3_IN_MATCH_VNI_OR_VSID_WIDTH 1
10112 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_IP_WIDTH 1
10115 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_IP_WIDTH 1
10118 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_MAC_WIDTH 1
10121 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_SRC_PORT_WIDTH 1
10124 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_MAC_WIDTH 1
10127 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_DST_PORT_WIDTH 1
10130 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_ETHER_TYPE_WIDTH 1
10133 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_INNER_VLAN_WIDTH 1
10136 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_OUTER_VLAN_WIDTH 1
10139 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_IP_PROTO_WIDTH 1
10142 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF0_WIDTH 1
10145 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_FWDEF1_WIDTH 1
10148 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_MCAST_DST_WIDTH 1
10151 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1
10154 #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1
10157 #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_UCAST_DST_WIDTH 1
10160 #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_LEN 4
10169 /* enum: loop back to TXDP 1 */
10173 #define MC_CMD_FILTER_OP_V3_IN_RX_QUEUE_LEN 4
10176 #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_LEN 4
10181 /* enum: receive to multiple queues using .1p mapping */
10186 /* RSS context (for RX_MODE_RSS) or .1p mapping handle (for
10191 #define MC_CMD_FILTER_OP_V3_IN_RX_CONTEXT_LEN 4
10194 #define MC_CMD_FILTER_OP_V3_IN_TX_DOMAIN_LEN 4
10200 #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_LEN 4
10205 #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_MAC_WIDTH 1
10207 #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_PM_LBN 1
10208 #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_PM_WIDTH 1
10235 #define MC_CMD_FILTER_OP_V3_IN_FWDEF0_LEN 4
10238 * VXLAN/NVGRE, or 1 for Geneve)
10241 #define MC_CMD_FILTER_OP_V3_IN_VNI_OR_VSID_LEN 4
10311 #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF0_LEN 4
10312 /* VXLAN/NVGRE inner frame Firmware defined register 1 to match (reserved; set
10316 #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF1_LEN 4
10329 * in the DPDK Firmware Driver Interface (SF-119419-TC). Requesting anything
10334 #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_LEN 4
10352 #define MC_CMD_FILTER_OP_V3_IN_MATCH_MARK_VALUE_LEN 4
10358 #define MC_CMD_FILTER_OP_OUT_OP_LEN 4
10365 #define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
10367 #define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
10378 #define MC_CMD_FILTER_OP_EXT_OUT_OP_LEN 4
10385 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
10387 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
10395 * Get information related to the parser-dispatcher subsystem
10403 #define MC_CMD_GET_PARSER_DISP_INFO_IN_LEN 4
10406 #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_LEN 4
10413 /* enum: read properties relating to security rules (Medford-only; for use by
10414 * SolarSecure apps, not directly by drivers. See SF-114946-SW.)
10431 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(num) (8+4*(num))
10432 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_NUM(len) (((len)-8)/4)
10435 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_OP_LEN 4
10439 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_OFST 4
10440 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_LEN 4
10445 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_LEN 4
10454 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_OP_LEN 4
10458 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_OFST 4
10459 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_LEN 4
10460 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_OFST 4
10462 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_WIDTH 1
10473 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_LEN(num) (8+4*(num))
10474 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_NUM(len) (((len)-8)/4)
10477 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_OP_LEN 4
10481 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_NUM_SUPPORTED_MATCHES_OFST 4
10482 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_NUM_SUPPORTED_MATCHES_LEN 4
10487 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_LEN 4
10506 #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN 4
10509 #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_PORT_LEN 4
10522 #define MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN 4
10525 #define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_LEN 4
10544 #define MC_CMD_ALLOC_VIS_IN_MIN_VI_COUNT_LEN 4
10546 #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_OFST 4
10547 #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_LEN 4
10549 /* MC_CMD_ALLOC_VIS_OUT msgresponse: Huntington-compatible VI_ALLOC request.
10555 #define MC_CMD_ALLOC_VIS_OUT_VI_COUNT_LEN 4
10559 #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_OFST 4
10560 #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_LEN 4
10566 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_COUNT_LEN 4
10570 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_OFST 4
10571 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_LEN 4
10574 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_SHIFT_LEN 4
10610 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_CURRENT_LEN 4
10612 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_OFST 4
10613 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_LEN 4
10615 #define MC_CMD_GET_SRIOV_CFG_OUT_FLAGS_LEN 4
10618 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_ENABLED_WIDTH 1
10621 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_OFFSET_LEN 4
10624 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_LEN 4
10640 #define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_LEN 4
10642 #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST 4
10643 #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_LEN 4
10645 #define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_LEN 4
10648 #define MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_WIDTH 1
10653 #define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_LEN 4
10658 #define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_LEN 4
10681 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_LEN 4
10685 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST 4
10686 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_LEN 4
10689 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_LEN 4
10702 #define MC_CMD_DUMP_VI_STATE_IN_LEN 4
10705 #define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
10716 #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST 4
10739 #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
10831 #define MC_CMD_ALLOC_PIOBUF_OUT_LEN 4
10834 #define MC_CMD_ALLOC_PIOBUF_OUT_PIOBUF_HANDLE_LEN 4
10847 #define MC_CMD_FREE_PIOBUF_IN_LEN 4
10850 #define MC_CMD_FREE_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
10875 #define MC_CMD_GET_CAPABILITIES_OUT_FLAGS1_LEN 4
10878 #define MC_CMD_GET_CAPABILITIES_OUT_VPORT_RECONFIGURE_WIDTH 1
10880 #define MC_CMD_GET_CAPABILITIES_OUT_TX_STRIPING_LBN 4
10881 #define MC_CMD_GET_CAPABILITIES_OUT_TX_STRIPING_WIDTH 1
10884 #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_QUERY_WIDTH 1
10887 #define MC_CMD_GET_CAPABILITIES_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
10890 #define MC_CMD_GET_CAPABILITIES_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
10893 #define MC_CMD_GET_CAPABILITIES_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
10896 #define MC_CMD_GET_CAPABILITIES_OUT_SET_MAC_ENHANCED_WIDTH 1
10899 #define MC_CMD_GET_CAPABILITIES_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
10902 #define MC_CMD_GET_CAPABILITIES_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
10905 #define MC_CMD_GET_CAPABILITIES_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
10908 #define MC_CMD_GET_CAPABILITIES_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
10911 #define MC_CMD_GET_CAPABILITIES_OUT_QBB_WIDTH 1
10914 #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
10917 #define MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_WIDTH 1
10920 #define MC_CMD_GET_CAPABILITIES_OUT_RX_PACKED_STREAM_WIDTH 1
10923 #define MC_CMD_GET_CAPABILITIES_OUT_RX_INCLUDE_FCS_WIDTH 1
10926 #define MC_CMD_GET_CAPABILITIES_OUT_TX_VLAN_INSERTION_WIDTH 1
10929 #define MC_CMD_GET_CAPABILITIES_OUT_RX_VLAN_STRIPPING_WIDTH 1
10932 #define MC_CMD_GET_CAPABILITIES_OUT_TX_TSO_WIDTH 1
10935 #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_0_WIDTH 1
10938 #define MC_CMD_GET_CAPABILITIES_OUT_RX_PREFIX_LEN_14_WIDTH 1
10941 #define MC_CMD_GET_CAPABILITIES_OUT_RX_TIMESTAMP_WIDTH 1
10944 #define MC_CMD_GET_CAPABILITIES_OUT_RX_BATCHING_WIDTH 1
10947 #define MC_CMD_GET_CAPABILITIES_OUT_MCAST_FILTER_CHAINING_WIDTH 1
10950 #define MC_CMD_GET_CAPABILITIES_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
10953 #define MC_CMD_GET_CAPABILITIES_OUT_RX_DISABLE_SCATTER_WIDTH 1
10956 #define MC_CMD_GET_CAPABILITIES_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
10959 #define MC_CMD_GET_CAPABILITIES_OUT_EVB_WIDTH 1
10962 #define MC_CMD_GET_CAPABILITIES_OUT_VXLAN_NVGRE_WIDTH 1
10964 #define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_OFST 4
10978 /* enum: RXDP Test firmware image 1 */
10984 /* enum: RXDP Test firmware image 4 */
11013 /* enum: TXDP Test firmware image 1 */
11026 #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
11027 /* enum: reserved value - do not use (may indicate alternative interpretation
11038 /* enum: RX PD firmware with approximately Siena-compatible behaviour
11060 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
11077 #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
11078 /* enum: reserved value - do not use (may indicate alternative interpretation
11089 /* enum: TX PD firmware with approximately Siena-compatible behaviour
11108 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
11116 #define MC_CMD_GET_CAPABILITIES_OUT_HW_CAPABILITIES_LEN 4
11119 #define MC_CMD_GET_CAPABILITIES_OUT_LICENSE_CAPABILITIES_LEN 4
11128 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS1_LEN 4
11131 #define MC_CMD_GET_CAPABILITIES_V2_OUT_VPORT_RECONFIGURE_WIDTH 1
11133 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_STRIPING_LBN 4
11134 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_STRIPING_WIDTH 1
11137 #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_QUERY_WIDTH 1
11140 #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
11143 #define MC_CMD_GET_CAPABILITIES_V2_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
11146 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
11149 #define MC_CMD_GET_CAPABILITIES_V2_OUT_SET_MAC_ENHANCED_WIDTH 1
11152 …efine MC_CMD_GET_CAPABILITIES_V2_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
11155 #define MC_CMD_GET_CAPABILITIES_V2_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
11158 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
11161 #define MC_CMD_GET_CAPABILITIES_V2_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
11164 #define MC_CMD_GET_CAPABILITIES_V2_OUT_QBB_WIDTH 1
11167 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
11170 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_RSS_LIMITED_WIDTH 1
11173 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PACKED_STREAM_WIDTH 1
11176 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_INCLUDE_FCS_WIDTH 1
11179 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VLAN_INSERTION_WIDTH 1
11182 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_VLAN_STRIPPING_WIDTH 1
11185 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_WIDTH 1
11188 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_0_WIDTH 1
11191 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_PREFIX_LEN_14_WIDTH 1
11194 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_TIMESTAMP_WIDTH 1
11197 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_BATCHING_WIDTH 1
11200 #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCAST_FILTER_CHAINING_WIDTH 1
11203 #define MC_CMD_GET_CAPABILITIES_V2_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
11206 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DISABLE_SCATTER_WIDTH 1
11209 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
11212 #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVB_WIDTH 1
11215 #define MC_CMD_GET_CAPABILITIES_V2_OUT_VXLAN_NVGRE_WIDTH 1
11217 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DPCPU_FW_ID_OFST 4
11231 /* enum: RXDP Test firmware image 1 */
11237 /* enum: RXDP Test firmware image 4 */
11266 /* enum: TXDP Test firmware image 1 */
11279 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
11280 /* enum: reserved value - do not use (may indicate alternative interpretation
11291 /* enum: RX PD firmware with approximately Siena-compatible behaviour
11313 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
11330 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
11331 /* enum: reserved value - do not use (may indicate alternative interpretation
11342 /* enum: TX PD firmware with approximately Siena-compatible behaviour
11361 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
11369 #define MC_CMD_GET_CAPABILITIES_V2_OUT_HW_CAPABILITIES_LEN 4
11372 #define MC_CMD_GET_CAPABILITIES_V2_OUT_LICENSE_CAPABILITIES_LEN 4
11375 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS2_LEN 4
11378 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_WIDTH 1
11380 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_ENCAP_LBN 1
11381 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V2_ENCAP_WIDTH 1
11384 #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVQ_TIMER_CTRL_WIDTH 1
11387 #define MC_CMD_GET_CAPABILITIES_V2_OUT_EVENT_CUT_THROUGH_WIDTH 1
11389 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_CUT_THROUGH_LBN 4
11390 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_CUT_THROUGH_WIDTH 1
11393 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
11396 #define MC_CMD_GET_CAPABILITIES_V2_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
11399 #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
11402 #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_EVQ_V2_WIDTH 1
11405 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
11408 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TIMESTAMP_WIDTH 1
11411 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_SNIFF_WIDTH 1
11414 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_SNIFF_WIDTH 1
11417 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
11420 #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_BACKGROUND_WIDTH 1
11423 #define MC_CMD_GET_CAPABILITIES_V2_OUT_MCDI_DB_RETURN_WIDTH 1
11426 #define MC_CMD_GET_CAPABILITIES_V2_OUT_CTPIO_WIDTH 1
11429 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_SUPPORT_WIDTH 1
11432 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TSA_BOUND_WIDTH 1
11435 #define MC_CMD_GET_CAPABILITIES_V2_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
11438 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_FLAG_WIDTH 1
11441 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FILTER_ACTION_MARK_WIDTH 1
11444 #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
11447 #define MC_CMD_GET_CAPABILITIES_V2_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
11450 #define MC_CMD_GET_CAPABILITIES_V2_OUT_L3XUDP_SUPPORT_WIDTH 1
11453 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
11456 #define MC_CMD_GET_CAPABILITIES_V2_OUT_VI_SPREADING_WIDTH 1
11459 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXDP_HLB_IDLE_WIDTH 1
11462 #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
11465 #define MC_CMD_GET_CAPABILITIES_V2_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
11468 #define MC_CMD_GET_CAPABILITIES_V2_OUT_BUNDLE_UPDATE_WIDTH 1
11471 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_TSO_V3_WIDTH 1
11474 #define MC_CMD_GET_CAPABILITIES_V2_OUT_DYNAMIC_SENSORS_WIDTH 1
11477 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
11479 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
11488 #define MC_CMD_GET_CAPABILITIES_V2_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
11507 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VFS_PER_PF_LEN 1
11516 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_NUM 4
11521 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DESC_CACHE_SIZE_LEN 1
11526 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_DESC_CACHE_SIZE_LEN 1
11538 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS1_LEN 4
11541 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VPORT_RECONFIGURE_WIDTH 1
11543 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_STRIPING_LBN 4
11544 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_STRIPING_WIDTH 1
11547 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_QUERY_WIDTH 1
11550 #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
11553 #define MC_CMD_GET_CAPABILITIES_V3_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
11556 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
11559 #define MC_CMD_GET_CAPABILITIES_V3_OUT_SET_MAC_ENHANCED_WIDTH 1
11562 …efine MC_CMD_GET_CAPABILITIES_V3_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
11565 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
11568 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
11571 #define MC_CMD_GET_CAPABILITIES_V3_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
11574 #define MC_CMD_GET_CAPABILITIES_V3_OUT_QBB_WIDTH 1
11577 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
11580 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_RSS_LIMITED_WIDTH 1
11583 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PACKED_STREAM_WIDTH 1
11586 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_INCLUDE_FCS_WIDTH 1
11589 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VLAN_INSERTION_WIDTH 1
11592 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_VLAN_STRIPPING_WIDTH 1
11595 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_WIDTH 1
11598 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_0_WIDTH 1
11601 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_PREFIX_LEN_14_WIDTH 1
11604 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_TIMESTAMP_WIDTH 1
11607 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_BATCHING_WIDTH 1
11610 #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCAST_FILTER_CHAINING_WIDTH 1
11613 #define MC_CMD_GET_CAPABILITIES_V3_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
11616 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DISABLE_SCATTER_WIDTH 1
11619 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
11622 #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVB_WIDTH 1
11625 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VXLAN_NVGRE_WIDTH 1
11627 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DPCPU_FW_ID_OFST 4
11641 /* enum: RXDP Test firmware image 1 */
11647 /* enum: RXDP Test firmware image 4 */
11676 /* enum: TXDP Test firmware image 1 */
11689 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
11690 /* enum: reserved value - do not use (may indicate alternative interpretation
11701 /* enum: RX PD firmware with approximately Siena-compatible behaviour
11723 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
11740 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
11741 /* enum: reserved value - do not use (may indicate alternative interpretation
11752 /* enum: TX PD firmware with approximately Siena-compatible behaviour
11771 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
11779 #define MC_CMD_GET_CAPABILITIES_V3_OUT_HW_CAPABILITIES_LEN 4
11782 #define MC_CMD_GET_CAPABILITIES_V3_OUT_LICENSE_CAPABILITIES_LEN 4
11785 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS2_LEN 4
11788 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_WIDTH 1
11790 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_ENCAP_LBN 1
11791 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V2_ENCAP_WIDTH 1
11794 #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVQ_TIMER_CTRL_WIDTH 1
11797 #define MC_CMD_GET_CAPABILITIES_V3_OUT_EVENT_CUT_THROUGH_WIDTH 1
11799 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_CUT_THROUGH_LBN 4
11800 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_CUT_THROUGH_WIDTH 1
11803 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
11806 #define MC_CMD_GET_CAPABILITIES_V3_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
11809 #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
11812 #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_EVQ_V2_WIDTH 1
11815 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
11818 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TIMESTAMP_WIDTH 1
11821 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_SNIFF_WIDTH 1
11824 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_SNIFF_WIDTH 1
11827 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
11830 #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_BACKGROUND_WIDTH 1
11833 #define MC_CMD_GET_CAPABILITIES_V3_OUT_MCDI_DB_RETURN_WIDTH 1
11836 #define MC_CMD_GET_CAPABILITIES_V3_OUT_CTPIO_WIDTH 1
11839 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_SUPPORT_WIDTH 1
11842 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TSA_BOUND_WIDTH 1
11845 #define MC_CMD_GET_CAPABILITIES_V3_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
11848 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_FLAG_WIDTH 1
11851 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FILTER_ACTION_MARK_WIDTH 1
11854 #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
11857 #define MC_CMD_GET_CAPABILITIES_V3_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
11860 #define MC_CMD_GET_CAPABILITIES_V3_OUT_L3XUDP_SUPPORT_WIDTH 1
11863 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
11866 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_SPREADING_WIDTH 1
11869 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXDP_HLB_IDLE_WIDTH 1
11872 #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
11875 #define MC_CMD_GET_CAPABILITIES_V3_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
11878 #define MC_CMD_GET_CAPABILITIES_V3_OUT_BUNDLE_UPDATE_WIDTH 1
11881 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_TSO_V3_WIDTH 1
11884 #define MC_CMD_GET_CAPABILITIES_V3_OUT_DYNAMIC_SENSORS_WIDTH 1
11887 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
11889 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
11898 #define MC_CMD_GET_CAPABILITIES_V3_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
11917 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VFS_PER_PF_LEN 1
11926 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_NUM 4
11931 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DESC_CACHE_SIZE_LEN 1
11936 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_DESC_CACHE_SIZE_LEN 1
11945 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
11949 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VI_WINDOW_MODE_LEN 1
11950 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
11954 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
11956 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
11959 * (SF-115995-SW) in the present configuration of firmware and port mode.
11962 #define MC_CMD_GET_CAPABILITIES_V3_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
11964 * (SF-115995-SW) in the present configuration of firmware and port mode.
11973 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS1_LEN 4
11976 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VPORT_RECONFIGURE_WIDTH 1
11978 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_STRIPING_LBN 4
11979 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_STRIPING_WIDTH 1
11982 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_QUERY_WIDTH 1
11985 #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
11988 #define MC_CMD_GET_CAPABILITIES_V4_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
11991 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
11994 #define MC_CMD_GET_CAPABILITIES_V4_OUT_SET_MAC_ENHANCED_WIDTH 1
11997 …efine MC_CMD_GET_CAPABILITIES_V4_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
12000 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
12003 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
12006 #define MC_CMD_GET_CAPABILITIES_V4_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
12009 #define MC_CMD_GET_CAPABILITIES_V4_OUT_QBB_WIDTH 1
12012 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
12015 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_RSS_LIMITED_WIDTH 1
12018 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PACKED_STREAM_WIDTH 1
12021 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_INCLUDE_FCS_WIDTH 1
12024 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VLAN_INSERTION_WIDTH 1
12027 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_VLAN_STRIPPING_WIDTH 1
12030 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_WIDTH 1
12033 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_0_WIDTH 1
12036 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_PREFIX_LEN_14_WIDTH 1
12039 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_TIMESTAMP_WIDTH 1
12042 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_BATCHING_WIDTH 1
12045 #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCAST_FILTER_CHAINING_WIDTH 1
12048 #define MC_CMD_GET_CAPABILITIES_V4_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
12051 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DISABLE_SCATTER_WIDTH 1
12054 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
12057 #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVB_WIDTH 1
12060 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VXLAN_NVGRE_WIDTH 1
12062 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DPCPU_FW_ID_OFST 4
12076 /* enum: RXDP Test firmware image 1 */
12082 /* enum: RXDP Test firmware image 4 */
12111 /* enum: TXDP Test firmware image 1 */
12124 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
12125 /* enum: reserved value - do not use (may indicate alternative interpretation
12136 /* enum: RX PD firmware with approximately Siena-compatible behaviour
12158 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
12175 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
12176 /* enum: reserved value - do not use (may indicate alternative interpretation
12187 /* enum: TX PD firmware with approximately Siena-compatible behaviour
12206 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
12214 #define MC_CMD_GET_CAPABILITIES_V4_OUT_HW_CAPABILITIES_LEN 4
12217 #define MC_CMD_GET_CAPABILITIES_V4_OUT_LICENSE_CAPABILITIES_LEN 4
12220 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS2_LEN 4
12223 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_WIDTH 1
12225 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_ENCAP_LBN 1
12226 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V2_ENCAP_WIDTH 1
12229 #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVQ_TIMER_CTRL_WIDTH 1
12232 #define MC_CMD_GET_CAPABILITIES_V4_OUT_EVENT_CUT_THROUGH_WIDTH 1
12234 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_CUT_THROUGH_LBN 4
12235 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_CUT_THROUGH_WIDTH 1
12238 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
12241 #define MC_CMD_GET_CAPABILITIES_V4_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
12244 #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
12247 #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_EVQ_V2_WIDTH 1
12250 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
12253 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TIMESTAMP_WIDTH 1
12256 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_SNIFF_WIDTH 1
12259 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_SNIFF_WIDTH 1
12262 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
12265 #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_BACKGROUND_WIDTH 1
12268 #define MC_CMD_GET_CAPABILITIES_V4_OUT_MCDI_DB_RETURN_WIDTH 1
12271 #define MC_CMD_GET_CAPABILITIES_V4_OUT_CTPIO_WIDTH 1
12274 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_SUPPORT_WIDTH 1
12277 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TSA_BOUND_WIDTH 1
12280 #define MC_CMD_GET_CAPABILITIES_V4_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
12283 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_FLAG_WIDTH 1
12286 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FILTER_ACTION_MARK_WIDTH 1
12289 #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
12292 #define MC_CMD_GET_CAPABILITIES_V4_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
12295 #define MC_CMD_GET_CAPABILITIES_V4_OUT_L3XUDP_SUPPORT_WIDTH 1
12298 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
12301 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_SPREADING_WIDTH 1
12304 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXDP_HLB_IDLE_WIDTH 1
12307 #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
12310 #define MC_CMD_GET_CAPABILITIES_V4_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
12313 #define MC_CMD_GET_CAPABILITIES_V4_OUT_BUNDLE_UPDATE_WIDTH 1
12316 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_TSO_V3_WIDTH 1
12319 #define MC_CMD_GET_CAPABILITIES_V4_OUT_DYNAMIC_SENSORS_WIDTH 1
12322 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
12324 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
12333 #define MC_CMD_GET_CAPABILITIES_V4_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
12352 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VFS_PER_PF_LEN 1
12361 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_NUM 4
12366 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DESC_CACHE_SIZE_LEN 1
12371 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_DESC_CACHE_SIZE_LEN 1
12380 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
12384 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VI_WINDOW_MODE_LEN 1
12385 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
12389 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
12391 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
12394 * (SF-115995-SW) in the present configuration of firmware and port mode.
12397 #define MC_CMD_GET_CAPABILITIES_V4_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
12399 * (SF-115995-SW) in the present configuration of firmware and port mode.
12405 * hold at least this many 64-bit stats values, if they wish to receive all
12416 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS1_LEN 4
12419 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VPORT_RECONFIGURE_WIDTH 1
12421 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_STRIPING_LBN 4
12422 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_STRIPING_WIDTH 1
12425 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_QUERY_WIDTH 1
12428 #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
12431 #define MC_CMD_GET_CAPABILITIES_V5_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
12434 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
12437 #define MC_CMD_GET_CAPABILITIES_V5_OUT_SET_MAC_ENHANCED_WIDTH 1
12440 …efine MC_CMD_GET_CAPABILITIES_V5_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
12443 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
12446 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
12449 #define MC_CMD_GET_CAPABILITIES_V5_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
12452 #define MC_CMD_GET_CAPABILITIES_V5_OUT_QBB_WIDTH 1
12455 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
12458 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_RSS_LIMITED_WIDTH 1
12461 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PACKED_STREAM_WIDTH 1
12464 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_INCLUDE_FCS_WIDTH 1
12467 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VLAN_INSERTION_WIDTH 1
12470 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_VLAN_STRIPPING_WIDTH 1
12473 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_WIDTH 1
12476 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_0_WIDTH 1
12479 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_PREFIX_LEN_14_WIDTH 1
12482 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_TIMESTAMP_WIDTH 1
12485 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_BATCHING_WIDTH 1
12488 #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCAST_FILTER_CHAINING_WIDTH 1
12491 #define MC_CMD_GET_CAPABILITIES_V5_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
12494 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DISABLE_SCATTER_WIDTH 1
12497 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
12500 #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVB_WIDTH 1
12503 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VXLAN_NVGRE_WIDTH 1
12505 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DPCPU_FW_ID_OFST 4
12519 /* enum: RXDP Test firmware image 1 */
12525 /* enum: RXDP Test firmware image 4 */
12554 /* enum: TXDP Test firmware image 1 */
12567 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
12568 /* enum: reserved value - do not use (may indicate alternative interpretation
12579 /* enum: RX PD firmware with approximately Siena-compatible behaviour
12601 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
12618 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
12619 /* enum: reserved value - do not use (may indicate alternative interpretation
12630 /* enum: TX PD firmware with approximately Siena-compatible behaviour
12649 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
12657 #define MC_CMD_GET_CAPABILITIES_V5_OUT_HW_CAPABILITIES_LEN 4
12660 #define MC_CMD_GET_CAPABILITIES_V5_OUT_LICENSE_CAPABILITIES_LEN 4
12663 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS2_LEN 4
12666 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_WIDTH 1
12668 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_ENCAP_LBN 1
12669 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V2_ENCAP_WIDTH 1
12672 #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVQ_TIMER_CTRL_WIDTH 1
12675 #define MC_CMD_GET_CAPABILITIES_V5_OUT_EVENT_CUT_THROUGH_WIDTH 1
12677 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_CUT_THROUGH_LBN 4
12678 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_CUT_THROUGH_WIDTH 1
12681 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
12684 #define MC_CMD_GET_CAPABILITIES_V5_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
12687 #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
12690 #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_EVQ_V2_WIDTH 1
12693 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
12696 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TIMESTAMP_WIDTH 1
12699 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_SNIFF_WIDTH 1
12702 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_SNIFF_WIDTH 1
12705 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
12708 #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_BACKGROUND_WIDTH 1
12711 #define MC_CMD_GET_CAPABILITIES_V5_OUT_MCDI_DB_RETURN_WIDTH 1
12714 #define MC_CMD_GET_CAPABILITIES_V5_OUT_CTPIO_WIDTH 1
12717 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_SUPPORT_WIDTH 1
12720 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TSA_BOUND_WIDTH 1
12723 #define MC_CMD_GET_CAPABILITIES_V5_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
12726 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_FLAG_WIDTH 1
12729 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_WIDTH 1
12732 #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
12735 #define MC_CMD_GET_CAPABILITIES_V5_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
12738 #define MC_CMD_GET_CAPABILITIES_V5_OUT_L3XUDP_SUPPORT_WIDTH 1
12741 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
12744 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_SPREADING_WIDTH 1
12747 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXDP_HLB_IDLE_WIDTH 1
12750 #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
12753 #define MC_CMD_GET_CAPABILITIES_V5_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
12756 #define MC_CMD_GET_CAPABILITIES_V5_OUT_BUNDLE_UPDATE_WIDTH 1
12759 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_TSO_V3_WIDTH 1
12762 #define MC_CMD_GET_CAPABILITIES_V5_OUT_DYNAMIC_SENSORS_WIDTH 1
12765 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
12767 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
12776 #define MC_CMD_GET_CAPABILITIES_V5_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
12795 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VFS_PER_PF_LEN 1
12804 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_NUM 4
12809 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DESC_CACHE_SIZE_LEN 1
12814 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_DESC_CACHE_SIZE_LEN 1
12823 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
12827 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VI_WINDOW_MODE_LEN 1
12828 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
12832 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
12834 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
12837 * (SF-115995-SW) in the present configuration of firmware and port mode.
12840 #define MC_CMD_GET_CAPABILITIES_V5_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
12842 * (SF-115995-SW) in the present configuration of firmware and port mode.
12848 * hold at least this many 64-bit stats values, if they wish to receive all
12855 * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.
12858 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX_LEN 4
12864 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS1_LEN 4
12867 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VPORT_RECONFIGURE_WIDTH 1
12869 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_LBN 4
12870 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_WIDTH 1
12873 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_QUERY_WIDTH 1
12876 #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
12879 #define MC_CMD_GET_CAPABILITIES_V6_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
12882 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
12885 #define MC_CMD_GET_CAPABILITIES_V6_OUT_SET_MAC_ENHANCED_WIDTH 1
12888 …efine MC_CMD_GET_CAPABILITIES_V6_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
12891 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
12894 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
12897 #define MC_CMD_GET_CAPABILITIES_V6_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
12900 #define MC_CMD_GET_CAPABILITIES_V6_OUT_QBB_WIDTH 1
12903 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
12906 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_RSS_LIMITED_WIDTH 1
12909 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PACKED_STREAM_WIDTH 1
12912 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_INCLUDE_FCS_WIDTH 1
12915 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VLAN_INSERTION_WIDTH 1
12918 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_VLAN_STRIPPING_WIDTH 1
12921 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_WIDTH 1
12924 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_0_WIDTH 1
12927 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_PREFIX_LEN_14_WIDTH 1
12930 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_TIMESTAMP_WIDTH 1
12933 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_BATCHING_WIDTH 1
12936 #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCAST_FILTER_CHAINING_WIDTH 1
12939 #define MC_CMD_GET_CAPABILITIES_V6_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
12942 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DISABLE_SCATTER_WIDTH 1
12945 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
12948 #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVB_WIDTH 1
12951 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VXLAN_NVGRE_WIDTH 1
12953 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DPCPU_FW_ID_OFST 4
12967 /* enum: RXDP Test firmware image 1 */
12973 /* enum: RXDP Test firmware image 4 */
13002 /* enum: TXDP Test firmware image 1 */
13015 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
13016 /* enum: reserved value - do not use (may indicate alternative interpretation
13027 /* enum: RX PD firmware with approximately Siena-compatible behaviour
13049 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
13066 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
13067 /* enum: reserved value - do not use (may indicate alternative interpretation
13078 /* enum: TX PD firmware with approximately Siena-compatible behaviour
13097 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
13105 #define MC_CMD_GET_CAPABILITIES_V6_OUT_HW_CAPABILITIES_LEN 4
13108 #define MC_CMD_GET_CAPABILITIES_V6_OUT_LICENSE_CAPABILITIES_LEN 4
13111 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS2_LEN 4
13114 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_WIDTH 1
13116 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_LBN 1
13117 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V2_ENCAP_WIDTH 1
13120 #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVQ_TIMER_CTRL_WIDTH 1
13123 #define MC_CMD_GET_CAPABILITIES_V6_OUT_EVENT_CUT_THROUGH_WIDTH 1
13125 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_LBN 4
13126 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_WIDTH 1
13129 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
13132 #define MC_CMD_GET_CAPABILITIES_V6_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
13135 #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
13138 #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_EVQ_V2_WIDTH 1
13141 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
13144 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TIMESTAMP_WIDTH 1
13147 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_SNIFF_WIDTH 1
13150 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_SNIFF_WIDTH 1
13153 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
13156 #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_BACKGROUND_WIDTH 1
13159 #define MC_CMD_GET_CAPABILITIES_V6_OUT_MCDI_DB_RETURN_WIDTH 1
13162 #define MC_CMD_GET_CAPABILITIES_V6_OUT_CTPIO_WIDTH 1
13165 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_SUPPORT_WIDTH 1
13168 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TSA_BOUND_WIDTH 1
13171 #define MC_CMD_GET_CAPABILITIES_V6_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
13174 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_FLAG_WIDTH 1
13177 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_WIDTH 1
13180 #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
13183 #define MC_CMD_GET_CAPABILITIES_V6_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
13186 #define MC_CMD_GET_CAPABILITIES_V6_OUT_L3XUDP_SUPPORT_WIDTH 1
13189 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
13192 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_SPREADING_WIDTH 1
13195 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXDP_HLB_IDLE_WIDTH 1
13198 #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
13201 #define MC_CMD_GET_CAPABILITIES_V6_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
13204 #define MC_CMD_GET_CAPABILITIES_V6_OUT_BUNDLE_UPDATE_WIDTH 1
13207 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_TSO_V3_WIDTH 1
13210 #define MC_CMD_GET_CAPABILITIES_V6_OUT_DYNAMIC_SENSORS_WIDTH 1
13213 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
13215 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
13224 #define MC_CMD_GET_CAPABILITIES_V6_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
13243 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VFS_PER_PF_LEN 1
13252 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM 4
13257 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DESC_CACHE_SIZE_LEN 1
13262 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_DESC_CACHE_SIZE_LEN 1
13271 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
13275 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VI_WINDOW_MODE_LEN 1
13276 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
13280 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
13282 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
13285 * (SF-115995-SW) in the present configuration of firmware and port mode.
13288 #define MC_CMD_GET_CAPABILITIES_V6_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
13290 * (SF-115995-SW) in the present configuration of firmware and port mode.
13296 * hold at least this many 64-bit stats values, if they wish to receive all
13303 * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.
13306 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_MAX_LEN 4
13316 #define MC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
13323 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS1_LEN 4
13326 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VPORT_RECONFIGURE_WIDTH 1
13328 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_STRIPING_LBN 4
13329 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_STRIPING_WIDTH 1
13332 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_QUERY_WIDTH 1
13335 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
13338 #define MC_CMD_GET_CAPABILITIES_V7_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
13341 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
13344 #define MC_CMD_GET_CAPABILITIES_V7_OUT_SET_MAC_ENHANCED_WIDTH 1
13347 …efine MC_CMD_GET_CAPABILITIES_V7_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
13350 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
13353 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
13356 #define MC_CMD_GET_CAPABILITIES_V7_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
13359 #define MC_CMD_GET_CAPABILITIES_V7_OUT_QBB_WIDTH 1
13362 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
13365 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_RSS_LIMITED_WIDTH 1
13368 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PACKED_STREAM_WIDTH 1
13371 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_INCLUDE_FCS_WIDTH 1
13374 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VLAN_INSERTION_WIDTH 1
13377 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_WIDTH 1
13380 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_WIDTH 1
13383 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_0_WIDTH 1
13386 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_PREFIX_LEN_14_WIDTH 1
13389 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_TIMESTAMP_WIDTH 1
13392 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_BATCHING_WIDTH 1
13395 #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCAST_FILTER_CHAINING_WIDTH 1
13398 #define MC_CMD_GET_CAPABILITIES_V7_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
13401 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DISABLE_SCATTER_WIDTH 1
13404 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
13407 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVB_WIDTH 1
13410 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VXLAN_NVGRE_WIDTH 1
13412 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DPCPU_FW_ID_OFST 4
13426 /* enum: RXDP Test firmware image 1 */
13432 /* enum: RXDP Test firmware image 4 */
13461 /* enum: TXDP Test firmware image 1 */
13474 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
13475 /* enum: reserved value - do not use (may indicate alternative interpretation
13486 /* enum: RX PD firmware with approximately Siena-compatible behaviour
13508 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
13525 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
13526 /* enum: reserved value - do not use (may indicate alternative interpretation
13537 /* enum: TX PD firmware with approximately Siena-compatible behaviour
13556 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
13564 #define MC_CMD_GET_CAPABILITIES_V7_OUT_HW_CAPABILITIES_LEN 4
13567 #define MC_CMD_GET_CAPABILITIES_V7_OUT_LICENSE_CAPABILITIES_LEN 4
13570 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS2_LEN 4
13573 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_WIDTH 1
13575 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_ENCAP_LBN 1
13576 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V2_ENCAP_WIDTH 1
13579 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVQ_TIMER_CTRL_WIDTH 1
13582 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EVENT_CUT_THROUGH_WIDTH 1
13584 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_CUT_THROUGH_LBN 4
13585 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_CUT_THROUGH_WIDTH 1
13588 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
13591 #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
13594 #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
13597 #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_EVQ_V2_WIDTH 1
13600 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
13603 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TIMESTAMP_WIDTH 1
13606 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_SNIFF_WIDTH 1
13609 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_SNIFF_WIDTH 1
13612 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
13615 #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_BACKGROUND_WIDTH 1
13618 #define MC_CMD_GET_CAPABILITIES_V7_OUT_MCDI_DB_RETURN_WIDTH 1
13621 #define MC_CMD_GET_CAPABILITIES_V7_OUT_CTPIO_WIDTH 1
13624 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_SUPPORT_WIDTH 1
13627 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TSA_BOUND_WIDTH 1
13630 #define MC_CMD_GET_CAPABILITIES_V7_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
13633 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_FLAG_WIDTH 1
13636 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_WIDTH 1
13639 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
13642 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
13645 #define MC_CMD_GET_CAPABILITIES_V7_OUT_L3XUDP_SUPPORT_WIDTH 1
13648 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
13651 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_SPREADING_WIDTH 1
13654 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXDP_HLB_IDLE_WIDTH 1
13657 #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
13660 #define MC_CMD_GET_CAPABILITIES_V7_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
13663 #define MC_CMD_GET_CAPABILITIES_V7_OUT_BUNDLE_UPDATE_WIDTH 1
13666 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_TSO_V3_WIDTH 1
13669 #define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_SENSORS_WIDTH 1
13672 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
13674 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
13683 #define MC_CMD_GET_CAPABILITIES_V7_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
13702 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VFS_PER_PF_LEN 1
13711 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_NUM 4
13716 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DESC_CACHE_SIZE_LEN 1
13721 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_DESC_CACHE_SIZE_LEN 1
13730 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
13734 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VI_WINDOW_MODE_LEN 1
13735 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
13739 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
13741 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
13744 * (SF-115995-SW) in the present configuration of firmware and port mode.
13747 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
13749 * (SF-115995-SW) in the present configuration of firmware and port mode.
13755 * hold at least this many 64-bit stats values, if they wish to receive all
13762 * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.
13765 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_MAX_LEN 4
13775 #define MC_CMD_GET_CAPABILITIES_V7_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
13779 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS3_LEN 4
13782 #define MC_CMD_GET_CAPABILITIES_V7_OUT_WOL_ETHERWAKE_WIDTH 1
13784 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_EVEN_SPREADING_LBN 1
13785 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_EVEN_SPREADING_WIDTH 1
13788 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1
13791 #define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_SUPPORTED_WIDTH 1
13793 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VDPA_SUPPORTED_LBN 4
13794 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VDPA_SUPPORTED_WIDTH 1
13797 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1
13800 #define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1
13803 #define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
13809 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS1_LEN 4
13812 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VPORT_RECONFIGURE_WIDTH 1
13814 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_STRIPING_LBN 4
13815 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_STRIPING_WIDTH 1
13818 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_QUERY_WIDTH 1
13821 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
13824 #define MC_CMD_GET_CAPABILITIES_V8_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
13827 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
13830 #define MC_CMD_GET_CAPABILITIES_V8_OUT_SET_MAC_ENHANCED_WIDTH 1
13833 …efine MC_CMD_GET_CAPABILITIES_V8_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
13836 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
13839 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
13842 #define MC_CMD_GET_CAPABILITIES_V8_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
13845 #define MC_CMD_GET_CAPABILITIES_V8_OUT_QBB_WIDTH 1
13848 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
13851 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_RSS_LIMITED_WIDTH 1
13854 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PACKED_STREAM_WIDTH 1
13857 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_INCLUDE_FCS_WIDTH 1
13860 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VLAN_INSERTION_WIDTH 1
13863 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_WIDTH 1
13866 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_WIDTH 1
13869 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_0_WIDTH 1
13872 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_PREFIX_LEN_14_WIDTH 1
13875 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_TIMESTAMP_WIDTH 1
13878 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_BATCHING_WIDTH 1
13881 #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCAST_FILTER_CHAINING_WIDTH 1
13884 #define MC_CMD_GET_CAPABILITIES_V8_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
13887 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DISABLE_SCATTER_WIDTH 1
13890 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
13893 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVB_WIDTH 1
13896 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VXLAN_NVGRE_WIDTH 1
13898 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DPCPU_FW_ID_OFST 4
13912 /* enum: RXDP Test firmware image 1 */
13918 /* enum: RXDP Test firmware image 4 */
13947 /* enum: TXDP Test firmware image 1 */
13960 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
13961 /* enum: reserved value - do not use (may indicate alternative interpretation
13972 /* enum: RX PD firmware with approximately Siena-compatible behaviour
13994 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
14011 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
14012 /* enum: reserved value - do not use (may indicate alternative interpretation
14023 /* enum: TX PD firmware with approximately Siena-compatible behaviour
14042 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
14050 #define MC_CMD_GET_CAPABILITIES_V8_OUT_HW_CAPABILITIES_LEN 4
14053 #define MC_CMD_GET_CAPABILITIES_V8_OUT_LICENSE_CAPABILITIES_LEN 4
14056 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS2_LEN 4
14059 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_WIDTH 1
14061 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_ENCAP_LBN 1
14062 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V2_ENCAP_WIDTH 1
14065 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVQ_TIMER_CTRL_WIDTH 1
14068 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EVENT_CUT_THROUGH_WIDTH 1
14070 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_CUT_THROUGH_LBN 4
14071 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_CUT_THROUGH_WIDTH 1
14074 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
14077 #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
14080 #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
14083 #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_EVQ_V2_WIDTH 1
14086 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
14089 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TIMESTAMP_WIDTH 1
14092 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_SNIFF_WIDTH 1
14095 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_SNIFF_WIDTH 1
14098 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
14101 #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_BACKGROUND_WIDTH 1
14104 #define MC_CMD_GET_CAPABILITIES_V8_OUT_MCDI_DB_RETURN_WIDTH 1
14107 #define MC_CMD_GET_CAPABILITIES_V8_OUT_CTPIO_WIDTH 1
14110 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_SUPPORT_WIDTH 1
14113 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TSA_BOUND_WIDTH 1
14116 #define MC_CMD_GET_CAPABILITIES_V8_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
14119 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_FLAG_WIDTH 1
14122 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_WIDTH 1
14125 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
14128 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
14131 #define MC_CMD_GET_CAPABILITIES_V8_OUT_L3XUDP_SUPPORT_WIDTH 1
14134 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
14137 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_SPREADING_WIDTH 1
14140 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXDP_HLB_IDLE_WIDTH 1
14143 #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
14146 #define MC_CMD_GET_CAPABILITIES_V8_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
14149 #define MC_CMD_GET_CAPABILITIES_V8_OUT_BUNDLE_UPDATE_WIDTH 1
14152 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_TSO_V3_WIDTH 1
14155 #define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_SENSORS_WIDTH 1
14158 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
14160 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
14169 #define MC_CMD_GET_CAPABILITIES_V8_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
14188 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VFS_PER_PF_LEN 1
14197 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_NUM 4
14202 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DESC_CACHE_SIZE_LEN 1
14207 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_DESC_CACHE_SIZE_LEN 1
14216 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
14220 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VI_WINDOW_MODE_LEN 1
14221 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
14225 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
14227 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
14230 * (SF-115995-SW) in the present configuration of firmware and port mode.
14233 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
14235 * (SF-115995-SW) in the present configuration of firmware and port mode.
14241 * hold at least this many 64-bit stats values, if they wish to receive all
14248 * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.
14251 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_MAX_LEN 4
14261 #define MC_CMD_GET_CAPABILITIES_V8_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
14265 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS3_LEN 4
14268 #define MC_CMD_GET_CAPABILITIES_V8_OUT_WOL_ETHERWAKE_WIDTH 1
14270 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_EVEN_SPREADING_LBN 1
14271 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_EVEN_SPREADING_WIDTH 1
14274 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1
14277 #define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_SUPPORTED_WIDTH 1
14279 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VDPA_SUPPORTED_LBN 4
14280 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VDPA_SUPPORTED_WIDTH 1
14283 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1
14286 #define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1
14289 #define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
14290 /* These bits are reserved for communicating test-specific capabilities to
14291 * host-side test software. All production drivers should treat this field as
14303 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS1_LEN 4
14306 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VPORT_RECONFIGURE_WIDTH 1
14308 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_STRIPING_LBN 4
14309 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_STRIPING_WIDTH 1
14312 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_QUERY_WIDTH 1
14315 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1
14318 #define MC_CMD_GET_CAPABILITIES_V9_OUT_DRV_ATTACH_PREBOOT_WIDTH 1
14321 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1
14324 #define MC_CMD_GET_CAPABILITIES_V9_OUT_SET_MAC_ENHANCED_WIDTH 1
14327 …efine MC_CMD_GET_CAPABILITIES_V9_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1
14330 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
14333 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1
14336 #define MC_CMD_GET_CAPABILITIES_V9_OUT_ADDITIONAL_RSS_MODES_WIDTH 1
14339 #define MC_CMD_GET_CAPABILITIES_V9_OUT_QBB_WIDTH 1
14342 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1
14345 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_RSS_LIMITED_WIDTH 1
14348 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PACKED_STREAM_WIDTH 1
14351 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_INCLUDE_FCS_WIDTH 1
14354 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VLAN_INSERTION_WIDTH 1
14357 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_WIDTH 1
14360 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_WIDTH 1
14363 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_0_WIDTH 1
14366 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_PREFIX_LEN_14_WIDTH 1
14369 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_TIMESTAMP_WIDTH 1
14372 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_BATCHING_WIDTH 1
14375 #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCAST_FILTER_CHAINING_WIDTH 1
14378 #define MC_CMD_GET_CAPABILITIES_V9_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1
14381 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DISABLE_SCATTER_WIDTH 1
14384 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1
14387 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVB_WIDTH 1
14390 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VXLAN_NVGRE_WIDTH 1
14392 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DPCPU_FW_ID_OFST 4
14406 /* enum: RXDP Test firmware image 1 */
14412 /* enum: RXDP Test firmware image 4 */
14441 /* enum: TXDP Test firmware image 1 */
14454 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
14455 /* enum: reserved value - do not use (may indicate alternative interpretation
14466 /* enum: RX PD firmware with approximately Siena-compatible behaviour
14488 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
14505 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
14506 /* enum: reserved value - do not use (may indicate alternative interpretation
14517 /* enum: TX PD firmware with approximately Siena-compatible behaviour
14536 /* enum: Custom firmware variant (see SF-119495-PD and bug69716) */
14544 #define MC_CMD_GET_CAPABILITIES_V9_OUT_HW_CAPABILITIES_LEN 4
14547 #define MC_CMD_GET_CAPABILITIES_V9_OUT_LICENSE_CAPABILITIES_LEN 4
14550 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS2_LEN 4
14553 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_WIDTH 1
14555 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_ENCAP_LBN 1
14556 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V2_ENCAP_WIDTH 1
14559 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVQ_TIMER_CTRL_WIDTH 1
14562 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EVENT_CUT_THROUGH_WIDTH 1
14564 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_CUT_THROUGH_LBN 4
14565 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_CUT_THROUGH_WIDTH 1
14568 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_VFIFO_ULL_MODE_WIDTH 1
14571 #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1
14574 #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1
14577 #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_EVQ_V2_WIDTH 1
14580 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_MAC_TIMESTAMPING_WIDTH 1
14583 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TIMESTAMP_WIDTH 1
14586 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_SNIFF_WIDTH 1
14589 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_SNIFF_WIDTH 1
14592 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1
14595 #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_BACKGROUND_WIDTH 1
14598 #define MC_CMD_GET_CAPABILITIES_V9_OUT_MCDI_DB_RETURN_WIDTH 1
14601 #define MC_CMD_GET_CAPABILITIES_V9_OUT_CTPIO_WIDTH 1
14604 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_SUPPORT_WIDTH 1
14607 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TSA_BOUND_WIDTH 1
14610 #define MC_CMD_GET_CAPABILITIES_V9_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1
14613 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_FLAG_WIDTH 1
14616 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_WIDTH 1
14619 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1
14622 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1
14625 #define MC_CMD_GET_CAPABILITIES_V9_OUT_L3XUDP_SUPPORT_WIDTH 1
14628 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1
14631 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_SPREADING_WIDTH 1
14634 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXDP_HLB_IDLE_WIDTH 1
14637 #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1
14640 #define MC_CMD_GET_CAPABILITIES_V9_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1
14643 #define MC_CMD_GET_CAPABILITIES_V9_OUT_BUNDLE_UPDATE_WIDTH 1
14646 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_TSO_V3_WIDTH 1
14649 #define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_SENSORS_WIDTH 1
14652 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1
14654 * TX_TSO_V2 == 1). Not present on older firmware (check the length).
14663 #define MC_CMD_GET_CAPABILITIES_V9_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1
14682 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VFS_PER_PF_LEN 1
14691 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_NUM 4
14696 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DESC_CACHE_SIZE_LEN 1
14701 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_DESC_CACHE_SIZE_LEN 1
14710 * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available
14714 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VI_WINDOW_MODE_LEN 1
14715 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
14719 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
14721 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
14724 * (SF-115995-SW) in the present configuration of firmware and port mode.
14727 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1
14729 * (SF-115995-SW) in the present configuration of firmware and port mode.
14735 * hold at least this many 64-bit stats values, if they wish to receive all
14742 * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.
14745 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_MAX_LEN 4
14755 #define MC_CMD_GET_CAPABILITIES_V9_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
14759 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS3_LEN 4
14762 #define MC_CMD_GET_CAPABILITIES_V9_OUT_WOL_ETHERWAKE_WIDTH 1
14764 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_EVEN_SPREADING_LBN 1
14765 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_EVEN_SPREADING_WIDTH 1
14768 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1
14771 #define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_SUPPORTED_WIDTH 1
14773 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VDPA_SUPPORTED_LBN 4
14774 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VDPA_SUPPORTED_WIDTH 1
14777 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1
14780 #define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1
14783 #define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
14784 /* These bits are reserved for communicating test-specific capabilities to
14785 * host-side test software. All production drivers should treat this field as
14797 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4
14803 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4
14809 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4
14810 /* The maximum number of queues that can be used by an RSS context in even-
14811 * spreading mode. In even-spreading mode the context has no indirection table
14815 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4
14821 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_NUM_CONTEXTS_LEN 4
14826 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_TABLE_POOL_SIZE_LEN 4
14836 #define MC_CMD_V2_EXTN_IN_LEN 4
14841 #define MC_CMD_V2_EXTN_IN_UNUSED_WIDTH 1
14851 #define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4
14873 #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
14875 #define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
14876 #define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
14892 #define MC_CMD_UNLINK_PIOBUF_IN_LEN 4
14895 #define MC_CMD_UNLINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
14903 * allocate and initialise a v-switch.
14912 /* The port to connect to the v-switch's upstream port. */
14914 #define MC_CMD_VSWITCH_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
14915 /* The type of v-switch to create. */
14916 #define MC_CMD_VSWITCH_ALLOC_IN_TYPE_OFST 4
14917 #define MC_CMD_VSWITCH_ALLOC_IN_TYPE_LEN 4
14928 /* Flags controlling v-port creation */
14930 #define MC_CMD_VSWITCH_ALLOC_IN_FLAGS_LEN 4
14933 #define MC_CMD_VSWITCH_ALLOC_IN_FLAG_AUTO_PORT_WIDTH 1
14934 /* The number of VLAN tags to allow for attached v-ports. For VLAN aggregators,
14935 * this must be one or greated, and the attached v-ports must have exactly this
14936 * number of tags. For other v-switch types, this must be zero of greater, and
14937 * is an upper limit on the number of VLAN tags for attached v-ports. An error
14939 * v-ports with this number of tags.
14942 #define MC_CMD_VSWITCH_ALLOC_IN_NUM_VLAN_TAGS_LEN 4
14950 * de-allocate a v-switch.
14958 #define MC_CMD_VSWITCH_FREE_IN_LEN 4
14959 /* The port to which the v-switch is connected. */
14961 #define MC_CMD_VSWITCH_FREE_IN_UPSTREAM_PORT_ID_LEN 4
14969 * read some config of v-switch. For now this command is an empty placeholder.
14970 * It may be used to check if a v-switch is connected to a given EVB port (if
14979 #define MC_CMD_VSWITCH_QUERY_IN_LEN 4
14980 /* The port to which the v-switch is connected. */
14982 #define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_LEN 4
14990 * allocate a v-port.
14999 /* The port to which the v-switch is connected. */
15001 #define MC_CMD_VPORT_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15002 /* The type of the new v-port. */
15003 #define MC_CMD_VPORT_ALLOC_IN_TYPE_OFST 4
15004 #define MC_CMD_VPORT_ALLOC_IN_TYPE_LEN 4
15011 /* enum: A normal v-port receives packets which match a specified MAC and/or
15015 /* enum: An expansion v-port packets traffic which don't match any other
15016 * v-port.
15019 /* enum: An test v-port receives packets which match any filters installed by
15023 /* Flags controlling v-port creation */
15025 #define MC_CMD_VPORT_ALLOC_IN_FLAGS_LEN 4
15028 #define MC_CMD_VPORT_ALLOC_IN_FLAG_AUTO_PORT_WIDTH 1
15030 #define MC_CMD_VPORT_ALLOC_IN_FLAG_VLAN_RESTRICT_LBN 1
15031 #define MC_CMD_VPORT_ALLOC_IN_FLAG_VLAN_RESTRICT_WIDTH 1
15034 * v-switch.
15037 #define MC_CMD_VPORT_ALLOC_IN_NUM_VLAN_TAGS_LEN 4
15040 #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAGS_LEN 4
15049 #define MC_CMD_VPORT_ALLOC_OUT_LEN 4
15050 /* The handle of the new v-port */
15052 #define MC_CMD_VPORT_ALLOC_OUT_VPORT_ID_LEN 4
15057 * de-allocate a v-port.
15065 #define MC_CMD_VPORT_FREE_IN_LEN 4
15066 /* The handle of the v-port */
15068 #define MC_CMD_VPORT_FREE_IN_VPORT_ID_LEN 4
15076 * allocate a v-adaptor.
15085 /* The port to connect to the v-adaptor's port. */
15087 #define MC_CMD_VADAPTOR_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15088 /* Flags controlling v-adaptor creation */
15090 #define MC_CMD_VADAPTOR_ALLOC_IN_FLAGS_LEN 4
15093 #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_AUTO_VADAPTOR_WIDTH 1
15095 #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 1
15096 #define MC_CMD_VADAPTOR_ALLOC_IN_FLAG_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1
15099 #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLANS_LEN 4
15102 #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLAN_TAGS_LEN 4
15105 #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAGS_LEN 4
15112 /* The MAC address to assign to this v-adaptor */
15124 * de-allocate a v-adaptor.
15132 #define MC_CMD_VADAPTOR_FREE_IN_LEN 4
15133 /* The port to which the v-adaptor is connected. */
15135 #define MC_CMD_VADAPTOR_FREE_IN_UPSTREAM_PORT_ID_LEN 4
15143 * assign a new MAC address to a v-adaptor.
15152 /* The port to which the v-adaptor is connected. */
15154 #define MC_CMD_VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID_LEN 4
15155 /* The new MAC address to assign to this v-adaptor */
15156 #define MC_CMD_VADAPTOR_SET_MAC_IN_MACADDR_OFST 4
15165 * read the MAC address assigned to a v-adaptor.
15173 #define MC_CMD_VADAPTOR_GET_MAC_IN_LEN 4
15174 /* The port to which the v-adaptor is connected. */
15176 #define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_LEN 4
15180 /* The MAC address assigned to this v-adaptor */
15187 * read some config of v-adaptor.
15195 #define MC_CMD_VADAPTOR_QUERY_IN_LEN 4
15196 /* The port to which the v-adaptor is connected. */
15198 #define MC_CMD_VADAPTOR_QUERY_IN_UPSTREAM_PORT_ID_LEN 4
15204 #define MC_CMD_VADAPTOR_QUERY_OUT_PORT_FLAGS_LEN 4
15205 /* The v-adaptor flags as defined at MC_CMD_VADAPTOR_ALLOC. */
15206 #define MC_CMD_VADAPTOR_QUERY_OUT_VADAPTOR_FLAGS_OFST 4
15207 #define MC_CMD_VADAPTOR_QUERY_OUT_VADAPTOR_FLAGS_LEN 4
15210 #define MC_CMD_VADAPTOR_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4
15226 #define MC_CMD_EVB_PORT_ASSIGN_IN_PORT_ID_LEN 4
15228 #define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_OFST 4
15229 #define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_LEN 4
15230 #define MC_CMD_EVB_PORT_ASSIGN_IN_PF_OFST 4
15233 #define MC_CMD_EVB_PORT_ASSIGN_IN_VF_OFST 4
15253 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_LEN 4
15254 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST 4
15255 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_LEN 4
15257 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_LEN 4
15259 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_LEN 4
15260 /* Write enable bits 0-3, set to write, clear to read. */
15262 #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH 4
15264 #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_LEN 1
15271 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_LEN 4
15272 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST 4
15273 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_LEN 4
15275 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_LEN 4
15277 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_LEN 4
15290 #define MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN 4
15293 #define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15296 #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN 4
15299 #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_LEN 4
15312 #define MC_CMD_ONLOAD_STACK_FREE_IN_LEN 4
15315 #define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_LEN 4
15334 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15336 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_OFST 4
15337 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_LEN 4
15343 * queues, but the key and indirection table are pre-configured and may not be
15344 * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64.
15353 * be in the range 1 to RSS_MAX_INDIRECTION_QUEUES, where
15356 * the indirection table will be in the range 0 to NUM_QUEUES-1. For even-
15357 * spreading contexts this must be in the range 1 to
15359 * that specifying NUM_QUEUES = 1 will not perform any spreading but may still
15363 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_NUM_QUEUES_LEN 4
15369 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_UPSTREAM_PORT_ID_LEN 4
15371 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_OFST 4
15372 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_LEN 4
15378 * queues, but the key and indirection table are pre-configured and may not be
15379 * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64.
15388 * be in the range 1 to RSS_MAX_INDIRECTION_QUEUES, where
15391 * the indirection table will be in the range 0 to NUM_QUEUES-1. For even-
15392 * spreading contexts this must be in the range 1 to
15394 * that specifying NUM_QUEUES = 1 will not perform any spreading but may still
15398 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_NUM_QUEUES_LEN 4
15407 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_INDIRECTION_TABLE_SIZE_LEN 4
15410 #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN 4
15416 #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_LEN 4
15431 #define MC_CMD_RSS_CONTEXT_FREE_IN_LEN 4
15434 #define MC_CMD_RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID_LEN 4
15453 #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID_LEN 4
15454 /* The 40-byte Toeplitz hash key (TBD endianness issues?) */
15455 #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_OFST 4
15472 #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_LEN 4
15475 #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_RSS_CONTEXT_ID_LEN 4
15479 /* The 40-byte Toeplitz hash key (TBD endianness issues?) */
15480 #define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY_OFST 4
15499 #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15500 /* The 128-byte indirection table (1 byte per entry) */
15501 #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_OFST 4
15520 #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_LEN 4
15523 #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15527 /* The 128-byte indirection table (1 byte per entry) */
15528 #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_OFST 4
15534 * Write a portion of a selectable-size indirection table for an RSS context.
15547 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LEN(num) (4+4*(num))
15548 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_NUM(len) (((len)-4)/4)
15551 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15552 /* An array of index-value pairs to be written to the table. Structure is
15555 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_OFST 4
15556 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_LEN 4
15557 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MINNUM 1
15565 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_LEN 4
15580 * Read a portion of a selectable-size indirection table for an RSS context.
15593 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LEN(num) (4+2*(num))
15594 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_NUM(len) (((len)-4)/2)
15597 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15599 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_OFST 4
15601 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MINNUM 1
15610 #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_NUM(len) (((len)-0)/2)
15614 #define MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MINNUM 1
15632 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID_LEN 4
15635 * in this case, the MODE fields may be set to non-zero values, and will take
15645 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_OFST 4
15646 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_LEN 4
15647 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_OFST 4
15649 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_WIDTH 1
15650 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_OFST 4
15651 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_LBN 1
15652 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_WIDTH 1
15653 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_OFST 4
15655 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_WIDTH 1
15656 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_OFST 4
15658 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_WIDTH 1
15659 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_OFST 4
15660 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_LBN 4
15661 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_WIDTH 4
15662 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_OFST 4
15664 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH 4
15665 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_OFST 4
15667 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_WIDTH 4
15668 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_OFST 4
15670 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH 4
15671 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_OFST 4
15673 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH 4
15674 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_OFST 4
15676 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_WIDTH 4
15677 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_OFST 4
15679 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH 4
15695 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_LEN 4
15698 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_RSS_CONTEXT_ID_LEN 4
15704 * capability), the _EN bits report the state. If any _MODE bits are non-zero
15707 * guaranteed to be consistent with the _EN flags for a freshly-allocated RSS
15715 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_OFST 4
15716 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_LEN 4
15717 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_OFST 4
15719 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_WIDTH 1
15720 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_OFST 4
15721 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_LBN 1
15722 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_WIDTH 1
15723 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_OFST 4
15725 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_WIDTH 1
15726 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_OFST 4
15728 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_WIDTH 1
15729 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_OFST 4
15730 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_LBN 4
15731 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_WIDTH 4
15732 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_OFST 4
15734 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_WIDTH 4
15735 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_OFST 4
15737 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_WIDTH 4
15738 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_OFST 4
15740 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_WIDTH 4
15741 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_OFST 4
15743 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_WIDTH 4
15744 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_OFST 4
15746 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_WIDTH 4
15747 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_OFST 4
15749 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_WIDTH 4
15754 * Add a MAC address to a v-port
15763 /* The handle of the v-port */
15765 #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_VPORT_ID_LEN 4
15767 #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_MACADDR_OFST 4
15776 * Delete a MAC address from a v-port
15785 /* The handle of the v-port */
15787 #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_VPORT_ID_LEN 4
15789 #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_MACADDR_OFST 4
15798 * Delete a MAC address from a v-port
15806 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_LEN 4
15807 /* The handle of the v-port */
15809 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_VPORT_ID_LEN 4
15812 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMIN 4
15815 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LEN(num) (4+6*(num))
15816 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_NUM(len) (((len)-4)/6)
15819 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_LEN 4
15821 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_OFST 4
15830 * Replace VLAN tags and/or MAC addresses of an existing v-port. If the v-port
15831 * has already been passed to another function (v-port's user), then that
15841 /* The handle of the v-port */
15843 #define MC_CMD_VPORT_RECONFIGURE_IN_VPORT_ID_LEN 4
15845 #define MC_CMD_VPORT_RECONFIGURE_IN_FLAGS_OFST 4
15846 #define MC_CMD_VPORT_RECONFIGURE_IN_FLAGS_LEN 4
15847 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_VLAN_TAGS_OFST 4
15849 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_VLAN_TAGS_WIDTH 1
15850 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_OFST 4
15851 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_LBN 1
15852 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_WIDTH 1
15855 * v-switch.
15858 #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_VLAN_TAGS_LEN 4
15861 #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAGS_LEN 4
15870 #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_MACADDRS_LEN 4
15874 #define MC_CMD_VPORT_RECONFIGURE_IN_MACADDRS_NUM 4
15877 #define MC_CMD_VPORT_RECONFIGURE_OUT_LEN 4
15879 #define MC_CMD_VPORT_RECONFIGURE_OUT_FLAGS_LEN 4
15882 #define MC_CMD_VPORT_RECONFIGURE_OUT_RESET_DONE_WIDTH 1
15887 * read some config of v-port.
15895 #define MC_CMD_EVB_PORT_QUERY_IN_LEN 4
15896 /* The handle of the v-port */
15898 #define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_LEN 4
15904 #define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_LEN 4
15905 /* The number of VLAN tags that may be used on a v-adaptor connected to this
15908 #define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST 4
15909 #define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4
15928 #define MC_CMD_GET_CLOCK_OUT_SYS_FREQ_LEN 4
15930 #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_OFST 4
15931 #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_LEN 4
15944 #define MC_CMD_TRIGGER_INTERRUPT_IN_LEN 4
15947 #define MC_CMD_TRIGGER_INTERRUPT_IN_INTR_LEVEL_LEN 4
15963 #define MC_CMD_SHMBOOT_OP_IN_LEN 4
15966 #define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_LEN 4
15976 * Adjusts power supply parameters. This is a warranty-voiding operation.
15988 #define MC_CMD_SET_PSU_IN_PARAM_LEN 4
15990 #define MC_CMD_SET_PSU_IN_RAIL_OFST 4
15991 #define MC_CMD_SET_PSU_IN_RAIL_LEN 4
15996 #define MC_CMD_SET_PSU_IN_VALUE_LEN 4
16017 #define MC_CMD_GET_FUNCTION_INFO_OUT_PF_LEN 4
16018 #define MC_CMD_GET_FUNCTION_INFO_OUT_VF_OFST 4
16019 #define MC_CMD_GET_FUNCTION_INFO_OUT_VF_LEN 4
16042 * Read data programmed into the device One-Time-Programmable (OTP) Fuses
16053 #define MC_CMD_READ_FUSES_IN_OFFSET_LEN 4
16055 #define MC_CMD_READ_FUSES_IN_LENGTH_OFST 4
16056 #define MC_CMD_READ_FUSES_IN_LENGTH_LEN 4
16059 #define MC_CMD_READ_FUSES_OUT_LENMIN 4
16062 #define MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num))
16063 #define MC_CMD_READ_FUSES_OUT_DATA_NUM(len) (((len)-4)/1)
16066 #define MC_CMD_READ_FUSES_OUT_LENGTH_LEN 4
16068 #define MC_CMD_READ_FUSES_OUT_DATA_OFST 4
16069 #define MC_CMD_READ_FUSES_OUT_DATA_LEN 1
16078 * - not used for V3 licensing
16086 #define MC_CMD_LICENSING_IN_LEN 4
16089 #define MC_CMD_LICENSING_IN_OP_LEN 4
16090 /* enum: re-read and apply licenses after a license key partition update; note
16091 * that this operation returns a zero-length response
16101 #define MC_CMD_LICENSING_OUT_VALID_APP_KEYS_LEN 4
16105 #define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_OFST 4
16106 #define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_LEN 4
16109 #define MC_CMD_LICENSING_OUT_BLACKLISTED_APP_KEYS_LEN 4
16112 #define MC_CMD_LICENSING_OUT_UNVERIFIABLE_APP_KEYS_LEN 4
16116 #define MC_CMD_LICENSING_OUT_WRONG_NODE_APP_KEYS_LEN 4
16121 #define MC_CMD_LICENSING_OUT_LICENSING_STATE_LEN 4
16122 /* licensing subsystem self-test report (for manftest) */
16124 #define MC_CMD_LICENSING_OUT_LICENSING_SELF_TEST_LEN 4
16125 /* enum: licensing subsystem self-test failed */
16127 /* enum: licensing subsystem self-test passed */
16134 * - V3 licensing (Medford)
16142 #define MC_CMD_LICENSING_V3_IN_LEN 4
16145 #define MC_CMD_LICENSING_V3_IN_OP_LEN 4
16146 /* enum: re-read and apply licenses after a license key partition update; note
16147 * that this operation returns a zero-length response
16159 #define MC_CMD_LICENSING_V3_OUT_VALID_KEYS_LEN 4
16163 #define MC_CMD_LICENSING_V3_OUT_INVALID_KEYS_OFST 4
16164 #define MC_CMD_LICENSING_V3_OUT_INVALID_KEYS_LEN 4
16167 #define MC_CMD_LICENSING_V3_OUT_UNVERIFIABLE_KEYS_LEN 4
16170 #define MC_CMD_LICENSING_V3_OUT_WRONG_NODE_KEYS_LEN 4
16175 #define MC_CMD_LICENSING_V3_OUT_LICENSING_STATE_LEN 4
16176 /* licensing subsystem self-test report (for manftest) */
16178 #define MC_CMD_LICENSING_V3_OUT_LICENSING_SELF_TEST_LEN 4
16179 /* enum: licensing subsystem self-test failed */
16181 /* enum: licensing subsystem self-test passed */
16204 * partition - V3 licensing (Medford)
16218 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) (8+1*(num))
16219 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_NUM(len) (((len)-8)/1)
16222 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN 4
16224 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_OFST 4
16225 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_LEN 4
16228 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LEN 1
16246 #define MC_CMD_GET_LICENSED_APP_STATE_IN_LEN 4
16249 #define MC_CMD_GET_LICENSED_APP_STATE_IN_APP_ID_LEN 4
16252 #define MC_CMD_GET_LICENSED_APP_STATE_OUT_LEN 4
16255 #define MC_CMD_GET_LICENSED_APP_STATE_OUT_STATE_LEN 4
16281 #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
16284 #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
16287 #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_LEN 4
16313 #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
16317 /* states of these features - bit set for licensed, clear for not licensed */
16321 #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
16326 * Perform an action for an individual licensed application - not used for V3
16338 #define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num))
16339 #define MC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) (((len)-8)/4)
16342 #define MC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN 4
16344 #define MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4
16345 #define MC_CMD_LICENSED_APP_OP_IN_OP_LEN 4
16352 #define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4
16361 #define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num))
16362 #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) (((len)-0)/4)
16365 #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4
16374 #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_LEN 4
16376 #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4
16377 #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_LEN 4
16386 #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_LEN 4
16388 #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4
16395 #define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_LEN 4
16397 #define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST 4
16398 #define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_LEN 4
16401 #define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_LEN 4
16409 * Perform validation for an individual licensed application - V3 licensing
16431 * of two 384-bit integers, r and s, in big-endian order. The signature signs a
16432 * SHA-384 digest of a message constructed from the concatenation of the input
16434 * bytes] ... expiry_time[4 bytes] ...
16440 #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_LEN 4
16443 #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_LEN 4
16454 /* MAC address of v-adaptor associated with the client. If no such v-adapator
16463 * Mask features - V3 licensing (Medford)
16476 #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
16479 #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
16493 * SF-116124-SW for an overview of how this could be used. The license is
16503 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_LEN 4
16506 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_LEN 4
16524 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_LEN 4
16526 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_OFST 4
16530 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_LEN 4
16532 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_LEN 4
16535 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_LEN 4
16537 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_LEN 4
16543 #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_LEN 4
16553 #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
16555 #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
16561 * Change configuration related to the parser-dispatcher subsystem.
16572 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LEN(num) (8+4*(num))
16573 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_NUM(len) (((len)-8)/4)
16576 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4
16577 /* enum: Per-TXQ enable for multicast UDP destination lookup for possible
16581 /* enum: Per-v-adaptor enable for suppression of self-transmissions on the
16589 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4
16590 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4
16595 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_LEN 4
16596 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_MINNUM 1
16606 * Read configuration related to the parser-dispatcher subsystem.
16617 #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4
16623 #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4
16624 #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4
16627 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4
16630 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num))
16631 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) (((len)-0)/4)
16636 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4
16637 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM 1
16660 #define MC_CMD_GET_PORT_MODES_OUT_MODES_LEN 4
16662 #define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST 4
16663 #define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_LEN 4
16666 #define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN 4
16674 #define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN 4
16676 #define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST 4
16677 #define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN 4
16680 #define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN 4
16691 #define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN 4
16710 #define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN 4
16713 #define MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_WIDTH 1
16715 #define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST 4
16716 #define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN 4
16737 #define MC_CMD_GET_WORKAROUNDS_OUT_IMPLEMENTED_LEN 4
16738 #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_OFST 4
16739 #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_LEN 4
16749 * - before adding code that queries this workaround, remember that there's
16772 * 1,3 = 0x00030001
16775 #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_LEN 4
16784 * set to 1.
16786 #define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_OFST 4
16787 #define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_LEN 4
16819 * administrator-level operations that are not allowed from the local host once
16821 * SF-117064-DG for background).
16830 #define MC_CMD_PRIVILEGE_MASK_OUT_LEN 4
16833 #define MC_CMD_PRIVILEGE_MASK_OUT_OLD_MASK_LEN 4
16848 * e.g. VF 1,3 = 0x00030001
16851 #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_LEN 4
16859 #define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_OFST 4
16860 #define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_LEN 4
16869 #define MC_CMD_LINK_STATE_MODE_OUT_LEN 4
16871 #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_LEN 4
16890 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_LEN 4
16892 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST 4
16893 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_LEN 4
16896 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_LEN 4
16899 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_LEN 4
16900 /* Total number of mismatched bits between pairs in area 1 */
16902 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_LEN 4
16903 /* Total number of unexpectedly clear (set in B but not A) bits in area 1 */
16905 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_LEN 4
16906 /* Total number of unexpectedly clear (set in A but not B) bits in area 1 */
16908 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_LEN 4
16909 /* Checksum of data after logical OR of pairs in area 1 */
16911 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_LEN 4
16914 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_LEN 4
16917 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_LEN 4
16920 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_LEN 4
16923 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_LEN 4
16929 * only effects non-admin functions unless the admin privilege itself is
16941 #define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_LEN 4
16949 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST 4
16950 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_LEN 4
16951 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_OFST 4
16954 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_OFST 4
16961 #define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_LEN 4
16966 #define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_LEN 4
16973 #define TUNNEL_ENCAP_UDP_PORT_ENTRY_LEN 4
16997 * parser-dispatcher will attempt to parse traffic on these ports as tunnel
17008 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMIN 4
17011 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LEN(num) (4+4*(num))
17012 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_NUM(len) (((len)-4)/4)
17018 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_UNLOADING_WIDTH 1
17025 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_OFST 4
17026 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_LEN 4
17038 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_OUT_RESETTING_WIDTH 1
17043 …- on TX the send descriptor explicitly specifies encapsulation. These rules are per-VNIC, i.e. onl…
17054 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_LEN 4
17055 /* Any non-zero bits other than the ones named below or an unsupported
17059 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_OFST 4
17060 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_LEN 4
17061 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_OFST 4
17063 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_WIDTH 1
17064 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_OFST 4
17065 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_LBN 1
17066 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_WIDTH 1
17067 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_OFST 4
17069 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_WIDTH 1
17070 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_OFST 4
17072 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_WIDTH 1
17073 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_OFST 4
17074 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_LBN 4
17075 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_WIDTH 1
17093 * case of IPv4, the IP should be in the first 4 bytes and all other bytes
17100 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_LEN 1
17103 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_LEN 1
17106 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_WIDTH 1
17112 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_LEN 4
17115 #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_LEN 4
17118 #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_LEN 4
17131 #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_LEN 4
17134 #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_LEN 4
17140 * defined in SF-120734-TC with more information in SF-122717-TC.
17142 #define FUNCTION_PERSONALITY_LEN 4
17144 #define FUNCTION_PERSONALITY_ID_LEN 4
17147 /* enum: Function has an EF100-style function control window and VI windows
17159 /* enum: Function is a Xilinx acceleration device - management function */
17161 /* enum: Function is a Xilinx acceleration device - user function */
17195 #define PCIE_FUNCTION_INTF_OFST 4
17196 #define PCIE_FUNCTION_INTF_LEN 4