Lines Matching +full:0 +full:x420
117 _efx_writeq(efx, value->u64[0], reg + 0); in efx_writeo()
120 _efx_writed(efx, value->u32[0], reg + 0); in efx_writeo()
141 __raw_writeq((__force u64)value->u64[0], membase + addr); in efx_sram_writeq()
143 __raw_writel((__force u32)value->u32[0], membase + addr); in efx_sram_writeq()
158 _efx_writed(efx, value->u32[0], reg); in efx_writed()
168 value->u32[0] = _efx_readd(efx, reg + 0); in efx_reado()
188 value->u64[0] = (__force __le64)__raw_readq(membase + addr); in efx_sram_readq()
190 value->u32[0] = (__force __le32)__raw_readl(membase + addr); in efx_sram_readq()
204 value->u32[0] = _efx_readd(efx, reg); in efx_readd()
228 #define EFX_DEFAULT_VI_STRIDE 0x2000
229 #define EF100_DEFAULT_VI_STRIDE 0x10000
249 _efx_writeq(efx, value->u64[0], reg + 0); in _efx_writeo_page()
252 _efx_writed(efx, value->u32[0], reg + 0); in _efx_writeo_page()
261 BUILD_BUG_ON_ZERO((reg) != 0x830 && (reg) != 0xa10), \
276 BUILD_BUG_ON_ZERO((reg) != 0x180 && \
277 (reg) != 0x200 && \
278 (reg) != 0x400 && \
279 (reg) != 0x420 && \
280 (reg) != 0x830 && \
281 (reg) != 0x83c && \
282 (reg) != 0xa18 && \
283 (reg) != 0xa1c), \
287 * in the BIU means that writes to TIMER_COMMAND[0] invalidate the
297 if (page == 0) { in _efx_writed_page_locked()
307 reg + BUILD_BUG_ON_ZERO((reg) != 0x420), \