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1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2012 Solarflare Communications Inc.
15 * F<type>_<min-rev><max-rev>_
20 * -------------------------------------------------------------
25 * <min-rev> is the first revision to which the definition applies:
32 * then <max-rev> is the last revision to which the definition applies;
59 #define FRF_AZ_KER_INT_CHAR_WIDTH 1
61 #define FRF_AZ_KER_INT_KER_WIDTH 1
63 #define FRF_AZ_DRV_INT_EN_KER_WIDTH 1
70 #define FRF_BZ_CHAR_INT_CHAR_WIDTH 1
72 #define FRF_BZ_CHAR_INT_KER_WIDTH 1
74 #define FRF_BZ_DRV_INT_EN_CHAR_WIDTH 1
79 #define FRF_AZ_NORM_INT_VEC_DIS_KER_WIDTH 1
86 #define FRF_BZ_NORM_INT_VEC_DIS_CHAR_WIDTH 1
103 #define FRF_BB_BDMRD_CPLF_FULL_WIDTH 1
107 #define FRF_CZ_TX_MRG_TAGS_WIDTH 1
109 #define FRF_AB_TRGT_MASK_ALL_WIDTH 1
113 #define FRF_AB_TX_RREQ_MASK_EN_WIDTH 1
115 #define FRF_AB_PE_EIDLE_DIS_WIDTH 1
117 #define FRF_AA_FC_BLOCKING_EN_WIDTH 1
119 #define FRF_BZ_B2B_REQ_EN_WIDTH 1
121 #define FRF_AA_B2B_REQ_EN_WIDTH 1
123 #define FRF_BB_FC_BLOCKING_EN_WIDTH 1
137 #define FRF_AZ_US_DISABLE_WIDTH 1
139 #define FRF_AZ_TLP_EP_WIDTH 1
141 #define FRF_AZ_ATTR_SEL_WIDTH 1
142 #define FRF_AZ_TD_SEL_LBN 1
143 #define FRF_AZ_TD_SEL_WIDTH 1
145 #define FRF_AZ_TLP_TD_WIDTH 1
150 #define FRF_AB_EE_SPI_HCMD_CMD_EN_WIDTH 1
152 #define FRF_AB_EE_WR_TIMER_ACTIVE_WIDTH 1
154 #define FRF_AB_EE_SPI_HCMD_SF_SEL_WIDTH 1
158 #define FRF_AB_EE_SPI_HCMD_READ_WIDTH 1
169 #define FRF_CZ_USREV_DIS_WIDTH 1
201 #define FRF_AB_EE_SF_FASTRD_EN_WIDTH 1
205 #define FRF_AB_EE_VPD_WIP_POLL_WIDTH 1
223 #define FRF_AB_EE_VPD_ACCESS_ON_WIDTH 1
225 #define FRF_AB_EE_VPD_ACCESS_BLOCK_WIDTH 1
227 #define FRF_AB_EE_VPD_DEV_SF_SEL_WIDTH 1
228 #define FRF_AB_EE_VPD_EN_AD9_MODE_LBN 1
229 #define FRF_AB_EE_VPD_EN_AD9_MODE_WIDTH 1
231 #define FRF_AB_EE_VPD_EN_WIDTH 1
236 #define FRF_AB_EE_VPD_CYCLE_PENDING_WIDTH 1
238 #define FRF_AB_EE_VPD_CYC_WRITE_WIDTH 1
257 #define FRF_BB_PCIE_CORE_INDIRECT_ACCESS_DIR_WIDTH 1
269 #define FRF_BB_AER_DIS_WIDTH 1
271 #define FRF_BB_EE_STRAP_EN_WIDTH 1
277 #define FRF_AB_ONCHIP_SRAM_WIDTH 1
279 #define FRF_AB_SF_PRST_WIDTH 1
281 #define FRF_AB_EE_PRST_WIDTH 1
283 #define FRF_AB_ATE_MODE_WIDTH 1
302 #define FRF_AB_GPIO15_OEN_WIDTH 1
304 #define FRF_AB_GPIO14_OEN_WIDTH 1
306 #define FRF_AB_GPIO13_OEN_WIDTH 1
308 #define FRF_AB_GPIO12_OEN_WIDTH 1
310 #define FRF_AB_GPIO11_OEN_WIDTH 1
312 #define FRF_AB_GPIO10_OEN_WIDTH 1
314 #define FRF_AB_GPIO9_OEN_WIDTH 1
316 #define FRF_AB_GPIO8_OEN_WIDTH 1
318 #define FRF_AB_GPIO15_OUT_WIDTH 1
320 #define FRF_AB_GPIO14_OUT_WIDTH 1
322 #define FRF_AB_GPIO13_OUT_WIDTH 1
324 #define FRF_AB_GPIO12_OUT_WIDTH 1
326 #define FRF_AB_GPIO11_OUT_WIDTH 1
328 #define FRF_AB_GPIO10_OUT_WIDTH 1
330 #define FRF_AB_GPIO9_OUT_WIDTH 1
332 #define FRF_AB_GPIO8_OUT_WIDTH 1
334 #define FRF_AB_GPIO15_IN_WIDTH 1
336 #define FRF_AB_GPIO14_IN_WIDTH 1
338 #define FRF_AB_GPIO13_IN_WIDTH 1
340 #define FRF_AB_GPIO12_IN_WIDTH 1
342 #define FRF_AB_GPIO11_IN_WIDTH 1
344 #define FRF_AB_GPIO10_IN_WIDTH 1
346 #define FRF_AB_GPIO9_IN_WIDTH 1
348 #define FRF_AB_GPIO8_IN_WIDTH 1
350 #define FRF_AB_GPIO15_PWRUP_VALUE_WIDTH 1
352 #define FRF_AB_GPIO14_PWRUP_VALUE_WIDTH 1
354 #define FRF_AB_GPIO13_PWRUP_VALUE_WIDTH 1
356 #define FRF_AB_GPIO12_PWRUP_VALUE_WIDTH 1
358 #define FRF_AB_GPIO11_PWRUP_VALUE_WIDTH 1
360 #define FRF_AB_GPIO10_PWRUP_VALUE_WIDTH 1
362 #define FRF_AB_GPIO9_PWRUP_VALUE_WIDTH 1
364 #define FRF_AB_GPIO8_PWRUP_VALUE_WIDTH 1
366 #define FRF_AB_CLK156_OUT_EN_WIDTH 1
368 #define FRF_AB_USE_NIC_CLK_WIDTH 1
370 #define FRF_AB_GPIO5_OEN_WIDTH 1
372 #define FRF_AB_GPIO4_OEN_WIDTH 1
374 #define FRF_AB_GPIO3_OEN_WIDTH 1
376 #define FRF_AB_GPIO2_OEN_WIDTH 1
378 #define FRF_AB_GPIO1_OEN_WIDTH 1
380 #define FRF_AB_GPIO0_OEN_WIDTH 1
382 #define FRF_AB_GPIO7_OUT_WIDTH 1
384 #define FRF_AB_GPIO6_OUT_WIDTH 1
386 #define FRF_AB_GPIO5_OUT_WIDTH 1
388 #define FRF_AB_GPIO4_OUT_WIDTH 1
390 #define FRF_AB_GPIO3_OUT_WIDTH 1
392 #define FRF_AB_GPIO2_OUT_WIDTH 1
394 #define FRF_AB_GPIO1_OUT_WIDTH 1
396 #define FRF_AB_GPIO0_OUT_WIDTH 1
398 #define FRF_AB_GPIO7_IN_WIDTH 1
400 #define FRF_AB_GPIO6_IN_WIDTH 1
402 #define FRF_AB_GPIO5_IN_WIDTH 1
404 #define FRF_AB_GPIO4_IN_WIDTH 1
406 #define FRF_AB_GPIO3_IN_WIDTH 1
408 #define FRF_AB_GPIO2_IN_WIDTH 1
410 #define FRF_AB_GPIO1_IN_WIDTH 1
412 #define FRF_AB_GPIO0_IN_WIDTH 1
414 #define FRF_AB_GPIO7_PWRUP_VALUE_WIDTH 1
416 #define FRF_AB_GPIO6_PWRUP_VALUE_WIDTH 1
418 #define FRF_AB_GPIO5_PWRUP_VALUE_WIDTH 1
420 #define FRF_AB_GPIO4_PWRUP_VALUE_WIDTH 1
422 #define FRF_AB_GPIO3_PWRUP_VALUE_WIDTH 1
424 #define FRF_AB_GPIO2_PWRUP_VALUE_WIDTH 1
425 #define FRF_AB_GPIO1_PWRUP_VALUE_LBN 1
426 #define FRF_AB_GPIO1_PWRUP_VALUE_WIDTH 1
428 #define FRF_AB_GPIO0_PWRUP_VALUE_WIDTH 1
433 #define FRF_AB_EXT_PHY_RST_CTL_WIDTH 1
435 #define FRF_AB_XAUI_SD_RST_CTL_WIDTH 1
437 #define FRF_AB_PCIE_SD_RST_CTL_WIDTH 1
439 #define FRF_AA_PCIX_RST_CTL_WIDTH 1
441 #define FRF_BB_BIU_RST_CTL_WIDTH 1
443 #define FRF_AB_PCIE_STKY_RST_CTL_WIDTH 1
445 #define FRF_AB_PCIE_NSTKY_RST_CTL_WIDTH 1
447 #define FRF_AB_PCIE_CORE_RST_CTL_WIDTH 1
449 #define FRF_AB_XGRX_RST_CTL_WIDTH 1
451 #define FRF_AB_XGTX_RST_CTL_WIDTH 1
453 #define FRF_AB_EM_RST_CTL_WIDTH 1
455 #define FRF_AB_EV_RST_CTL_WIDTH 1
457 #define FRF_AB_SR_RST_CTL_WIDTH 1
459 #define FRF_AB_RX_RST_CTL_WIDTH 1
461 #define FRF_AB_TX_RST_CTL_WIDTH 1
463 #define FRF_AB_EE_RST_CTL_WIDTH 1
465 #define FRF_AB_CS_RST_CTL_WIDTH 1
469 #define FRF_AB_RST_EXT_PHY_WIDTH 1
471 #define FRF_AB_RST_XAUI_SD_WIDTH 1
473 #define FRF_AB_RST_PCIE_SD_WIDTH 1
475 #define FRF_AA_RST_PCIX_WIDTH 1
477 #define FRF_BB_RST_BIU_WIDTH 1
479 #define FRF_AB_RST_PCIE_STKY_WIDTH 1
481 #define FRF_AB_RST_PCIE_NSTKY_WIDTH 1
483 #define FRF_AB_RST_PCIE_CORE_WIDTH 1
485 #define FRF_AB_RST_XGRX_WIDTH 1
487 #define FRF_AB_RST_XGTX_WIDTH 1
489 #define FRF_AB_RST_EM_WIDTH 1
491 #define FRF_AB_RST_EV_WIDTH 1
493 #define FRF_AB_RST_SR_WIDTH 1
495 #define FRF_AB_RST_RX_WIDTH 1
497 #define FRF_AB_RST_TX_WIDTH 1
499 #define FRF_AB_RST_SF_WIDTH 1
501 #define FRF_AB_RST_CS_WIDTH 1
504 #define FRF_AB_EXT_PHY_RST_DUR_LBN 1
512 #define FFE_AB_EXT_PHY_RST_DUR_160US 1
515 #define FRF_AB_SWRST_WIDTH 1
520 #define FRF_CZ_SRAM_PERR_INT_P_KER_EN_WIDTH 1
522 #define FRF_AB_PCI_BUSERR_INT_KER_EN_WIDTH 1
524 #define FRF_CZ_MBU_PERR_INT_KER_EN_WIDTH 1
526 #define FRF_AZ_SRAM_OOB_INT_KER_EN_WIDTH 1
528 #define FRF_AZ_BUFID_OOB_INT_KER_EN_WIDTH 1
530 #define FRF_AZ_MEM_PERR_INT_KER_EN_WIDTH 1
532 #define FRF_AZ_RBUF_OWN_INT_KER_EN_WIDTH 1
534 #define FRF_AZ_TBUF_OWN_INT_KER_EN_WIDTH 1
536 #define FRF_AZ_RDESCQ_OWN_INT_KER_EN_WIDTH 1
538 #define FRF_AZ_TDESCQ_OWN_INT_KER_EN_WIDTH 1
540 #define FRF_AZ_EVQ_OWN_INT_KER_EN_WIDTH 1
542 #define FRF_AZ_EVF_OFLO_INT_KER_EN_WIDTH 1
544 #define FRF_AZ_ILL_ADR_INT_KER_EN_WIDTH 1
546 #define FRF_AZ_SRM_PERR_INT_KER_EN_WIDTH 1
548 #define FRF_CZ_SRAM_PERR_INT_P_KER_WIDTH 1
550 #define FRF_AB_PCI_BUSERR_INT_KER_WIDTH 1
552 #define FRF_CZ_MBU_PERR_INT_KER_WIDTH 1
554 #define FRF_AZ_SRAM_OOB_INT_KER_WIDTH 1
556 #define FRF_AZ_BUFID_DC_OOB_INT_KER_WIDTH 1
558 #define FRF_AZ_MEM_PERR_INT_KER_WIDTH 1
560 #define FRF_AZ_RBUF_OWN_INT_KER_WIDTH 1
562 #define FRF_AZ_TBUF_OWN_INT_KER_WIDTH 1
564 #define FRF_AZ_RDESCQ_OWN_INT_KER_WIDTH 1
566 #define FRF_AZ_TDESCQ_OWN_INT_KER_WIDTH 1
568 #define FRF_AZ_EVQ_OWN_INT_KER_WIDTH 1
570 #define FRF_AZ_EVF_OFLO_INT_KER_WIDTH 1
571 #define FRF_AZ_ILL_ADR_INT_KER_LBN 1
572 #define FRF_AZ_ILL_ADR_INT_KER_WIDTH 1
574 #define FRF_AZ_SRM_PERR_INT_KER_WIDTH 1
579 #define FRF_CZ_SRAM_PERR_INT_P_CHAR_EN_WIDTH 1
581 #define FRF_BB_PCI_BUSERR_INT_CHAR_EN_WIDTH 1
583 #define FRF_CZ_MBU_PERR_INT_CHAR_EN_WIDTH 1
585 #define FRF_BZ_SRAM_OOB_INT_CHAR_EN_WIDTH 1
587 #define FRF_BZ_BUFID_OOB_INT_CHAR_EN_WIDTH 1
589 #define FRF_BZ_MEM_PERR_INT_CHAR_EN_WIDTH 1
591 #define FRF_BZ_RBUF_OWN_INT_CHAR_EN_WIDTH 1
593 #define FRF_BZ_TBUF_OWN_INT_CHAR_EN_WIDTH 1
595 #define FRF_BZ_RDESCQ_OWN_INT_CHAR_EN_WIDTH 1
597 #define FRF_BZ_TDESCQ_OWN_INT_CHAR_EN_WIDTH 1
599 #define FRF_BZ_EVQ_OWN_INT_CHAR_EN_WIDTH 1
601 #define FRF_BZ_EVF_OFLO_INT_CHAR_EN_WIDTH 1
603 #define FRF_BZ_ILL_ADR_INT_CHAR_EN_WIDTH 1
605 #define FRF_BZ_SRM_PERR_INT_CHAR_EN_WIDTH 1
607 #define FRF_CZ_SRAM_PERR_INT_P_CHAR_WIDTH 1
609 #define FRF_BB_PCI_BUSERR_INT_CHAR_WIDTH 1
611 #define FRF_CZ_MBU_PERR_INT_CHAR_WIDTH 1
613 #define FRF_BZ_SRAM_OOB_INT_CHAR_WIDTH 1
615 #define FRF_BZ_BUFID_DC_OOB_INT_CHAR_WIDTH 1
617 #define FRF_BZ_MEM_PERR_INT_CHAR_WIDTH 1
619 #define FRF_BZ_RBUF_OWN_INT_CHAR_WIDTH 1
621 #define FRF_BZ_TBUF_OWN_INT_CHAR_WIDTH 1
623 #define FRF_BZ_RDESCQ_OWN_INT_CHAR_WIDTH 1
625 #define FRF_BZ_TDESCQ_OWN_INT_CHAR_WIDTH 1
627 #define FRF_BZ_EVQ_OWN_INT_CHAR_WIDTH 1
629 #define FRF_BZ_EVF_OFLO_INT_CHAR_WIDTH 1
630 #define FRF_BZ_ILL_ADR_INT_CHAR_LBN 1
631 #define FRF_BZ_ILL_ADR_INT_CHAR_WIDTH 1
633 #define FRF_BZ_SRM_PERR_INT_CHAR_WIDTH 1
667 #define FRF_CZ_CS_PORT_FPE_LBN 1
679 #define FRF_AB_CS_BIU_DEBUG_ADDR_LBN 1
682 #define FRF_AZ_CS_DEBUG_EN_WIDTH 1
684 /* DRIVER_REG: Driver scratch register [0-7] */
716 #define FRF_AB_PCIE_OFFSETEN_H_WIDTH 1
718 #define FRF_AB_PCIE_OFFSETEN_L_WIDTH 1
720 #define FRF_AB_PCIE_HIVMODE_H_WIDTH 1
722 #define FRF_AB_PCIE_HIVMODE_L_WIDTH 1
724 #define FRF_AB_PCIE_PARRESET_H_WIDTH 1
726 #define FRF_AB_PCIE_PARRESET_L_WIDTH 1
728 #define FRF_AB_PCIE_LPBKWDRV_H_WIDTH 1
730 #define FRF_AB_PCIE_LPBKWDRV_L_WIDTH 1
741 #define FFE_AB_PCIE_RXTERMADJ_MIN17PCNT 1
749 #define FFE_AB_PCIE_TXTERMADJ_MIN17PCNT 1
757 #define FFE_AB_PCIE_RXEQCTL_MIN 1
810 #define FRF_AB_PCIE_FASTINIT_H_WIDTH 1
812 #define FRF_AB_PCIE_FASTINIT_L_WIDTH 1
814 #define FRF_AB_PCIE_CTCDISABLE_H_WIDTH 1
816 #define FRF_AB_PCIE_CTCDISABLE_L_WIDTH 1
818 #define FRF_AB_PCIE_PRBSSYNC_H_WIDTH 1
820 #define FRF_AB_PCIE_PRBSSYNC_L_WIDTH 1
822 #define FRF_AB_PCIE_PRBSERRACK_H_WIDTH 1
824 #define FRF_AB_PCIE_PRBSERRACK_L_WIDTH 1
853 #define FRF_AZ_EVQ_RPTR_VLD_WIDTH 1
892 #define FRF_AZ_EVQ_OWNERR_CTL_WIDTH 1
898 /* EVQ_CNT1_REG: Event counter 1 register */
942 #define FRF_AZ_BUF_TBL_MODE_WIDTH 1
947 #define FRF_AZ_SRM_CLK_TMP_EN_WIDTH 1
959 #define FRF_AZ_SRM_OOB_ADR_INTEN_WIDTH 1
961 #define FRF_AZ_SRM_OOB_BUF_INTEN_WIDTH 1
963 #define FRF_AZ_SRM_INIT_EN_WIDTH 1
965 #define FRF_AZ_SRM_NUM_BANK_WIDTH 1
972 #define FRF_AZ_BUF_UPD_CMD_WIDTH 1
974 #define FRF_AZ_BUF_CLR_CMD_WIDTH 1
988 #define FRF_CZ_BYPASS_ECC_WIDTH 1
990 #define FRF_CZ_SEC_INT_WIDTH 1
991 #define FRF_CZ_FORCE_SRAM_DOUBLE_ERR_LBN 1
992 #define FRF_CZ_FORCE_SRAM_DOUBLE_ERR_WIDTH 1
994 #define FRF_AB_FORCE_SRAM_PERR_WIDTH 1
996 #define FRF_CZ_FORCE_SRAM_SINGLE_ERR_WIDTH 1
1003 #define FRF_CZ_RX_HDR_SPLIT_EN_WIDTH 1
1011 #define FRF_BZ_RX_TCP_SUP_WIDTH 1
1013 #define FRF_BZ_RX_INGR_EN_WIDTH 1
1015 #define FRF_BZ_RX_IP_HASH_WIDTH 1
1017 #define FRF_BZ_RX_HASH_ALG_WIDTH 1
1019 #define FRF_BZ_RX_HASH_INSRT_HDR_WIDTH 1
1021 #define FRF_BZ_RX_DESC_PUSH_EN_WIDTH 1
1023 #define FRF_BZ_RX_RDW_PATCH_EN_WIDTH 1
1027 #define FRF_BZ_RX_OWNERR_CTL_WIDTH 1
1031 #define FRF_AA_RX_DESC_PUSH_EN_WIDTH 1
1033 #define FRF_AA_RX_RDW_PATCH_EN_WIDTH 1
1039 #define FRF_AA_RX_OWNERR_CTL_WIDTH 1
1052 #define FRF_BZ_RX_XOFF_MAC_TH_LBN 1
1054 #define FRF_AA_RX_XOFF_MAC_TH_LBN 1
1057 #define FRF_AZ_RX_XOFF_MAC_EN_WIDTH 1
1066 #define FRF_CZ_RX_FILTER_ALL_VLAN_ETHERTYPES_WIDTH 1
1072 #define FRF_CZ_MULTICAST_NOMATCH_RSS_ENABLED_WIDTH 1
1074 #define FRF_CZ_MULTICAST_NOMATCH_IP_OVERRIDE_WIDTH 1
1078 #define FRF_CZ_UNICAST_NOMATCH_RSS_ENABLED_WIDTH 1
1080 #define FRF_CZ_UNICAST_NOMATCH_IP_OVERRIDE_WIDTH 1
1082 #define FRF_BZ_SCATTER_ENBL_NO_MATCH_Q_WIDTH 1
1097 #define FRF_AZ_RX_FLUSH_DESCQ_CMD_WIDTH 1
1116 #define FRF_AZ_RX_DESC_PUSH_CMD_WIDTH 1
1128 #define FFE_AZ_RX_DC_SIZE_16 1
1131 /* RX_DC_PF_WM_REG: Receive descriptor cache pre-fetch watermark register */
1155 #define FRF_AA_RX_ISCSI_DIS_WIDTH 1
1157 #define FRF_AA_RX_SW_RST_REG_WIDTH 1
1159 #define FRF_AA_RX_NODESC_WAIT_DIS_WIDTH 1
1161 #define FRF_AA_RX_SELF_RST_EN_WIDTH 1
1190 #define FRF_CZ_RX_RSS_IPV6_THASH_ENABLE_WIDTH 1
1192 #define FRF_CZ_RX_RSS_IPV6_IP_THASH_ENABLE_WIDTH 1
1194 #define FRF_CZ_RX_RSS_IPV6_TCP_SUPPRESS_WIDTH 1
1201 #define FRF_AZ_TX_FLUSH_DESCQ_CMD_WIDTH 1
1220 #define FRF_AZ_TX_DESC_PUSH_CMD_WIDTH 1
1229 #define FFE_AZ_TX_DC_SIZE_16 1
1248 #define FRF_CZ_TX_FILTER_TEST_MODE_BIT_WIDTH 1
1262 #define FRF_CZ_TX_FILTER_ALL_VLAN_ETHERTYPES_BIT_WIDTH 1
1266 #define FRF_CZ_TX_FILTER_EN_BIT_WIDTH 1
1270 #define FRF_AZ_TX_NO_EOP_DISC_EN_WIDTH 1
1272 #define FRF_AZ_TX_P1_PRI_EN_WIDTH 1
1274 #define FRF_AZ_TX_OWNERR_CTL_WIDTH 1
1275 #define FRF_AA_TX_NON_IP_DROP_DIS_LBN 1
1276 #define FRF_AA_TX_NON_IP_DROP_DIS_WIDTH 1
1278 #define FRF_AZ_TX_IP_ID_REP_EN_WIDTH 1
1294 #define FRF_AZ_TX_PUSH_EN_WIDTH 1
1296 #define FRF_AZ_TX_PUSH_CHK_DIS_WIDTH 1
1298 #define FRF_AZ_TX_D_FF_FULL_P0_WIDTH 1
1300 #define FRF_AZ_TX_DMAR_ST_P0_WIDTH 1
1302 #define FRF_AZ_TX_DMAQ_ST_WIDTH 1
1306 #define FRF_AZ_TX_DROP_ABORT_EN_WIDTH 1
1308 #define FRF_AZ_TX_SOFT_EVT_EN_WIDTH 1
1310 #define FRF_AZ_TX_PS_EVT_DIS_WIDTH 1
1312 #define FRF_AZ_TX_RX_SPACER_EN_WIDTH 1
1320 #define FRF_AZ_TX_ONLY1TAG_WIDTH 1
1324 #define FRF_AZ_TX_ONE_PKT_PER_Q_WIDTH 1
1326 #define FRF_AZ_TX_DIS_NON_IP_EV_WIDTH 1
1328 #define FRF_AA_TX_DMA_FF_THR_WIDTH 1
1332 #define FRF_AA_TX_TCP_DIS_WIDTH 1
1334 #define FRF_BZ_TX_FLUSH_MIN_LEN_EN_WIDTH 1
1336 #define FRF_AA_TX_IP_DIS_WIDTH 1
1341 #define FFE_AZ_TX_MAX_CPL_4 1
1347 #define FFE_AZ_TX_MAX_PREF_8 1
1369 #define FRF_BB_TX_VLAN_EN_WIDTH 1
1371 #define FRF_BB_TX_VLAN7_PORT1_EN_WIDTH 1
1373 #define FRF_BB_TX_VLAN7_PORT0_EN_WIDTH 1
1377 #define FRF_BB_TX_VLAN6_PORT1_EN_WIDTH 1
1379 #define FRF_BB_TX_VLAN6_PORT0_EN_WIDTH 1
1383 #define FRF_BB_TX_VLAN5_PORT1_EN_WIDTH 1
1385 #define FRF_BB_TX_VLAN5_PORT0_EN_WIDTH 1
1389 #define FRF_BB_TX_VLAN4_PORT1_EN_WIDTH 1
1391 #define FRF_BB_TX_VLAN4_PORT0_EN_WIDTH 1
1395 #define FRF_BB_TX_VLAN3_PORT1_EN_WIDTH 1
1397 #define FRF_BB_TX_VLAN3_PORT0_EN_WIDTH 1
1401 #define FRF_BB_TX_VLAN2_PORT1_EN_WIDTH 1
1403 #define FRF_BB_TX_VLAN2_PORT0_EN_WIDTH 1
1407 #define FRF_BB_TX_VLAN1_PORT1_EN_WIDTH 1
1409 #define FRF_BB_TX_VLAN1_PORT0_EN_WIDTH 1
1413 #define FRF_BB_TX_VLAN0_PORT1_EN_WIDTH 1
1415 #define FRF_BB_TX_VLAN0_PORT0_EN_WIDTH 1
1422 #define FRF_BZ_TX_MADR0_FIL_EN_WIDTH 1
1424 #define FRF_BB_TX_IPFIL31_PORT_EN_WIDTH 1
1426 #define FRF_BB_TX_IPFIL30_PORT_EN_WIDTH 1
1428 #define FRF_BB_TX_IPFIL29_PORT_EN_WIDTH 1
1430 #define FRF_BB_TX_IPFIL28_PORT_EN_WIDTH 1
1432 #define FRF_BB_TX_IPFIL27_PORT_EN_WIDTH 1
1434 #define FRF_BB_TX_IPFIL26_PORT_EN_WIDTH 1
1436 #define FRF_BB_TX_IPFIL25_PORT_EN_WIDTH 1
1438 #define FRF_BB_TX_IPFIL24_PORT_EN_WIDTH 1
1440 #define FRF_BB_TX_IPFIL23_PORT_EN_WIDTH 1
1442 #define FRF_BB_TX_IPFIL22_PORT_EN_WIDTH 1
1444 #define FRF_BB_TX_IPFIL21_PORT_EN_WIDTH 1
1446 #define FRF_BB_TX_IPFIL20_PORT_EN_WIDTH 1
1448 #define FRF_BB_TX_IPFIL19_PORT_EN_WIDTH 1
1450 #define FRF_BB_TX_IPFIL18_PORT_EN_WIDTH 1
1452 #define FRF_BB_TX_IPFIL17_PORT_EN_WIDTH 1
1454 #define FRF_BB_TX_IPFIL16_PORT_EN_WIDTH 1
1456 #define FRF_BB_TX_IPFIL15_PORT_EN_WIDTH 1
1458 #define FRF_BB_TX_IPFIL14_PORT_EN_WIDTH 1
1460 #define FRF_BB_TX_IPFIL13_PORT_EN_WIDTH 1
1462 #define FRF_BB_TX_IPFIL12_PORT_EN_WIDTH 1
1464 #define FRF_BB_TX_IPFIL11_PORT_EN_WIDTH 1
1466 #define FRF_BB_TX_IPFIL10_PORT_EN_WIDTH 1
1468 #define FRF_BB_TX_IPFIL9_PORT_EN_WIDTH 1
1470 #define FRF_BB_TX_IPFIL8_PORT_EN_WIDTH 1
1472 #define FRF_BB_TX_IPFIL7_PORT_EN_WIDTH 1
1474 #define FRF_BB_TX_IPFIL6_PORT_EN_WIDTH 1
1476 #define FRF_BB_TX_IPFIL5_PORT_EN_WIDTH 1
1478 #define FRF_BB_TX_IPFIL4_PORT_EN_WIDTH 1
1480 #define FRF_BB_TX_IPFIL3_PORT_EN_WIDTH 1
1482 #define FRF_BB_TX_IPFIL2_PORT_EN_WIDTH 1
1484 #define FRF_BB_TX_IPFIL1_PORT_EN_WIDTH 1
1486 #define FRF_BB_TX_IPFIL0_PORT_EN_WIDTH 1
1514 #define FRF_AB_MD_RD_EN_CMD_WIDTH 1
1516 #define FRF_AB_MD_WR_EN_CMD_WIDTH 1
1518 #define FRF_AB_MD_ADDR_CMD_WIDTH 1
1522 #define FRF_AB_MD_PL_WIDTH 1
1524 #define FRF_AB_MD_INT_CLR_WIDTH 1
1526 #define FRF_AB_MD_GC_WIDTH 1
1528 #define FRF_AB_MD_PRSP_WIDTH 1
1530 #define FRF_AB_MD_RIC_WIDTH 1
1531 #define FRF_AB_MD_RDC_LBN 1
1532 #define FRF_AB_MD_RDC_WIDTH 1
1534 #define FRF_AB_MD_WRC_WIDTH 1
1551 #define FRF_AB_MD_PINT_WIDTH 1
1553 #define FRF_AB_MD_DONE_WIDTH 1
1555 #define FRF_AB_MD_BSERR_WIDTH 1
1556 #define FRF_AB_MD_LNFL_LBN 1
1557 #define FRF_AB_MD_LNFL_WIDTH 1
1559 #define FRF_AB_MD_BSY_WIDTH 1
1564 #define FRF_AB_MAC_STAT_DMA_CMD_WIDTH 1
1573 #define FRF_BB_TXFIFO_DRAIN_EN_WIDTH 1
1575 #define FRF_AB_MAC_XG_DISTXCRC_WIDTH 1
1577 #define FRF_AB_MAC_BCAD_ACPT_WIDTH 1
1579 #define FRF_AB_MAC_UC_PROM_WIDTH 1
1581 #define FRF_AB_MAC_LINK_STATUS_WIDTH 1
1586 #define FFE_AB_MAC_SPEED_100M 1
1592 #define FRF_BB_XFP_PHY_INT_POL_SEL_WIDTH 1
1594 #define FRF_BB_XG_PHY_INT_POL_SEL_WIDTH 1
1595 #define FRF_BB_XFP_PHY_INT_MASK_LBN 1
1596 #define FRF_BB_XFP_PHY_INT_MASK_WIDTH 1
1598 #define FRF_BB_XG_PHY_INT_MASK_WIDTH 1
1610 /* GM_CFG1_REG: GMAC configuration register 1 */
1613 #define FRF_AB_GM_SW_RST_WIDTH 1
1615 #define FRF_AB_GM_SIM_RST_WIDTH 1
1617 #define FRF_AB_GM_RST_RX_MAC_CTL_WIDTH 1
1619 #define FRF_AB_GM_RST_TX_MAC_CTL_WIDTH 1
1621 #define FRF_AB_GM_RST_RX_FUNC_WIDTH 1
1623 #define FRF_AB_GM_RST_TX_FUNC_WIDTH 1
1625 #define FRF_AB_GM_LOOP_WIDTH 1
1627 #define FRF_AB_GM_RX_FC_EN_WIDTH 1
1629 #define FRF_AB_GM_TX_FC_EN_WIDTH 1
1631 #define FRF_AB_GM_SYNC_RXEN_WIDTH 1
1633 #define FRF_AB_GM_RX_EN_WIDTH 1
1634 #define FRF_AB_GM_SYNC_TXEN_LBN 1
1635 #define FRF_AB_GM_SYNC_TXEN_WIDTH 1
1637 #define FRF_AB_GM_TX_EN_WIDTH 1
1646 #define FFE_AB_IF_MODE_NIBBLE_MODE 1
1648 #define FRF_AB_GM_HUGE_FRM_EN_WIDTH 1
1650 #define FRF_AB_GM_LEN_CHK_WIDTH 1
1652 #define FRF_AB_GM_PAD_CRC_EN_WIDTH 1
1653 #define FRF_AB_GM_CRC_EN_LBN 1
1654 #define FRF_AB_GM_CRC_EN_WIDTH 1
1656 #define FRF_AB_GM_FD_WIDTH 1
1674 #define FRF_AB_GM_ALT_BOFF_EN_WIDTH 1
1676 #define FRF_AB_GM_BP_NO_BOFF_WIDTH 1
1678 #define FRF_AB_GM_DIS_BOFF_WIDTH 1
1680 #define FRF_AB_GM_EXDEF_TX_EN_WIDTH 1
1694 #define FRF_AB_GM_MAX_BOFF_WIDTH 1
1696 #define FRF_AB_GM_REG_TX_FLOW_EN_WIDTH 1
1697 #define FRF_AB_GM_TEST_PAUSE_LBN 1
1698 #define FRF_AB_GM_TEST_PAUSE_WIDTH 1
1700 #define FRF_AB_GM_SHORT_SLOT_WIDTH 1
1702 /* GM_ADR1_REG: GMAC station address register 1 */
1723 #define FRF_AB_GMF_FTFENRPLY_WIDTH 1
1725 #define FRF_AB_GMF_STFENRPLY_WIDTH 1
1727 #define FRF_AB_GMF_FRFENRPLY_WIDTH 1
1729 #define FRF_AB_GMF_SRFENRPLY_WIDTH 1
1731 #define FRF_AB_GMF_WTMENRPLY_WIDTH 1
1733 #define FRF_AB_GMF_FTFENREQ_WIDTH 1
1735 #define FRF_AB_GMF_STFENREQ_WIDTH 1
1737 #define FRF_AB_GMF_FRFENREQ_WIDTH 1
1739 #define FRF_AB_GMF_SRFENREQ_WIDTH 1
1741 #define FRF_AB_GMF_WTMENREQ_WIDTH 1
1743 #define FRF_AB_GMF_HSTRSTFT_WIDTH 1
1745 #define FRF_AB_GMF_HSTRSTST_WIDTH 1
1747 #define FRF_AB_GMF_HSTRSTFR_WIDTH 1
1748 #define FRF_AB_GMF_HSTRSTSR_LBN 1
1749 #define FRF_AB_GMF_HSTRSTSR_WIDTH 1
1751 #define FRF_AB_GMF_HSTRSTWT_WIDTH 1
1753 /* GMF_CFG1_REG: GMAC FIFO configuration register 1 */
1782 #define FRF_AB_GMF_CFGHDPLX_WIDTH 1
1784 #define FRF_AB_GMF_SRFULL_WIDTH 1
1786 #define FRF_AB_GMF_HSTSRFULLCLR_WIDTH 1
1788 #define FRF_AB_GMF_CFGBYTMODE_WIDTH 1
1790 #define FRF_AB_GMF_HSTDRPLT64_WIDTH 1
1808 #define FRF_BB_TX_SRC_FLTR_EN_WIDTH 1
1810 #define FRF_BB_TX_DROP_CTR_CLR_WIDTH 1
1827 #define FRF_AB_XM_RMTFLT_GEN_WIDTH 1
1829 #define FRF_AB_XM_DEBUG_MODE_WIDTH 1
1831 #define FRF_AB_XM_RX_STAT_EN_WIDTH 1
1833 #define FRF_AB_XM_TX_STAT_EN_WIDTH 1
1835 #define FRF_AB_XM_RX_JUMBO_MODE_WIDTH 1
1837 #define FRF_AB_XM_WAN_MODE_WIDTH 1
1839 #define FRF_AB_XM_INTCLR_MODE_WIDTH 1
1841 #define FRF_AB_XM_CORE_RST_WIDTH 1
1846 #define FRF_AB_XM_TX_PROG_WIDTH 1
1850 #define FRF_AB_XM_FCNTL_WIDTH 1
1852 #define FRF_AB_XM_TXCRC_WIDTH 1
1854 #define FRF_AB_XM_EDRC_WIDTH 1
1856 #define FRF_AB_XM_AUTO_PAD_WIDTH 1
1858 #define FRF_AB_XM_TX_PRMBL_WIDTH 1
1859 #define FRF_AB_XM_TXEN_LBN 1
1860 #define FRF_AB_XM_TXEN_WIDTH 1
1862 #define FRF_AB_XM_TX_RST_WIDTH 1
1867 #define FRF_AB_XM_PASS_LENERR_WIDTH 1
1869 #define FRF_AB_XM_PASS_CRC_ERR_WIDTH 1
1871 #define FRF_AB_XM_PASS_PRMBLE_ERR_WIDTH 1
1873 #define FRF_AB_XM_REJ_BCAST_WIDTH 1
1875 #define FRF_AB_XM_ACPT_ALL_MCAST_WIDTH 1
1877 #define FRF_AB_XM_ACPT_ALL_UCAST_WIDTH 1
1879 #define FRF_AB_XM_AUTO_DEPAD_WIDTH 1
1881 #define FRF_AB_XM_RXCRC_WIDTH 1
1883 #define FRF_AB_XM_RX_PRMBL_WIDTH 1
1884 #define FRF_AB_XM_RXEN_LBN 1
1885 #define FRF_AB_XM_RXEN_WIDTH 1
1887 #define FRF_AB_XM_RX_RST_WIDTH 1
1892 #define FRF_AB_XM_MSK_STA_INTR_WIDTH 1
1894 #define FRF_AB_XM_MSK_STAT_CNTR_HF_WIDTH 1
1896 #define FRF_AB_XM_MSK_STAT_CNTR_OF_WIDTH 1
1898 #define FRF_AB_XM_MSK_PRMBLE_ERR_WIDTH 1
1899 #define FRF_AB_XM_MSK_RMTFLT_LBN 1
1900 #define FRF_AB_XM_MSK_RMTFLT_WIDTH 1
1902 #define FRF_AB_XM_MSK_LCLFLT_WIDTH 1
1909 #define FRF_AB_XM_RX_MAC_STAT_WIDTH 1
1911 #define FRF_AB_XM_TX_MAC_STAT_WIDTH 1
1915 #define FRF_AB_XM_REJ_CNTL_UCAST_WIDTH 1
1917 #define FRF_AB_XM_REJ_CNTL_MCAST_WIDTH 1
1919 #define FRF_AB_XM_ZPAUSE_WIDTH 1
1920 #define FRF_AB_XM_XMIT_PAUSE_LBN 1
1921 #define FRF_AB_XM_XMIT_PAUSE_WIDTH 1
1923 #define FRF_AB_XM_DIS_FCNTL_WIDTH 1
1935 #define FRF_AB_XM_TX_JUMBO_MODE_WIDTH 1
1953 #define FRF_AB_XM_STAT_CNTR_OF_WIDTH 1
1955 #define FRF_AB_XM_STAT_CNTR_HF_WIDTH 1
1957 #define FRF_AB_XM_PRMBLE_ERR_WIDTH 1
1958 #define FRF_AB_XM_RMTFLT_LBN 1
1959 #define FRF_AB_XM_RMTFLT_WIDTH 1
1961 #define FRF_AB_XM_LCLFLT_WIDTH 1
1966 #define FRF_AB_XX_PWRDND_SIG_WIDTH 1
1968 #define FRF_AB_XX_PWRDNC_SIG_WIDTH 1
1970 #define FRF_AB_XX_PWRDNB_SIG_WIDTH 1
1972 #define FRF_AB_XX_PWRDNA_SIG_WIDTH 1
1974 #define FRF_AB_XX_SIM_MODE_WIDTH 1
1976 #define FRF_AB_XX_RSTPLLCD_SIG_WIDTH 1
1978 #define FRF_AB_XX_RSTPLLAB_SIG_WIDTH 1
1980 #define FRF_AB_XX_RESETD_SIG_WIDTH 1
1982 #define FRF_AB_XX_RESETC_SIG_WIDTH 1
1984 #define FRF_AB_XX_RESETB_SIG_WIDTH 1
1986 #define FRF_AB_XX_RESETA_SIG_WIDTH 1
1988 #define FRF_AB_XX_RSTXGXSRX_SIG_WIDTH 1
1990 #define FRF_AB_XX_RSTXGXSTX_SIG_WIDTH 1
1992 #define FRF_AB_XX_SD_RST_ACT_WIDTH 1
1994 #define FRF_AB_XX_PWRDND_EN_WIDTH 1
1996 #define FRF_AB_XX_PWRDNC_EN_WIDTH 1
1998 #define FRF_AB_XX_PWRDNB_EN_WIDTH 1
2000 #define FRF_AB_XX_PWRDNA_EN_WIDTH 1
2002 #define FRF_AB_XX_RSTPLLCD_EN_WIDTH 1
2004 #define FRF_AB_XX_RSTPLLAB_EN_WIDTH 1
2006 #define FRF_AB_XX_RESETD_EN_WIDTH 1
2008 #define FRF_AB_XX_RESETC_EN_WIDTH 1
2010 #define FRF_AB_XX_RESETB_EN_WIDTH 1
2012 #define FRF_AB_XX_RESETA_EN_WIDTH 1
2014 #define FRF_AB_XX_RSTXGXSRX_EN_WIDTH 1
2015 #define FRF_AB_XX_RSTXGXSTX_EN_LBN 1
2016 #define FRF_AB_XX_RSTXGXSTX_EN_WIDTH 1
2018 #define FRF_AB_XX_RST_XX_EN_WIDTH 1
2023 #define FRF_AB_XX_TERMADJ1_WIDTH 1
2025 #define FRF_AB_XX_TERMADJ0_WIDTH 1
2027 #define FRF_AB_XX_HIDRVD_WIDTH 1
2029 #define FRF_AB_XX_LODRVD_WIDTH 1
2031 #define FRF_AB_XX_HIDRVC_WIDTH 1
2033 #define FRF_AB_XX_LODRVC_WIDTH 1
2035 #define FRF_AB_XX_HIDRVB_WIDTH 1
2037 #define FRF_AB_XX_LODRVB_WIDTH 1
2039 #define FRF_AB_XX_HIDRVA_WIDTH 1
2041 #define FRF_AB_XX_LODRVA_WIDTH 1
2043 #define FRF_AB_XX_LPBKD_WIDTH 1
2045 #define FRF_AB_XX_LPBKC_WIDTH 1
2046 #define FRF_AB_XX_LPBKB_LBN 1
2047 #define FRF_AB_XX_LPBKB_WIDTH 1
2049 #define FRF_AB_XX_LPBKA_WIDTH 1
2075 #define FRF_AB_XX_CH3_RX_PRBS_INV_WIDTH 1
2077 #define FRF_AB_XX_CH3_RX_PRBS_CHKEN_WIDTH 1
2081 #define FRF_AB_XX_CH2_RX_PRBS_INV_WIDTH 1
2083 #define FRF_AB_XX_CH2_RX_PRBS_CHKEN_WIDTH 1
2087 #define FRF_AB_XX_CH1_RX_PRBS_INV_WIDTH 1
2089 #define FRF_AB_XX_CH1_RX_PRBS_CHKEN_WIDTH 1
2093 #define FRF_AB_XX_CH0_RX_PRBS_INV_WIDTH 1
2095 #define FRF_AB_XX_CH0_RX_PRBS_CHKEN_WIDTH 1
2099 #define FRF_AB_XX_CH3_TX_PRBS_INV_WIDTH 1
2101 #define FRF_AB_XX_CH3_TX_PRBS_CHKEN_WIDTH 1
2105 #define FRF_AB_XX_CH2_TX_PRBS_INV_WIDTH 1
2107 #define FRF_AB_XX_CH2_TX_PRBS_CHKEN_WIDTH 1
2111 #define FRF_AB_XX_CH1_TX_PRBS_INV_WIDTH 1
2113 #define FRF_AB_XX_CH1_TX_PRBS_CHKEN_WIDTH 1
2116 #define FRF_AB_XX_CH0_TX_PRBS_INV_LBN 1
2117 #define FRF_AB_XX_CH0_TX_PRBS_INV_WIDTH 1
2119 #define FRF_AB_XX_CH0_TX_PRBS_CHKEN_WIDTH 1
2124 #define FRF_AB_XX_REV_LB_EN_WIDTH 1
2126 #define FRF_AB_XX_CH3_DEG_DET_WIDTH 1
2128 #define FRF_AB_XX_CH3_LFSR_LOCK_IND_WIDTH 1
2130 #define FRF_AB_XX_CH3_PRBS_FRUN_WIDTH 1
2132 #define FRF_AB_XX_CH3_ERR_CHK_WIDTH 1
2134 #define FRF_AB_XX_CH2_DEG_DET_WIDTH 1
2136 #define FRF_AB_XX_CH2_LFSR_LOCK_IND_WIDTH 1
2138 #define FRF_AB_XX_CH2_PRBS_FRUN_WIDTH 1
2140 #define FRF_AB_XX_CH2_ERR_CHK_WIDTH 1
2142 #define FRF_AB_XX_CH1_DEG_DET_WIDTH 1
2144 #define FRF_AB_XX_CH1_LFSR_LOCK_IND_WIDTH 1
2146 #define FRF_AB_XX_CH1_PRBS_FRUN_WIDTH 1
2148 #define FRF_AB_XX_CH1_ERR_CHK_WIDTH 1
2150 #define FRF_AB_XX_CH0_DEG_DET_WIDTH 1
2152 #define FRF_AB_XX_CH0_LFSR_LOCK_IND_WIDTH 1
2153 #define FRF_AB_XX_CH0_PRBS_FRUN_LBN 1
2154 #define FRF_AB_XX_CH0_PRBS_FRUN_WIDTH 1
2156 #define FRF_AB_XX_CH0_ERR_CHK_WIDTH 1
2172 #define FRF_AB_XX_FORCE_SIG3_WIDTH 1
2174 #define FRF_AB_XX_FORCE_SIG3_VAL_WIDTH 1
2176 #define FRF_AB_XX_FORCE_SIG2_WIDTH 1
2178 #define FRF_AB_XX_FORCE_SIG2_VAL_WIDTH 1
2180 #define FRF_AB_XX_FORCE_SIG1_WIDTH 1
2182 #define FRF_AB_XX_FORCE_SIG1_VAL_WIDTH 1
2184 #define FRF_AB_XX_FORCE_SIG0_WIDTH 1
2186 #define FRF_AB_XX_FORCE_SIG0_VAL_WIDTH 1
2188 #define FRF_AB_XX_XGXS_LB_EN_WIDTH 1
2190 #define FRF_AB_XX_XGMII_LB_EN_WIDTH 1
2192 #define FRF_AB_XX_MATCH_FAULT_WIDTH 1
2194 #define FRF_AB_XX_ALIGN_DONE_WIDTH 1
2196 #define FRF_AB_XX_SYNC_STAT3_WIDTH 1
2198 #define FRF_AB_XX_SYNC_STAT2_WIDTH 1
2200 #define FRF_AB_XX_SYNC_STAT1_WIDTH 1
2202 #define FRF_AB_XX_SYNC_STAT0_WIDTH 1
2204 #define FRF_AB_XX_COMMA_DET_CH3_WIDTH 1
2206 #define FRF_AB_XX_COMMA_DET_CH2_WIDTH 1
2208 #define FRF_AB_XX_COMMA_DET_CH1_WIDTH 1
2210 #define FRF_AB_XX_COMMA_DET_CH0_WIDTH 1
2212 #define FRF_AB_XX_CGRP_ALIGN_CH3_WIDTH 1
2214 #define FRF_AB_XX_CGRP_ALIGN_CH2_WIDTH 1
2216 #define FRF_AB_XX_CGRP_ALIGN_CH1_WIDTH 1
2218 #define FRF_AB_XX_CGRP_ALIGN_CH0_WIDTH 1
2220 #define FRF_AB_XX_CHAR_ERR_CH3_WIDTH 1
2222 #define FRF_AB_XX_CHAR_ERR_CH2_WIDTH 1
2224 #define FRF_AB_XX_CHAR_ERR_CH1_WIDTH 1
2226 #define FRF_AB_XX_CHAR_ERR_CH0_WIDTH 1
2228 #define FRF_AB_XX_DISPERR_CH3_WIDTH 1
2230 #define FRF_AB_XX_DISPERR_CH2_WIDTH 1
2231 #define FRF_AB_XX_DISPERR_CH1_LBN 1
2232 #define FRF_AB_XX_DISPERR_CH1_WIDTH 1
2234 #define FRF_AB_XX_DISPERR_CH0_WIDTH 1
2246 #define FRF_CZ_RX_HDR_SPLIT_WIDTH 1
2248 #define FRF_AA_RX_RESET_WIDTH 1
2250 #define FRF_AZ_RX_ISCSI_DDIG_EN_WIDTH 1
2252 #define FRF_AZ_RX_ISCSI_HDIG_EN_WIDTH 1
2254 #define FRF_AZ_RX_DESC_PREF_ACT_WIDTH 1
2273 #define FFE_AZ_RX_DESCQ_SIZE_1K 1
2276 #define FRF_AZ_RX_DESCQ_TYPE_WIDTH 1
2277 #define FRF_AZ_RX_DESCQ_JUMBO_LBN 1
2278 #define FRF_AZ_RX_DESCQ_JUMBO_WIDTH 1
2280 #define FRF_AZ_RX_DESCQ_EN_WIDTH 1
2294 #define FRF_CZ_TX_DPT_ETH_FILT_EN_WIDTH 1
2296 #define FRF_CZ_TX_DPT_IP_FILT_EN_WIDTH 1
2298 #define FRF_BZ_TX_NON_IP_DROP_DIS_WIDTH 1
2300 #define FRF_BZ_TX_IP_CHKSM_DIS_WIDTH 1
2302 #define FRF_BZ_TX_TCP_CHKSM_DIS_WIDTH 1
2304 #define FRF_AZ_TX_DESCQ_EN_WIDTH 1
2306 #define FRF_AZ_TX_ISCSI_DDIG_EN_WIDTH 1
2308 #define FRF_AZ_TX_ISCSI_HDIG_EN_WIDTH 1
2327 #define FFE_AZ_TX_DESCQ_SIZE_1K 1
2329 #define FRF_AZ_TX_DESCQ_TYPE_LBN 1
2332 #define FRF_AZ_TX_DESCQ_FLUSH_WIDTH 1
2344 #define FRF_BZ_EVQ_RPTR_IGN_WIDTH 1
2346 #define FRF_AB_EVQ_WKUP_OR_INT_EN_WIDTH 1
2348 #define FRF_CZ_EVQ_DOS_PROTECT_EN_WIDTH 1
2352 #define FRF_AZ_EVQ_EN_WIDTH 1
2360 #define FFE_AZ_EVQ_SIZE_1K 1
2395 #define FRF_AZ_IP_DAT_BUF_SIZE_WIDTH 1
2400 #define FFE_AZ_BUF_ADR_REGN1 1
2416 #define FRF_BZ_RSS_EN_WIDTH 1
2418 #define FRF_BZ_SCATTER_EN_WIDTH 1
2420 #define FRF_BZ_TCP_UDP_WIDTH 1
2437 #define FRF_CZ_RMFT_RSS_EN_WIDTH 1
2439 #define FRF_CZ_RMFT_SCATTER_EN_WIDTH 1
2441 #define FRF_CZ_RMFT_IP_OVERRIDE_WIDTH 1
2445 #define FRF_CZ_RMFT_WILDCARD_MATCH_WIDTH 1
2457 #define FRF_CZ_TIMER_Q_EN_WIDTH 1
2459 #define FRF_CZ_INT_ARMD_WIDTH 1
2461 #define FRF_CZ_INT_PEND_WIDTH 1
2463 #define FRF_CZ_HOST_NOTIFY_MODE_WIDTH 1
2470 #define FFE_CZ_TIMER_MODE_IMMED_START 1
2476 #define FFE_BB_TIMER_MODE_IMMED_START 1
2503 #define FRF_CZ_TIFT_TCP_UDP_WIDTH 1
2522 #define FRF_CZ_TMFT_WILDCARD_MATCH_WIDTH 1
2546 #define FRF_BZ_MSIX_VECTOR_MASK_WIDTH 1
2592 #define FSE_AZ_RX_DESCQ_FLS_DONE_EV 1
2612 #define FSF_BB_GLB_EV_RX_RECOVERY_WIDTH 1
2614 #define FSF_AA_GLB_EV_RX_RECOVERY_WIDTH 1
2616 #define FSF_BB_GLB_EV_XG_MGT_INTR_WIDTH 1
2618 #define FSF_AB_GLB_EV_XFP_PHY0_INTR_WIDTH 1
2620 #define FSF_AB_GLB_EV_XG_PHY0_INTR_WIDTH 1
2622 #define FSF_AB_GLB_EV_G_PHY0_INTR_WIDTH 1
2626 #define FSF_AZ_NET_IVEC_FATAL_INT_WIDTH 1
2630 #define FSF_AZ_NET_IVEC_INT_FLAG_WIDTH 1
2631 #define FSF_AZ_NET_IVEC_EVQ_FIFO_HF_LBN 1
2632 #define FSF_AZ_NET_IVEC_EVQ_FIFO_HF_WIDTH 1
2634 #define FSF_AZ_NET_IVEC_EVQ_FIFO_AF_WIDTH 1
2638 #define FSF_CZ_MC_XFRC_MODE_WIDTH 1
2639 #define FSE_CZ_MC_XFRC_MODE_LAYERED 1
2652 #define FSF_CZ_RX_EV_PKT_NOT_PARSED_WIDTH 1
2654 #define FSF_CZ_RX_EV_IPV6_PKT_WIDTH 1
2656 #define FSF_AZ_RX_EV_PKT_OK_WIDTH 1
2658 #define FSF_AZ_RX_EV_PAUSE_FRM_ERR_WIDTH 1
2660 #define FSF_AZ_RX_EV_BUF_OWNER_ID_ERR_WIDTH 1
2662 #define FSF_AZ_RX_EV_IP_FRAG_ERR_WIDTH 1
2664 #define FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR_WIDTH 1
2666 #define FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR_WIDTH 1
2668 #define FSF_AZ_RX_EV_ETH_CRC_ERR_WIDTH 1
2670 #define FSF_AZ_RX_EV_FRM_TRUNC_WIDTH 1
2672 #define FSF_AA_RX_EV_DRIB_NIB_WIDTH 1
2674 #define FSF_AZ_RX_EV_TOBE_DISC_WIDTH 1
2681 #define FSE_AZ_RX_EV_PKT_TYPE_LLC 1
2688 #define FSE_AB_RX_EV_HDR_TYPE_IPV4_UDP 1
2689 #define FSE_CZ_RX_EV_HDR_TYPE_IPV4V6_UDP 1
2693 #define FSF_AZ_RX_EV_DESC_Q_EMPTY_WIDTH 1
2695 #define FSF_AZ_RX_EV_MCAST_HASH_MATCH_WIDTH 1
2697 #define FSF_AZ_RX_EV_MCAST_PKT_WIDTH 1
2699 #define FSF_AA_RX_EV_RECOVERY_FLAG_WIDTH 1
2703 #define FSF_AZ_RX_EV_JUMBO_CONT_WIDTH 1
2705 #define FSF_AZ_RX_EV_PORT_WIDTH 1
2709 #define FSF_AZ_RX_EV_SOP_WIDTH 1
2711 #define FSF_AZ_RX_EV_ISCSI_PKT_OK_WIDTH 1
2713 #define FSF_AZ_RX_EV_ISCSI_DDIG_ERR_WIDTH 1
2715 #define FSF_AZ_RX_EV_ISCSI_HDIG_ERR_WIDTH 1
2735 #define FSF_AZ_TX_EV_PKT_ERR_WIDTH 1
2737 #define FSF_AZ_TX_EV_PKT_TOO_BIG_WIDTH 1
2741 #define FSF_AZ_TX_EV_PORT_WIDTH 1
2743 #define FSF_AZ_TX_EV_WQ_FF_FULL_WIDTH 1
2745 #define FSF_AZ_TX_EV_BUF_OWNER_ID_ERR_WIDTH 1
2747 #define FSF_AZ_TX_EV_COMP_WIDTH 1
2753 #define FSF_AZ_TX_KER_CONT_WIDTH 1
2763 #define FSF_AZ_TX_USER_SW_EV_EN_WIDTH 1
2765 #define FSF_AZ_TX_USER_CONT_WIDTH 1
2802 * Pseudo-registers and fields
2807 /* Interrupt acknowledge work-around register (A0/A1 only) */
2813 #define FFE_AB_SPI_DEVICE_FLASH 1
2817 #define FRF_AB_STRAP_10G_WIDTH 1
2819 #define FRF_AA_STRAP_PCIE_WIDTH 1
2831 #define FFE_AB_SRM_NB1_SZ4M 1
2844 #define FRF_AZ_RX_DESC_WPTR_DWORD_LBN (FRF_AZ_RX_DESC_WPTR_LBN - 3 * 32)
2851 #define FRF_AZ_TX_DESC_WPTR_DWORD_LBN (FRF_AZ_TX_DESC_WPTR_LBN - 3 * 32)
2856 #define FRF_AB_GMF_HSTFLTRFRM_PAUSE_WIDTH 1
2860 #define FRF_AB_GMF_HSTFLTRFRMDC_PAUSE_WIDTH 1
2879 /* XGXS all-lanes status fields */
2898 #define FRF_CZ_RMFT_DEST_MAC_HI_WIDTH (FRF_CZ_RMFT_DEST_MAC_WIDTH - 32)
2905 #define FRF_CZ_TMFT_SRC_MAC_HI_WIDTH (FRF_CZ_TMFT_SRC_MAC_WIDTH - 32)
2914 /* Sub-fields of an RX flush completion event */
2916 #define FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL_WIDTH 1