Lines Matching +full:probe +full:- +full:reset
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
83 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
84 * queued onto this work queue. This is not a per-nic work queue, because
89 /* How often and how many times to poll for a reset while waiting for a
107 * This is only used in MSI-X interrupt mode
116 * On Falcon-based NICs, this will:
117 * - Check the on-board hardware monitor;
118 * - Poll the link state and reconfigure the hardware as necessary.
119 * On Siena-based NICs for power systems with EEH support, this will give EEH a
128 * round-trip latency and reducing overhead.
144 * 0 => MSI-X
150 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
154 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
159 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
203 if ((efx->state == STATE_READY) || \
204 (efx->state == STATE_RECOVERY) || \
205 (efx->state == STATE_DISABLED)) \
211 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { in ef4_check_disabled()
212 netif_err(efx, drv, efx->net_dev, in ef4_check_disabled()
214 return -EIO; in ef4_check_disabled()
237 if (unlikely(!channel->enabled)) in ef4_process_channel()
241 tx_queue->pkts_compl = 0; in ef4_process_channel()
242 tx_queue->bytes_compl = 0; in ef4_process_channel()
256 if (tx_queue->bytes_compl) { in ef4_process_channel()
257 netdev_tx_completed_queue(tx_queue->core_txq, in ef4_process_channel()
258 tx_queue->pkts_compl, tx_queue->bytes_compl); in ef4_process_channel()
272 int step = efx->irq_mod_step_us; in ef4_update_irq_mod()
274 if (channel->irq_mod_score < irq_adapt_low_thresh) { in ef4_update_irq_mod()
275 if (channel->irq_moderation_us > step) { in ef4_update_irq_mod()
276 channel->irq_moderation_us -= step; in ef4_update_irq_mod()
277 efx->type->push_irq_moderation(channel); in ef4_update_irq_mod()
279 } else if (channel->irq_mod_score > irq_adapt_high_thresh) { in ef4_update_irq_mod()
280 if (channel->irq_moderation_us < in ef4_update_irq_mod()
281 efx->irq_rx_moderation_us) { in ef4_update_irq_mod()
282 channel->irq_moderation_us += step; in ef4_update_irq_mod()
283 efx->type->push_irq_moderation(channel); in ef4_update_irq_mod()
287 channel->irq_count = 0; in ef4_update_irq_mod()
288 channel->irq_mod_score = 0; in ef4_update_irq_mod()
295 struct ef4_nic *efx = channel->efx; in ef4_poll()
298 netif_vdbg(efx, intr, efx->net_dev, in ef4_poll()
300 channel->channel, raw_smp_processor_id()); in ef4_poll()
306 efx->irq_rx_adaptive && in ef4_poll()
307 unlikely(++channel->irq_count == 1000)) { in ef4_poll()
327 * is reset, the memory buffer will be reused; this guards against
328 * errors during channel reset and also simplifies interrupt handling.
332 struct ef4_nic *efx = channel->efx; in ef4_probe_eventq()
335 netif_dbg(efx, probe, efx->net_dev, in ef4_probe_eventq()
336 "chan %d create event queue\n", channel->channel); in ef4_probe_eventq()
340 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); in ef4_probe_eventq()
342 channel->eventq_mask = max(entries, EF4_MIN_EVQ_SIZE) - 1; in ef4_probe_eventq()
350 struct ef4_nic *efx = channel->efx; in ef4_init_eventq()
353 EF4_WARN_ON_PARANOID(channel->eventq_init); in ef4_init_eventq()
355 netif_dbg(efx, drv, efx->net_dev, in ef4_init_eventq()
356 "chan %d init event queue\n", channel->channel); in ef4_init_eventq()
360 efx->type->push_irq_moderation(channel); in ef4_init_eventq()
361 channel->eventq_read_ptr = 0; in ef4_init_eventq()
362 channel->eventq_init = true; in ef4_init_eventq()
370 netif_dbg(channel->efx, ifup, channel->efx->net_dev, in ef4_start_eventq()
371 "chan %d start event queue\n", channel->channel); in ef4_start_eventq()
374 channel->enabled = true; in ef4_start_eventq()
377 napi_enable(&channel->napi_str); in ef4_start_eventq()
384 if (!channel->enabled) in ef4_stop_eventq()
387 napi_disable(&channel->napi_str); in ef4_stop_eventq()
388 channel->enabled = false; in ef4_stop_eventq()
393 if (!channel->eventq_init) in ef4_fini_eventq()
396 netif_dbg(channel->efx, drv, channel->efx->net_dev, in ef4_fini_eventq()
397 "chan %d fini event queue\n", channel->channel); in ef4_fini_eventq()
400 channel->eventq_init = false; in ef4_fini_eventq()
405 netif_dbg(channel->efx, drv, channel->efx->net_dev, in ef4_remove_eventq()
406 "chan %d remove event queue\n", channel->channel); in ef4_remove_eventq()
430 channel->efx = efx; in ef4_alloc_channel()
431 channel->channel = i; in ef4_alloc_channel()
432 channel->type = &ef4_default_channel_type; in ef4_alloc_channel()
435 tx_queue = &channel->tx_queue[j]; in ef4_alloc_channel()
436 tx_queue->efx = efx; in ef4_alloc_channel()
437 tx_queue->queue = i * EF4_TXQ_TYPES + j; in ef4_alloc_channel()
438 tx_queue->channel = channel; in ef4_alloc_channel()
441 rx_queue = &channel->rx_queue; in ef4_alloc_channel()
442 rx_queue->efx = efx; in ef4_alloc_channel()
443 timer_setup(&rx_queue->slow_fill, ef4_rx_slow_fill, 0); in ef4_alloc_channel()
465 channel->napi_dev = NULL; in ef4_copy_channel()
466 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node); in ef4_copy_channel()
467 channel->napi_str.napi_id = 0; in ef4_copy_channel()
468 channel->napi_str.state = 0; in ef4_copy_channel()
469 memset(&channel->eventq, 0, sizeof(channel->eventq)); in ef4_copy_channel()
472 tx_queue = &channel->tx_queue[j]; in ef4_copy_channel()
473 if (tx_queue->channel) in ef4_copy_channel()
474 tx_queue->channel = channel; in ef4_copy_channel()
475 tx_queue->buffer = NULL; in ef4_copy_channel()
476 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); in ef4_copy_channel()
479 rx_queue = &channel->rx_queue; in ef4_copy_channel()
480 rx_queue->buffer = NULL; in ef4_copy_channel()
481 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); in ef4_copy_channel()
482 timer_setup(&rx_queue->slow_fill, ef4_rx_slow_fill, 0); in ef4_copy_channel()
493 netif_dbg(channel->efx, probe, channel->efx->net_dev, in ef4_probe_channel()
494 "creating channel %d\n", channel->channel); in ef4_probe_channel()
496 rc = channel->type->pre_probe(channel); in ef4_probe_channel()
526 struct ef4_nic *efx = channel->efx; in ef4_get_channel_name()
530 number = channel->channel; in ef4_get_channel_name()
531 if (efx->tx_channel_offset == 0) { in ef4_get_channel_name()
533 } else if (channel->channel < efx->tx_channel_offset) { in ef4_get_channel_name()
534 type = "-rx"; in ef4_get_channel_name()
536 type = "-tx"; in ef4_get_channel_name()
537 number -= efx->tx_channel_offset; in ef4_get_channel_name()
539 snprintf(buf, len, "%s%s-%d", efx->name, type, number); in ef4_get_channel_name()
547 channel->type->get_name(channel, in ef4_set_channel_names()
548 efx->msi_context[channel->channel].name, in ef4_set_channel_names()
549 sizeof(efx->msi_context[0].name)); in ef4_set_channel_names()
558 efx->next_buffer_table = 0; in ef4_probe_channels()
560 /* Probe channels in reverse, so that any 'extra' channels in ef4_probe_channels()
568 netif_err(efx, probe, efx->net_dev, in ef4_probe_channels()
570 channel->channel); in ef4_probe_channels()
589 netdev_features_t old_features = efx->net_dev->features; in ef4_start_datapath()
590 bool old_rx_scatter = efx->rx_scatter; in ef4_start_datapath()
600 efx->rx_dma_len = (efx->rx_prefix_size + in ef4_start_datapath()
601 EF4_MAX_FRAME_LEN(efx->net_dev->mtu) + in ef4_start_datapath()
602 efx->type->rx_buffer_padding); in ef4_start_datapath()
604 efx->rx_ip_align + efx->rx_dma_len); in ef4_start_datapath()
606 efx->rx_scatter = efx->type->always_rx_scatter; in ef4_start_datapath()
607 efx->rx_buffer_order = 0; in ef4_start_datapath()
608 } else if (efx->type->can_rx_scatter) { in ef4_start_datapath()
614 efx->rx_scatter = true; in ef4_start_datapath()
615 efx->rx_dma_len = EF4_RX_USR_BUF_SIZE; in ef4_start_datapath()
616 efx->rx_buffer_order = 0; in ef4_start_datapath()
618 efx->rx_scatter = false; in ef4_start_datapath()
619 efx->rx_buffer_order = get_order(rx_buf_len); in ef4_start_datapath()
623 if (efx->rx_buffer_order) in ef4_start_datapath()
624 netif_dbg(efx, drv, efx->net_dev, in ef4_start_datapath()
626 efx->rx_dma_len, efx->rx_buffer_order, in ef4_start_datapath()
627 efx->rx_pages_per_batch); in ef4_start_datapath()
629 netif_dbg(efx, drv, efx->net_dev, in ef4_start_datapath()
631 efx->rx_dma_len, efx->rx_page_buf_step, in ef4_start_datapath()
632 efx->rx_bufs_per_page, efx->rx_pages_per_batch); in ef4_start_datapath()
637 efx->net_dev->hw_features |= efx->net_dev->features; in ef4_start_datapath()
638 efx->net_dev->hw_features &= ~efx->fixed_features; in ef4_start_datapath()
639 efx->net_dev->features |= efx->fixed_features; in ef4_start_datapath()
640 if (efx->net_dev->features != old_features) in ef4_start_datapath()
641 netdev_features_change(efx->net_dev); in ef4_start_datapath()
643 /* RX filters may also have scatter-enabled flags */ in ef4_start_datapath()
644 if (efx->rx_scatter != old_rx_scatter) in ef4_start_datapath()
645 efx->type->filter_update_rx_scatter(efx); in ef4_start_datapath()
654 efx->txq_stop_thresh = efx->txq_entries - ef4_tx_max_skb_descs(efx); in ef4_start_datapath()
655 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; in ef4_start_datapath()
661 atomic_inc(&efx->active_queues); in ef4_start_datapath()
666 atomic_inc(&efx->active_queues); in ef4_start_datapath()
672 WARN_ON(channel->rx_pkt_n_frags); in ef4_start_datapath()
675 if (netif_device_present(efx->net_dev)) in ef4_start_datapath()
676 netif_tx_wake_all_queues(efx->net_dev); in ef4_start_datapath()
687 BUG_ON(efx->port_enabled); in ef4_stop_datapath()
692 rx_queue->refill_enabled = false; in ef4_stop_datapath()
698 * might be kept active by non-data events, so don't in ef4_stop_datapath()
708 rc = efx->type->fini_dmaq(efx); in ef4_stop_datapath()
710 /* Schedule a reset to recover from the flush failure. The in ef4_stop_datapath()
713 * the MACs because of the pending reset. in ef4_stop_datapath()
715 netif_err(efx, drv, efx->net_dev, in ef4_stop_datapath()
719 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); in ef4_stop_datapath()
721 netif_dbg(efx, drv, efx->net_dev, in ef4_stop_datapath()
738 netif_dbg(channel->efx, drv, channel->efx->net_dev, in ef4_remove_channel()
739 "destroy chan %d\n", channel->channel); in ef4_remove_channel()
746 channel->type->post_remove(channel); in ef4_remove_channel()
776 if (channel->type->copy) in ef4_realloc_channels()
779 channel->eventq.index + in ef4_realloc_channels()
780 channel->eventq.entries); in ef4_realloc_channels()
783 rx_queue->rxd.index + in ef4_realloc_channels()
784 rx_queue->rxd.entries); in ef4_realloc_channels()
787 tx_queue->txd.index + in ef4_realloc_channels()
788 tx_queue->txd.entries); in ef4_realloc_channels()
797 for (i = 0; i < efx->n_channels; i++) { in ef4_realloc_channels()
798 channel = efx->channel[i]; in ef4_realloc_channels()
799 if (channel->type->copy) in ef4_realloc_channels()
800 channel = channel->type->copy(channel); in ef4_realloc_channels()
802 rc = -ENOMEM; in ef4_realloc_channels()
809 old_rxq_entries = efx->rxq_entries; in ef4_realloc_channels()
810 old_txq_entries = efx->txq_entries; in ef4_realloc_channels()
811 efx->rxq_entries = rxq_entries; in ef4_realloc_channels()
812 efx->txq_entries = txq_entries; in ef4_realloc_channels()
813 for (i = 0; i < efx->n_channels; i++) { in ef4_realloc_channels()
814 swap(efx->channel[i], other_channel[i]); in ef4_realloc_channels()
818 efx->next_buffer_table = next_buffer_table; in ef4_realloc_channels()
820 for (i = 0; i < efx->n_channels; i++) { in ef4_realloc_channels()
821 channel = efx->channel[i]; in ef4_realloc_channels()
822 if (!channel->type->copy) in ef4_realloc_channels()
827 ef4_init_napi_channel(efx->channel[i]); in ef4_realloc_channels()
832 for (i = 0; i < efx->n_channels; i++) { in ef4_realloc_channels()
834 if (channel && channel->type->copy) { in ef4_realloc_channels()
844 netif_err(efx, drv, efx->net_dev, in ef4_realloc_channels()
849 netif_device_attach(efx->net_dev); in ef4_realloc_channels()
855 efx->rxq_entries = old_rxq_entries; in ef4_realloc_channels()
856 efx->txq_entries = old_txq_entries; in ef4_realloc_channels()
857 for (i = 0; i < efx->n_channels; i++) { in ef4_realloc_channels()
858 swap(efx->channel[i], other_channel[i]); in ef4_realloc_channels()
865 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); in ef4_schedule_slow_fill()
897 struct ef4_link_state *link_state = &efx->link_state; in ef4_link_status_changed()
903 if (!netif_running(efx->net_dev)) in ef4_link_status_changed()
906 if (link_state->up != netif_carrier_ok(efx->net_dev)) { in ef4_link_status_changed()
907 efx->n_link_state_changes++; in ef4_link_status_changed()
909 if (link_state->up) in ef4_link_status_changed()
910 netif_carrier_on(efx->net_dev); in ef4_link_status_changed()
912 netif_carrier_off(efx->net_dev); in ef4_link_status_changed()
916 if (link_state->up) in ef4_link_status_changed()
917 netif_info(efx, link, efx->net_dev, in ef4_link_status_changed()
918 "link up at %uMbps %s-duplex (MTU %d)\n", in ef4_link_status_changed()
919 link_state->speed, link_state->fd ? "full" : "half", in ef4_link_status_changed()
920 efx->net_dev->mtu); in ef4_link_status_changed()
922 netif_info(efx, link, efx->net_dev, "link down\n"); in ef4_link_status_changed()
927 efx->link_advertising = advertising; in ef4_link_set_advertising()
930 efx->wanted_fc |= (EF4_FC_TX | EF4_FC_RX); in ef4_link_set_advertising()
932 efx->wanted_fc &= ~(EF4_FC_TX | EF4_FC_RX); in ef4_link_set_advertising()
934 efx->wanted_fc ^= EF4_FC_TX; in ef4_link_set_advertising()
940 efx->wanted_fc = wanted_fc; in ef4_link_set_wanted_fc()
941 if (efx->link_advertising) { in ef4_link_set_wanted_fc()
943 efx->link_advertising |= (ADVERTISED_Pause | in ef4_link_set_wanted_fc()
946 efx->link_advertising &= ~(ADVERTISED_Pause | in ef4_link_set_wanted_fc()
949 efx->link_advertising ^= ADVERTISED_Asym_Pause; in ef4_link_set_wanted_fc()
955 /* We assume that efx->type->reconfigure_mac will always try to sync RX
956 * filters and therefore needs to read-lock the filter table against freeing
960 down_read(&efx->filter_sem); in ef4_mac_reconfigure()
961 efx->type->reconfigure_mac(efx); in ef4_mac_reconfigure()
962 up_read(&efx->filter_sem); in ef4_mac_reconfigure()
967 * through phy_op->set_link_ksettings(), and pushed asynchronously to the MAC
977 WARN_ON(!mutex_is_locked(&efx->mac_lock)); in __ef4_reconfigure_port()
980 phy_mode = efx->phy_mode; in __ef4_reconfigure_port()
982 efx->phy_mode |= PHY_MODE_TX_DISABLED; in __ef4_reconfigure_port()
984 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; in __ef4_reconfigure_port()
986 rc = efx->type->reconfigure_port(efx); in __ef4_reconfigure_port()
989 efx->phy_mode = phy_mode; in __ef4_reconfigure_port()
1002 mutex_lock(&efx->mac_lock); in ef4_reconfigure_port()
1004 mutex_unlock(&efx->mac_lock); in ef4_reconfigure_port()
1016 mutex_lock(&efx->mac_lock); in ef4_mac_work()
1017 if (efx->port_enabled) in ef4_mac_work()
1019 mutex_unlock(&efx->mac_lock); in ef4_mac_work()
1026 netif_dbg(efx, probe, efx->net_dev, "create port\n"); in ef4_probe_port()
1029 efx->phy_mode = PHY_MODE_SPECIAL; in ef4_probe_port()
1032 rc = efx->type->probe_port(efx); in ef4_probe_port()
1037 eth_hw_addr_set(efx->net_dev, efx->net_dev->perm_addr); in ef4_probe_port()
1046 netif_dbg(efx, drv, efx->net_dev, "init port\n"); in ef4_init_port()
1048 mutex_lock(&efx->mac_lock); in ef4_init_port()
1050 rc = efx->phy_op->init(efx); in ef4_init_port()
1054 efx->port_initialized = true; in ef4_init_port()
1061 rc = efx->phy_op->reconfigure(efx); in ef4_init_port()
1062 if (rc && rc != -EPERM) in ef4_init_port()
1065 mutex_unlock(&efx->mac_lock); in ef4_init_port()
1069 efx->phy_op->fini(efx); in ef4_init_port()
1071 mutex_unlock(&efx->mac_lock); in ef4_init_port()
1077 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); in ef4_start_port()
1078 BUG_ON(efx->port_enabled); in ef4_start_port()
1080 mutex_lock(&efx->mac_lock); in ef4_start_port()
1081 efx->port_enabled = true; in ef4_start_port()
1086 mutex_unlock(&efx->mac_lock); in ef4_start_port()
1090 * and the async self-test, wait for them to finish and prevent them
1096 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); in ef4_stop_port()
1100 mutex_lock(&efx->mac_lock); in ef4_stop_port()
1101 efx->port_enabled = false; in ef4_stop_port()
1102 mutex_unlock(&efx->mac_lock); in ef4_stop_port()
1105 netif_addr_lock_bh(efx->net_dev); in ef4_stop_port()
1106 netif_addr_unlock_bh(efx->net_dev); in ef4_stop_port()
1108 cancel_delayed_work_sync(&efx->monitor_work); in ef4_stop_port()
1110 cancel_work_sync(&efx->mac_work); in ef4_stop_port()
1115 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); in ef4_fini_port()
1117 if (!efx->port_initialized) in ef4_fini_port()
1120 efx->phy_op->fini(efx); in ef4_fini_port()
1121 efx->port_initialized = false; in ef4_fini_port()
1123 efx->link_state.up = false; in ef4_fini_port()
1129 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); in ef4_remove_port()
1131 efx->type->remove_port(efx); in ef4_remove_port()
1145 return left->type == right->type && in ef4_same_controller()
1146 left->vpd_sn && right->vpd_sn && in ef4_same_controller()
1147 !strcmp(left->vpd_sn, right->vpd_sn); in ef4_same_controller()
1154 if (efx->primary == efx) { in ef4_associate()
1157 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n"); in ef4_associate()
1158 list_add_tail(&efx->node, &ef4_primary_list); in ef4_associate()
1163 list_del(&other->node); in ef4_associate()
1164 netif_dbg(other, probe, other->net_dev, in ef4_associate()
1166 pci_name(efx->pci_dev), in ef4_associate()
1167 efx->net_dev->name); in ef4_associate()
1168 list_add_tail(&other->node, in ef4_associate()
1169 &efx->secondary_list); in ef4_associate()
1170 other->primary = efx; in ef4_associate()
1178 netif_dbg(efx, probe, efx->net_dev, in ef4_associate()
1180 pci_name(other->pci_dev), in ef4_associate()
1181 other->net_dev->name); in ef4_associate()
1182 list_add_tail(&efx->node, in ef4_associate()
1183 &other->secondary_list); in ef4_associate()
1184 efx->primary = other; in ef4_associate()
1189 netif_dbg(efx, probe, efx->net_dev, in ef4_associate()
1191 list_add_tail(&efx->node, &ef4_unassociated_list); in ef4_associate()
1199 list_del(&efx->node); in ef4_dissociate()
1200 efx->primary = NULL; in ef4_dissociate()
1202 list_for_each_entry_safe(other, next, &efx->secondary_list, node) { in ef4_dissociate()
1203 list_del(&other->node); in ef4_dissociate()
1204 netif_dbg(other, probe, other->net_dev, in ef4_dissociate()
1206 list_add_tail(&other->node, &ef4_unassociated_list); in ef4_dissociate()
1207 other->primary = NULL; in ef4_dissociate()
1214 struct pci_dev *pci_dev = efx->pci_dev; in ef4_init_io()
1215 dma_addr_t dma_mask = efx->type->max_dma_mask; in ef4_init_io()
1216 unsigned int mem_map_size = efx->type->mem_map_size(efx); in ef4_init_io()
1219 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); in ef4_init_io()
1221 bar = efx->type->mem_bar; in ef4_init_io()
1225 netif_err(efx, probe, efx->net_dev, in ef4_init_io()
1237 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); in ef4_init_io()
1243 netif_err(efx, probe, efx->net_dev, in ef4_init_io()
1247 netif_dbg(efx, probe, efx->net_dev, in ef4_init_io()
1250 efx->membase_phys = pci_resource_start(efx->pci_dev, bar); in ef4_init_io()
1253 netif_err(efx, probe, efx->net_dev, in ef4_init_io()
1255 rc = -EIO; in ef4_init_io()
1258 efx->membase = ioremap(efx->membase_phys, mem_map_size); in ef4_init_io()
1259 if (!efx->membase) { in ef4_init_io()
1260 netif_err(efx, probe, efx->net_dev, in ef4_init_io()
1262 (unsigned long long)efx->membase_phys, mem_map_size); in ef4_init_io()
1263 rc = -ENOMEM; in ef4_init_io()
1266 netif_dbg(efx, probe, efx->net_dev, in ef4_init_io()
1268 (unsigned long long)efx->membase_phys, mem_map_size, in ef4_init_io()
1269 efx->membase); in ef4_init_io()
1274 pci_release_region(efx->pci_dev, bar); in ef4_init_io()
1276 efx->membase_phys = 0; in ef4_init_io()
1278 pci_disable_device(efx->pci_dev); in ef4_init_io()
1287 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); in ef4_fini_io()
1289 if (efx->membase) { in ef4_fini_io()
1290 iounmap(efx->membase); in ef4_fini_io()
1291 efx->membase = NULL; in ef4_fini_io()
1294 if (efx->membase_phys) { in ef4_fini_io()
1295 bar = efx->type->mem_bar; in ef4_fini_io()
1296 pci_release_region(efx->pci_dev, bar); in ef4_fini_io()
1297 efx->membase_phys = 0; in ef4_fini_io()
1300 /* Don't disable bus-mastering if VFs are assigned */ in ef4_fini_io()
1301 if (!pci_vfs_assigned(efx->pci_dev)) in ef4_fini_io()
1302 pci_disable_device(efx->pci_dev); in ef4_fini_io()
1309 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) in ef4_set_default_rx_indir_table()
1310 efx->rx_indir_table[i] = in ef4_set_default_rx_indir_table()
1311 ethtool_rxfh_indir_default(i, efx->rss_spread); in ef4_set_default_rx_indir_table()
1324 netif_warn(efx, probe, efx->net_dev, in ef4_wanted_parallelism()
1342 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn, in ef4_wanted_parallelism()
1351 /* Probe the number and type of interrupts we are able to obtain, and
1361 if (efx->extra_channel_type[i]) in ef4_probe_interrupts()
1364 if (efx->interrupt_mode == EF4_INT_MODE_MSIX) { in ef4_probe_interrupts()
1372 n_channels = min(n_channels, efx->max_channels); in ef4_probe_interrupts()
1376 rc = pci_enable_msix_range(efx->pci_dev, in ef4_probe_interrupts()
1380 efx->interrupt_mode = EF4_INT_MODE_MSI; in ef4_probe_interrupts()
1381 netif_err(efx, drv, efx->net_dev, in ef4_probe_interrupts()
1382 "could not enable MSI-X\n"); in ef4_probe_interrupts()
1384 netif_err(efx, drv, efx->net_dev, in ef4_probe_interrupts()
1385 "WARNING: Insufficient MSI-X vectors" in ef4_probe_interrupts()
1387 netif_err(efx, drv, efx->net_dev, in ef4_probe_interrupts()
1393 efx->n_channels = n_channels; in ef4_probe_interrupts()
1395 n_channels -= extra_channels; in ef4_probe_interrupts()
1397 efx->n_tx_channels = min(max(n_channels / 2, in ef4_probe_interrupts()
1399 efx->max_tx_channels); in ef4_probe_interrupts()
1400 efx->n_rx_channels = max(n_channels - in ef4_probe_interrupts()
1401 efx->n_tx_channels, in ef4_probe_interrupts()
1404 efx->n_tx_channels = min(n_channels, in ef4_probe_interrupts()
1405 efx->max_tx_channels); in ef4_probe_interrupts()
1406 efx->n_rx_channels = n_channels; in ef4_probe_interrupts()
1408 for (i = 0; i < efx->n_channels; i++) in ef4_probe_interrupts()
1409 ef4_get_channel(efx, i)->irq = in ef4_probe_interrupts()
1415 if (efx->interrupt_mode == EF4_INT_MODE_MSI) { in ef4_probe_interrupts()
1416 efx->n_channels = 1; in ef4_probe_interrupts()
1417 efx->n_rx_channels = 1; in ef4_probe_interrupts()
1418 efx->n_tx_channels = 1; in ef4_probe_interrupts()
1419 rc = pci_enable_msi(efx->pci_dev); in ef4_probe_interrupts()
1421 ef4_get_channel(efx, 0)->irq = efx->pci_dev->irq; in ef4_probe_interrupts()
1423 netif_err(efx, drv, efx->net_dev, in ef4_probe_interrupts()
1425 efx->interrupt_mode = EF4_INT_MODE_LEGACY; in ef4_probe_interrupts()
1430 if (efx->interrupt_mode == EF4_INT_MODE_LEGACY) { in ef4_probe_interrupts()
1431 efx->n_channels = 1 + (ef4_separate_tx_channels ? 1 : 0); in ef4_probe_interrupts()
1432 efx->n_rx_channels = 1; in ef4_probe_interrupts()
1433 efx->n_tx_channels = 1; in ef4_probe_interrupts()
1434 efx->legacy_irq = efx->pci_dev->irq; in ef4_probe_interrupts()
1438 j = efx->n_channels; in ef4_probe_interrupts()
1440 if (!efx->extra_channel_type[i]) in ef4_probe_interrupts()
1442 if (efx->interrupt_mode != EF4_INT_MODE_MSIX || in ef4_probe_interrupts()
1443 efx->n_channels <= extra_channels) { in ef4_probe_interrupts()
1444 efx->extra_channel_type[i]->handle_no_channel(efx); in ef4_probe_interrupts()
1446 --j; in ef4_probe_interrupts()
1447 ef4_get_channel(efx, j)->type = in ef4_probe_interrupts()
1448 efx->extra_channel_type[i]; in ef4_probe_interrupts()
1452 efx->rss_spread = efx->n_rx_channels; in ef4_probe_interrupts()
1462 BUG_ON(efx->state == STATE_DISABLED); in ef4_soft_enable_interrupts()
1464 efx->irq_soft_enabled = true; in ef4_soft_enable_interrupts()
1468 if (!channel->type->keep_eventq) { in ef4_soft_enable_interrupts()
1483 if (!channel->type->keep_eventq) in ef4_soft_enable_interrupts()
1494 if (efx->state == STATE_DISABLED) in ef4_soft_disable_interrupts()
1497 efx->irq_soft_enabled = false; in ef4_soft_disable_interrupts()
1500 if (efx->legacy_irq) in ef4_soft_disable_interrupts()
1501 synchronize_irq(efx->legacy_irq); in ef4_soft_disable_interrupts()
1504 if (channel->irq) in ef4_soft_disable_interrupts()
1505 synchronize_irq(channel->irq); in ef4_soft_disable_interrupts()
1508 if (!channel->type->keep_eventq) in ef4_soft_disable_interrupts()
1518 BUG_ON(efx->state == STATE_DISABLED); in ef4_enable_interrupts()
1520 if (efx->eeh_disabled_legacy_irq) { in ef4_enable_interrupts()
1521 enable_irq(efx->legacy_irq); in ef4_enable_interrupts()
1522 efx->eeh_disabled_legacy_irq = false; in ef4_enable_interrupts()
1525 efx->type->irq_enable_master(efx); in ef4_enable_interrupts()
1528 if (channel->type->keep_eventq) { in ef4_enable_interrupts()
1546 if (channel->type->keep_eventq) in ef4_enable_interrupts()
1550 efx->type->irq_disable_non_ev(efx); in ef4_enable_interrupts()
1562 if (channel->type->keep_eventq) in ef4_disable_interrupts()
1566 efx->type->irq_disable_non_ev(efx); in ef4_disable_interrupts()
1573 /* Remove MSI/MSI-X interrupts */ in ef4_remove_interrupts()
1575 channel->irq = 0; in ef4_remove_interrupts()
1576 pci_disable_msi(efx->pci_dev); in ef4_remove_interrupts()
1577 pci_disable_msix(efx->pci_dev); in ef4_remove_interrupts()
1580 efx->legacy_irq = 0; in ef4_remove_interrupts()
1588 efx->tx_channel_offset = in ef4_set_channels()
1590 efx->n_channels - efx->n_tx_channels : 0; in ef4_set_channels()
1594 * RX-only and TX-only channels. in ef4_set_channels()
1597 if (channel->channel < efx->n_rx_channels) in ef4_set_channels()
1598 channel->rx_queue.core_index = channel->channel; in ef4_set_channels()
1600 channel->rx_queue.core_index = -1; in ef4_set_channels()
1603 tx_queue->queue -= (efx->tx_channel_offset * in ef4_set_channels()
1612 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); in ef4_probe_nic()
1614 /* Carry out hardware-type specific initialisation */ in ef4_probe_nic()
1615 rc = efx->type->probe(efx); in ef4_probe_nic()
1620 if (!efx->max_channels || !efx->max_tx_channels) { in ef4_probe_nic()
1621 netif_err(efx, drv, efx->net_dev, in ef4_probe_nic()
1624 rc = -ENOSPC; in ef4_probe_nic()
1629 * to hook in MSI-X interrupts. in ef4_probe_nic()
1638 rc = efx->type->dimension_resources(efx); in ef4_probe_nic()
1639 if (rc != 0 && rc != -EAGAIN) in ef4_probe_nic()
1642 if (rc == -EAGAIN) in ef4_probe_nic()
1646 } while (rc == -EAGAIN); in ef4_probe_nic()
1648 if (efx->n_channels > 1) in ef4_probe_nic()
1649 netdev_rss_key_fill(&efx->rx_hash_key, in ef4_probe_nic()
1650 sizeof(efx->rx_hash_key)); in ef4_probe_nic()
1653 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); in ef4_probe_nic()
1654 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); in ef4_probe_nic()
1657 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000); in ef4_probe_nic()
1666 efx->type->remove(efx); in ef4_probe_nic()
1672 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); in ef4_remove_nic()
1675 efx->type->remove(efx); in ef4_remove_nic()
1682 spin_lock_init(&efx->filter_lock); in ef4_probe_filters()
1683 init_rwsem(&efx->filter_sem); in ef4_probe_filters()
1684 mutex_lock(&efx->mac_lock); in ef4_probe_filters()
1685 down_write(&efx->filter_sem); in ef4_probe_filters()
1686 rc = efx->type->filter_table_probe(efx); in ef4_probe_filters()
1691 if (efx->type->offload_features & NETIF_F_NTUPLE) { in ef4_probe_filters()
1696 channel->rps_flow_id = in ef4_probe_filters()
1697 kcalloc(efx->type->max_rx_ip_filters, in ef4_probe_filters()
1698 sizeof(*channel->rps_flow_id), in ef4_probe_filters()
1700 if (!channel->rps_flow_id) in ef4_probe_filters()
1704 i < efx->type->max_rx_ip_filters; in ef4_probe_filters()
1706 channel->rps_flow_id[i] = in ef4_probe_filters()
1712 kfree(channel->rps_flow_id); in ef4_probe_filters()
1713 efx->type->filter_table_remove(efx); in ef4_probe_filters()
1714 rc = -ENOMEM; in ef4_probe_filters()
1718 efx->rps_expire_index = efx->rps_expire_channel = 0; in ef4_probe_filters()
1722 up_write(&efx->filter_sem); in ef4_probe_filters()
1723 mutex_unlock(&efx->mac_lock); in ef4_probe_filters()
1733 kfree(channel->rps_flow_id); in ef4_remove_filters()
1735 down_write(&efx->filter_sem); in ef4_remove_filters()
1736 efx->type->filter_table_remove(efx); in ef4_remove_filters()
1737 up_write(&efx->filter_sem); in ef4_remove_filters()
1742 down_read(&efx->filter_sem); in ef4_restore_filters()
1743 efx->type->filter_table_restore(efx); in ef4_restore_filters()
1744 up_read(&efx->filter_sem); in ef4_restore_filters()
1759 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); in ef4_probe_all()
1765 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); in ef4_probe_all()
1771 rc = -EINVAL; in ef4_probe_all()
1774 efx->rxq_entries = efx->txq_entries = EF4_DEFAULT_DMAQ_SIZE; in ef4_probe_all()
1778 netif_err(efx, probe, efx->net_dev, in ef4_probe_all()
1810 BUG_ON(efx->state == STATE_DISABLED); in ef4_start_all()
1814 if (efx->port_enabled || !netif_running(efx->net_dev) || in ef4_start_all()
1815 efx->reset_pending) in ef4_start_all()
1822 if (efx->type->monitor != NULL) in ef4_start_all()
1823 queue_delayed_work(efx->workqueue, &efx->monitor_work, in ef4_start_all()
1826 efx->type->start_stats(efx); in ef4_start_all()
1827 efx->type->pull_stats(efx); in ef4_start_all()
1828 spin_lock_bh(&efx->stats_lock); in ef4_start_all()
1829 efx->type->update_stats(efx, NULL, NULL); in ef4_start_all()
1830 spin_unlock_bh(&efx->stats_lock); in ef4_start_all()
1843 if (!efx->port_enabled) in ef4_stop_all()
1849 efx->type->pull_stats(efx); in ef4_stop_all()
1850 spin_lock_bh(&efx->stats_lock); in ef4_stop_all()
1851 efx->type->update_stats(efx, NULL, NULL); in ef4_stop_all()
1852 spin_unlock_bh(&efx->stats_lock); in ef4_stop_all()
1853 efx->type->stop_stats(efx); in ef4_stop_all()
1860 WARN_ON(netif_running(efx->net_dev) && in ef4_stop_all()
1861 netif_device_present(efx->net_dev)); in ef4_stop_all()
1862 netif_tx_disable(efx->net_dev); in ef4_stop_all()
1884 if (usecs * 1000 < efx->timer_quantum_ns) in ef4_usecs_to_ticks()
1886 return usecs * 1000 / efx->timer_quantum_ns; in ef4_usecs_to_ticks()
1894 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000); in ef4_ticks_to_usecs()
1907 timer_max_us = efx->timer_max_ns / 1000; in ef4_init_irq_moderation()
1910 return -EINVAL; in ef4_init_irq_moderation()
1912 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 && in ef4_init_irq_moderation()
1914 netif_err(efx, drv, efx->net_dev, "Channels are shared. " in ef4_init_irq_moderation()
1916 return -EINVAL; in ef4_init_irq_moderation()
1919 efx->irq_rx_adaptive = rx_adaptive; in ef4_init_irq_moderation()
1920 efx->irq_rx_moderation_us = rx_usecs; in ef4_init_irq_moderation()
1923 channel->irq_moderation_us = rx_usecs; in ef4_init_irq_moderation()
1925 channel->irq_moderation_us = tx_usecs; in ef4_init_irq_moderation()
1934 *rx_adaptive = efx->irq_rx_adaptive; in ef4_get_irq_moderation()
1935 *rx_usecs = efx->irq_rx_moderation_us; in ef4_get_irq_moderation()
1941 if (efx->tx_channel_offset == 0) { in ef4_get_irq_moderation()
1946 tx_channel = efx->channel[efx->tx_channel_offset]; in ef4_get_irq_moderation()
1947 *tx_usecs = tx_channel->irq_moderation_us; in ef4_get_irq_moderation()
1963 netif_vdbg(efx, timer, efx->net_dev, in ef4_monitor()
1966 BUG_ON(efx->type->monitor == NULL); in ef4_monitor()
1971 if (mutex_trylock(&efx->mac_lock)) { in ef4_monitor()
1972 if (efx->port_enabled) in ef4_monitor()
1973 efx->type->monitor(efx); in ef4_monitor()
1974 mutex_unlock(&efx->mac_lock); in ef4_monitor()
1977 queue_delayed_work(efx->workqueue, &efx->monitor_work, in ef4_monitor()
1997 (data->phy_id & 0xfc00) == 0x0400) in ef4_ioctl()
1998 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; in ef4_ioctl()
2000 return mdio_mii_ioctl(&efx->mdio, data, cmd); in ef4_ioctl()
2011 struct ef4_nic *efx = channel->efx; in ef4_init_napi_channel()
2013 channel->napi_dev = efx->net_dev; in ef4_init_napi_channel()
2014 netif_napi_add(channel->napi_dev, &channel->napi_str, ef4_poll); in ef4_init_napi_channel()
2027 if (channel->napi_dev) in ef4_fini_napi_channel()
2028 netif_napi_del(&channel->napi_str); in ef4_fini_napi_channel()
2030 channel->napi_dev = NULL; in ef4_fini_napi_channel()
2053 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", in ef4_net_open()
2059 if (efx->phy_mode & PHY_MODE_SPECIAL) in ef4_net_open()
2060 return -EBUSY; in ef4_net_open()
2079 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", in ef4_net_stop()
2088 /* Context: process, rcu_read_lock or RTNL held, non-blocking. */
2094 spin_lock_bh(&efx->stats_lock); in ef4_net_stats()
2095 efx->type->update_stats(efx, NULL, stats); in ef4_net_stats()
2096 spin_unlock_bh(&efx->stats_lock); in ef4_net_stats()
2104 netif_err(efx, tx_err, efx->net_dev, in ef4_watchdog()
2106 efx->port_enabled); in ef4_watchdog()
2122 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); in ef4_change_mtu()
2127 mutex_lock(&efx->mac_lock); in ef4_change_mtu()
2128 WRITE_ONCE(net_dev->mtu, new_mtu); in ef4_change_mtu()
2130 mutex_unlock(&efx->mac_lock); in ef4_change_mtu()
2133 netif_device_attach(efx->net_dev); in ef4_change_mtu()
2141 u8 *new_addr = addr->sa_data; in ef4_set_mac_address()
2146 netif_err(efx, drv, efx->net_dev, in ef4_set_mac_address()
2149 return -EADDRNOTAVAIL; in ef4_set_mac_address()
2153 ether_addr_copy(old_addr, net_dev->dev_addr); in ef4_set_mac_address()
2155 if (efx->type->set_mac_address) { in ef4_set_mac_address()
2156 rc = efx->type->set_mac_address(efx); in ef4_set_mac_address()
2164 mutex_lock(&efx->mac_lock); in ef4_set_mac_address()
2166 mutex_unlock(&efx->mac_lock); in ef4_set_mac_address()
2176 if (efx->port_enabled) in ef4_set_rx_mode()
2177 queue_work(efx->workqueue, &efx->mac_work); in ef4_set_rx_mode()
2186 /* If disabling RX n-tuple filtering, clear existing filters */ in ef4_set_features()
2187 if (net_dev->features & ~data & NETIF_F_NTUPLE) { in ef4_set_features()
2188 rc = efx->type->filter_clear_rx(efx, EF4_FILTER_PRI_MANUAL); in ef4_set_features()
2194 if ((net_dev->features ^ data) & NETIF_F_HW_VLAN_CTAG_FILTER) { in ef4_set_features()
2224 strcpy(efx->name, efx->net_dev->name); in ef4_update_name()
2234 if ((net_dev->netdev_ops == &ef4_netdev_ops) && in ef4_netdev_event()
2249 return sprintf(buf, "%d\n", efx->phy_type); in phy_type_show()
2255 struct net_device *net_dev = efx->net_dev; in ef4_register_netdev()
2259 net_dev->watchdog_timeo = 5 * HZ; in ef4_register_netdev()
2260 net_dev->irq = efx->pci_dev->irq; in ef4_register_netdev()
2261 net_dev->netdev_ops = &ef4_netdev_ops; in ef4_register_netdev()
2262 net_dev->ethtool_ops = &ef4_ethtool_ops; in ef4_register_netdev()
2264 net_dev->min_mtu = EF4_MIN_MTU; in ef4_register_netdev()
2265 net_dev->max_mtu = EF4_MAX_MTU; in ef4_register_netdev()
2273 efx->state = STATE_READY; in ef4_register_netdev()
2275 if (efx->reset_pending) { in ef4_register_netdev()
2276 netif_err(efx, probe, efx->net_dev, in ef4_register_netdev()
2277 "aborting probe due to scheduled reset\n"); in ef4_register_netdev()
2278 rc = -EIO; in ef4_register_netdev()
2282 rc = dev_alloc_name(net_dev, net_dev->name); in ef4_register_netdev()
2304 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); in ef4_register_netdev()
2306 netif_err(efx, drv, efx->net_dev, in ef4_register_netdev()
2317 efx->state = STATE_UNINIT; in ef4_register_netdev()
2319 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); in ef4_register_netdev()
2325 if (!efx->net_dev) in ef4_unregister_netdev()
2328 BUG_ON(netdev_priv(efx->net_dev) != efx); in ef4_unregister_netdev()
2331 strscpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); in ef4_unregister_netdev()
2332 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); in ef4_unregister_netdev()
2333 unregister_netdev(efx->net_dev); in ef4_unregister_netdev()
2339 * Device reset and suspend
2344 * before reset. */
2352 mutex_lock(&efx->mac_lock); in ef4_reset_down()
2353 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && in ef4_reset_down()
2355 efx->phy_op->fini(efx); in ef4_reset_down()
2356 efx->type->fini(efx); in ef4_reset_down()
2371 rc = efx->type->init(efx); in ef4_reset_up()
2373 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); in ef4_reset_up()
2380 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && in ef4_reset_up()
2382 rc = efx->phy_op->init(efx); in ef4_reset_up()
2385 rc = efx->phy_op->reconfigure(efx); in ef4_reset_up()
2386 if (rc && rc != -EPERM) in ef4_reset_up()
2387 netif_err(efx, drv, efx->net_dev, in ef4_reset_up()
2395 down_read(&efx->filter_sem); in ef4_reset_up()
2397 up_read(&efx->filter_sem); in ef4_reset_up()
2399 mutex_unlock(&efx->mac_lock); in ef4_reset_up()
2406 efx->port_initialized = false; in ef4_reset_up()
2408 mutex_unlock(&efx->mac_lock); in ef4_reset_up()
2413 /* Reset the NIC using the specified method. Note that the reset may
2423 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", in ef4_reset()
2429 rc = efx->type->reset(efx, method); in ef4_reset()
2431 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); in ef4_reset()
2439 efx->reset_pending &= -(1 << (method + 1)); in ef4_reset()
2440 else /* it doesn't fit into the well-ordered scope hierarchy */ in ef4_reset()
2441 __clear_bit(method, &efx->reset_pending); in ef4_reset()
2443 /* Reinitialise bus-mastering, which may have been turned off before in ef4_reset()
2444 * the reset was scheduled. This is still appropriate, even in the in ef4_reset()
2447 pci_set_master(efx->pci_dev); in ef4_reset()
2462 dev_close(efx->net_dev); in ef4_reset()
2463 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); in ef4_reset()
2464 efx->state = STATE_DISABLED; in ef4_reset()
2466 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); in ef4_reset()
2467 netif_device_attach(efx->net_dev); in ef4_reset()
2475 * Returns a non-zero value otherwise.
2482 * schedule a 'recover or reset', leading to this recovery handler. in ef4_try_recovery()
2485 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev); in ef4_try_recovery()
2487 /* The EEH mechanisms will handle the error and reset the in ef4_try_recovery()
2497 * schedule a reset for later.
2505 pending = READ_ONCE(efx->reset_pending); in ef4_reset_work()
2506 method = fls(pending) - 1; in ef4_reset_work()
2522 if (efx->state == STATE_READY) in ef4_reset_work()
2532 if (efx->state == STATE_RECOVERY) { in ef4_schedule_reset()
2533 netif_dbg(efx, drv, efx->net_dev, in ef4_schedule_reset()
2534 "recovering: skip scheduling %s reset\n", in ef4_schedule_reset()
2548 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", in ef4_schedule_reset()
2552 method = efx->type->map_reset_reason(type); in ef4_schedule_reset()
2553 netif_dbg(efx, drv, efx->net_dev, in ef4_schedule_reset()
2554 "scheduling %s reset for %s\n", in ef4_schedule_reset()
2559 set_bit(method, &efx->reset_pending); in ef4_schedule_reset()
2563 * to abort probing or reschedule the reset later. in ef4_schedule_reset()
2565 if (READ_ONCE(efx->state) != STATE_READY) in ef4_schedule_reset()
2568 queue_work(reset_workqueue, &efx->reset_work); in ef4_schedule_reset()
2622 * ef4_nic (including all sub-structures).
2630 INIT_LIST_HEAD(&efx->node); in ef4_init_struct()
2631 INIT_LIST_HEAD(&efx->secondary_list); in ef4_init_struct()
2632 spin_lock_init(&efx->biu_lock); in ef4_init_struct()
2634 INIT_LIST_HEAD(&efx->mtd_list); in ef4_init_struct()
2636 INIT_WORK(&efx->reset_work, ef4_reset_work); in ef4_init_struct()
2637 INIT_DELAYED_WORK(&efx->monitor_work, ef4_monitor); in ef4_init_struct()
2638 INIT_DELAYED_WORK(&efx->selftest_work, ef4_selftest_async_work); in ef4_init_struct()
2639 efx->pci_dev = pci_dev; in ef4_init_struct()
2640 efx->msg_enable = debug; in ef4_init_struct()
2641 efx->state = STATE_UNINIT; in ef4_init_struct()
2642 strscpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); in ef4_init_struct()
2644 efx->net_dev = net_dev; in ef4_init_struct()
2645 efx->rx_prefix_size = efx->type->rx_prefix_size; in ef4_init_struct()
2646 efx->rx_ip_align = in ef4_init_struct()
2647 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; in ef4_init_struct()
2648 efx->rx_packet_hash_offset = in ef4_init_struct()
2649 efx->type->rx_hash_offset - efx->type->rx_prefix_size; in ef4_init_struct()
2650 efx->rx_packet_ts_offset = in ef4_init_struct()
2651 efx->type->rx_ts_offset - efx->type->rx_prefix_size; in ef4_init_struct()
2652 spin_lock_init(&efx->stats_lock); in ef4_init_struct()
2653 mutex_init(&efx->mac_lock); in ef4_init_struct()
2654 efx->phy_op = &ef4_dummy_phy_operations; in ef4_init_struct()
2655 efx->mdio.dev = net_dev; in ef4_init_struct()
2656 INIT_WORK(&efx->mac_work, ef4_mac_work); in ef4_init_struct()
2657 init_waitqueue_head(&efx->flush_wq); in ef4_init_struct()
2660 efx->channel[i] = ef4_alloc_channel(efx, i, NULL); in ef4_init_struct()
2661 if (!efx->channel[i]) in ef4_init_struct()
2663 efx->msi_context[i].efx = efx; in ef4_init_struct()
2664 efx->msi_context[i].index = i; in ef4_init_struct()
2668 efx->interrupt_mode = max(efx->type->max_interrupt_mode, in ef4_init_struct()
2672 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", in ef4_init_struct()
2674 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); in ef4_init_struct()
2675 if (!efx->workqueue) in ef4_init_struct()
2682 return -ENOMEM; in ef4_init_struct()
2690 kfree(efx->channel[i]); in ef4_fini_struct()
2692 kfree(efx->vpd_sn); in ef4_fini_struct()
2694 if (efx->workqueue) { in ef4_fini_struct()
2695 destroy_workqueue(efx->workqueue); in ef4_fini_struct()
2696 efx->workqueue = NULL; in ef4_fini_struct()
2706 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc; in ef4_update_sw_stats()
2708 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops); in ef4_update_sw_stats()
2725 BUG_ON(efx->state == STATE_READY); in ef4_pci_remove_main()
2726 cancel_work_sync(&efx->reset_work); in ef4_pci_remove_main()
2731 efx->type->fini(efx); in ef4_pci_remove_main()
2751 dev_close(efx->net_dev); in ef4_pci_remove()
2753 efx->state = STATE_UNINIT; in ef4_pci_remove()
2763 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); in ef4_pci_remove()
2766 free_netdev(efx->net_dev); in ef4_pci_remove()
2770 * Called during probe to display the part number of the installed NIC.
2774 struct pci_dev *dev = efx->pci_dev; in ef4_probe_vpd_strings()
2797 efx->vpd_sn = kmemdup_nul(vpd_data + start, kw_len, GFP_KERNEL); in ef4_probe_vpd_strings()
2810 /* Do start-of-day initialisation */ in ef4_pci_probe_main()
2817 rc = efx->type->init(efx); in ef4_pci_probe_main()
2819 netif_err(efx, probe, efx->net_dev, in ef4_pci_probe_main()
2826 netif_err(efx, probe, efx->net_dev, in ef4_pci_probe_main()
2845 efx->type->fini(efx); in ef4_pci_probe_main()
2873 return -ENOMEM; in ef4_pci_probe()
2875 efx->type = (const struct ef4_nic_type *) entry->driver_data; in ef4_pci_probe()
2876 efx->fixed_features |= NETIF_F_HIGHDMA; in ef4_pci_probe()
2879 SET_NETDEV_DEV(net_dev, &pci_dev->dev); in ef4_pci_probe()
2884 netif_info(efx, probe, efx->net_dev, in ef4_pci_probe()
2898 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | in ef4_pci_probe()
2901 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG | in ef4_pci_probe()
2904 net_dev->hw_features = net_dev->features & ~efx->fixed_features; in ef4_pci_probe()
2910 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; in ef4_pci_probe()
2911 net_dev->features |= efx->fixed_features; in ef4_pci_probe()
2917 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); in ef4_pci_probe()
2923 if (rc && rc != -EPERM) in ef4_pci_probe()
2924 netif_warn(efx, probe, efx->net_dev, in ef4_pci_probe()
2937 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); in ef4_pci_probe()
2948 if (efx->state != STATE_DISABLED) { in ef4_pm_freeze()
2949 efx->state = STATE_UNINIT; in ef4_pm_freeze()
2969 if (efx->state != STATE_DISABLED) { in ef4_pm_thaw()
2974 mutex_lock(&efx->mac_lock); in ef4_pm_thaw()
2975 efx->phy_op->reconfigure(efx); in ef4_pm_thaw()
2976 mutex_unlock(&efx->mac_lock); in ef4_pm_thaw()
2980 netif_device_attach(efx->net_dev); in ef4_pm_thaw()
2982 efx->state = STATE_READY; in ef4_pm_thaw()
2984 efx->type->resume_wol(efx); in ef4_pm_thaw()
2990 queue_work(reset_workqueue, &efx->reset_work); in ef4_pm_thaw()
3005 efx->type->fini(efx); in ef4_pm_poweroff()
3007 efx->reset_pending = 0; in ef4_pm_poweroff()
3027 pci_set_master(efx->pci_dev); in ef4_pm_resume()
3028 rc = efx->type->reset(efx, RESET_TYPE_ALL); in ef4_pm_resume()
3031 rc = efx->type->init(efx); in ef4_pm_resume()
3060 * Stop the software path and request a slot reset.
3073 if (efx->state != STATE_DISABLED) { in ef4_io_error_detected()
3074 efx->state = STATE_RECOVERY; in ef4_io_error_detected()
3075 efx->reset_pending = 0; in ef4_io_error_detected()
3097 /* Fake a successful reset, which will be performed later in ef4_io_resume. */
3104 netif_err(efx, hw, efx->net_dev, in ef4_io_slot_reset()
3105 "Cannot re-enable PCI device after reset.\n"); in ef4_io_slot_reset()
3112 /* Perform the actual reset and resume I/O operations. */
3120 if (efx->state == STATE_DISABLED) in ef4_io_resume()
3125 netif_err(efx, hw, efx->net_dev, in ef4_io_resume()
3128 efx->state = STATE_READY; in ef4_io_resume()
3129 netif_dbg(efx, hw, efx->net_dev, in ef4_io_resume()
3137 /* For simplicity and reliability, we always require a slot reset and try to
3138 * reset the hardware when a pci error affecting the device is detected.
3140 * with our request for slot reset the mmio_enabled callback will never be
3152 .probe = ef4_pci_probe,
3180 rc = -ENOMEM; in ef4_init_module()