Lines Matching refs:RTL_R32
85 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg)) macro
950 return RTL_R32(tp, ERIAR) & ERIAR_FLAG; in DECLARE_RTL_COND()
982 RTL_R32(tp, ERIDR) : ~0; in _rtl_eri_read()
1014 return RTL_R32(tp, GPHY_OCP) & OCPAR_FLAG; in DECLARE_RTL_COND()
1035 (RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT; in r8168_phy_ocp_read()
1062 return RTL_R32(tp, OCPDR); in __r8168_mac_ocp_read()
1150 return RTL_R32(tp, PHYAR) & 0x80000000; in DECLARE_RTL_COND()
1172 RTL_R32(tp, PHYAR) & 0xffff : -ETIMEDOUT; in r8169_mdio_read()
1185 return RTL_R32(tp, OCPAR) & OCPAR_FLAG; in DECLARE_RTL_COND()
1192 RTL_W32(tp, 0xd0, RTL_R32(tp, 0xd0) & ~R8168DP_1_MDIO_ACCESS_BIT); in r8168dp_2_mdio_start()
1197 RTL_W32(tp, 0xd0, RTL_R32(tp, 0xd0) | R8168DP_1_MDIO_ACCESS_BIT); in r8168dp_2_mdio_stop()
1257 return RTL_R32(tp, EPHYAR) & EPHYAR_FLAG; in DECLARE_RTL_COND()
1275 RTL_R32(tp, EPHYAR) & EPHYAR_DATA_MASK : ~0; in rtl_ephy_read()
1282 RTL_R32(tp, OCPDR) : ~0; in r8168dp_ocp_read()
1449 return RTL_R32(tp, EFUSEAR) & EFUSEAR_FLAG; in DECLARE_RTL_COND()
1457 RTL_R32(tp, EFUSEAR) & EFUSEAR_DATA_MASK : ~0; in rtl8168d_efuse_read()
1463 return RTL_R32(tp, IntrStatus_8125); in rtl_get_events()
1646 u32 rx_config = RTL_R32(tp, RxConfig); in rtl_set_rx_config_features()
1742 return RTL_R32(tp, CounterAddrLow) & (CounterReset | CounterDump); in DECLARE_RTL_COND()
2629 RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~RX_CONFIG_ACCEPT_MASK); in rtl_rx_close()
2639 return RTL_R32(tp, TxConfig) & TXCFG_EMPTY; in DECLARE_RTL_COND()
2675 RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~RXDV_GATED_EN); in rtl_disable_rxdvgate()
2680 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | RXDV_GATED_EN); in rtl_enable_rxdvgate()
2688 RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | in rtl_wol_enable_rx()
2793 tmp = RTL_R32(tp, RxConfig); in rtl_set_rx_mode()
2799 return RTL_R32(tp, CSIAR) & CSIAR_FLAG; in DECLARE_RTL_COND()
2821 RTL_R32(tp, CSIDR) : ~0; in rtl_csi_read()
3143 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | TXPLA_RST); in rtl_hw_start_8168e_1()
3144 RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~TXPLA_RST); in rtl_hw_start_8168e_1()
3178 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN); in rtl_hw_start_8168e_2()
3199 RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN); in rtl_hw_start_8168f()
3604 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8105e_1()
3607 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) & ~0x010000); in rtl_hw_start_8105e_1()
3633 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8402()
3654 RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800); in rtl_hw_start_8106()
3656 RTL_W32(tp, MISC, (RTL_R32(tp, MISC) | DISABLE_LAN_EN) & ~EARLY_TALLY_EN); in rtl_hw_start_8106()
4705 if (RTL_R32(tp, TxConfig) == ~0) { in rtl_task()
5435 txconfig = RTL_R32(tp, TxConfig); in rtl_init_one()