Lines Matching +full:dw +full:- +full:pcie +full:- +full:ep

1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
26 #include <linux/dma-mapping.h>
38 #define FIRMWARE_8168D_1 "rtl_nic/rtl8168d-1.fw"
39 #define FIRMWARE_8168D_2 "rtl_nic/rtl8168d-2.fw"
40 #define FIRMWARE_8168E_1 "rtl_nic/rtl8168e-1.fw"
41 #define FIRMWARE_8168E_2 "rtl_nic/rtl8168e-2.fw"
42 #define FIRMWARE_8168E_3 "rtl_nic/rtl8168e-3.fw"
43 #define FIRMWARE_8168F_1 "rtl_nic/rtl8168f-1.fw"
44 #define FIRMWARE_8168F_2 "rtl_nic/rtl8168f-2.fw"
45 #define FIRMWARE_8105E_1 "rtl_nic/rtl8105e-1.fw"
46 #define FIRMWARE_8402_1 "rtl_nic/rtl8402-1.fw"
47 #define FIRMWARE_8411_1 "rtl_nic/rtl8411-1.fw"
48 #define FIRMWARE_8411_2 "rtl_nic/rtl8411-2.fw"
49 #define FIRMWARE_8106E_1 "rtl_nic/rtl8106e-1.fw"
50 #define FIRMWARE_8106E_2 "rtl_nic/rtl8106e-2.fw"
51 #define FIRMWARE_8168G_2 "rtl_nic/rtl8168g-2.fw"
52 #define FIRMWARE_8168G_3 "rtl_nic/rtl8168g-3.fw"
53 #define FIRMWARE_8168H_2 "rtl_nic/rtl8168h-2.fw"
54 #define FIRMWARE_8168FP_3 "rtl_nic/rtl8168fp-3.fw"
55 #define FIRMWARE_8107E_2 "rtl_nic/rtl8107e-2.fw"
56 #define FIRMWARE_8125A_3 "rtl_nic/rtl8125a-3.fw"
57 #define FIRMWARE_8125B_2 "rtl_nic/rtl8125b-2.fw"
58 #define FIRMWARE_8125D_1 "rtl_nic/rtl8125d-1.fw"
59 #define FIRMWARE_8125D_2 "rtl_nic/rtl8125d-2.fw"
60 #define FIRMWARE_8125BP_2 "rtl_nic/rtl8125bp-2.fw"
61 #define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw"
62 #define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw"
63 #define FIRMWARE_8127A_1 "rtl_nic/rtl8127a-1.fw"
69 #define R8169_RX_BUF_SIZE (SZ_16K - 1)
82 #define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg))
83 #define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg))
84 #define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg))
85 #define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg))
86 #define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg))
87 #define RTL_R32(tp, reg) readl(tp->mmio_addr + (reg))
89 #define JUMBO_4K (4 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
90 #define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
91 #define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
92 #define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
93 #define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
127 /* 8168EP family. */
128 { 0x7cf, 0x502, RTL_GIGA_MAC_VER_51, "RTL8168ep/8111ep" },
204 /* Catch-all */
254 #define TXCFG_AUTO_FIFO (1 << 7) /* 8111e-vl */
255 #define TXCFG_EMPTY (1 << 11) /* 8111e-vl */
473 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
492 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
709 struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
710 struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
748 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
780 return &tp->pci_dev->dev; in tp_to_dev()
831 return tp->mac_version >= RTL_GIGA_MAC_VER_61; in rtl_is_8125()
836 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_is_8168evl_up()
837 tp->mac_version != RTL_GIGA_MAC_VER_39 && in rtl_is_8168evl_up()
838 tp->mac_version <= RTL_GIGA_MAC_VER_52; in rtl_is_8168evl_up()
843 return tp->mac_version >= RTL_GIGA_MAC_VER_34 && in rtl_supports_eee()
844 tp->mac_version != RTL_GIGA_MAC_VER_37 && in rtl_supports_eee()
845 tp->mac_version != RTL_GIGA_MAC_VER_39; in rtl_supports_eee()
867 if (c->check(tp) == high) in rtl_loop_wait()
873 netdev_err(tp->dev, "%s == %d (loop: %d, delay: %lu).\n", in rtl_loop_wait()
874 c->msg, !high, n, usecs); in rtl_loop_wait()
911 mutex_lock(&tp->led_lock); in rtl8168_led_mod_ctrl()
913 mutex_unlock(&tp->led_lock); in rtl8168_led_mod_ctrl()
954 mutex_lock(&tp->led_lock); in rtl8125_set_led_mode()
957 mutex_unlock(&tp->led_lock); in rtl8125_set_led_mode()
984 struct pci_dev *pdev = tp->pci_dev; in r8169_get_led_name()
988 domain = pci_domain_nr(pdev->bus); in r8169_get_led_name()
994 if (pdev->multifunction) in r8169_get_led_name()
995 snprintf(pfun, sizeof(pfun), "f%d", PCI_FUNC(pdev->devfn)); in r8169_get_led_name()
999 snprintf(buf, buf_len, "en%sp%ds%d%s-%d::lan", pdom, pdev->bus->number, in r8169_get_led_name()
1000 PCI_SLOT(pdev->devfn), pfun, idx); in r8169_get_led_name()
1006 if (type == ERIAR_OOB && tp->mac_version == RTL_GIGA_MAC_VER_52) in r8168fp_adjust_ocp_cmd()
1097 (RTL_R32(tp, GPHY_OCP) & 0xffff) : -ETIMEDOUT; in r8168_phy_ocp_read()
1112 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_write()
1114 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_write()
1132 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_read()
1134 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_read()
1145 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_modify()
1148 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in r8168_mac_ocp_modify()
1152 * PHY MCU interrupts before PHY power-down.
1156 switch (tp->mac_version) { in rtl8168g_phy_suspend_quirk()
1171 tp->ocp_base = value ? value << 4 : OCP_STD_PHY_BASE; in r8168g_mdio_write()
1175 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_write()
1176 reg -= 0x10; in r8168g_mdio_write()
1178 if (tp->ocp_base == OCP_STD_PHY_BASE && reg == MII_BMCR) in r8168g_mdio_write()
1181 r8168_phy_ocp_write(tp, tp->ocp_base + reg * 2, value); in r8168g_mdio_write()
1187 return tp->ocp_base == OCP_STD_PHY_BASE ? 0 : tp->ocp_base >> 4; in r8168g_mdio_read()
1189 if (tp->ocp_base != OCP_STD_PHY_BASE) in r8168g_mdio_read()
1190 reg -= 0x10; in r8168g_mdio_read()
1192 return r8168_phy_ocp_read(tp, tp->ocp_base + reg * 2); in r8168g_mdio_read()
1198 tp->ocp_base = value << 4; in mac_mcu_write()
1202 r8168_mac_ocp_write(tp, tp->ocp_base + reg, value); in mac_mcu_write()
1207 return r8168_mac_ocp_read(tp, tp->ocp_base + reg); in mac_mcu_read()
1234 RTL_R32(tp, PHYAR) & 0xffff : -ETIMEDOUT; in r8169_mdio_read()
1290 switch (tp->mac_version) { in rtl_writephy()
1306 switch (tp->mac_version) { in rtl_readphy()
1380 return (tp->mac_version == RTL_GIGA_MAC_VER_31) ? 0xb8 : 0x10; in rtl8168_get_ocp_reg()
1413 if (tp->dash_enabled) in rtl8168dp_driver_start()
1421 if (tp->dash_enabled) in rtl8168ep_driver_start()
1434 if (tp->dash_type == RTL_DASH_DP) in rtl8168_driver_start()
1436 else if (tp->dash_type == RTL_DASH_25_BP) in rtl8168_driver_start()
1445 if (tp->dash_enabled) in rtl8168dp_driver_stop()
1454 if (tp->dash_enabled) in rtl8168ep_driver_stop()
1467 if (tp->dash_type == RTL_DASH_DP) in rtl8168_driver_stop()
1469 else if (tp->dash_type == RTL_DASH_25_BP) in rtl8168_driver_stop()
1489 switch (tp->dash_type) { in rtl_dash_is_enabled()
1502 switch (tp->mac_version) { in rtl_get_dash_type()
1517 if (tp->mac_version >= RTL_GIGA_MAC_VER_25 && in rtl_set_d3_pll_down()
1518 tp->mac_version != RTL_GIGA_MAC_VER_28 && in rtl_set_d3_pll_down()
1519 tp->mac_version != RTL_GIGA_MAC_VER_31 && in rtl_set_d3_pll_down()
1520 tp->mac_version != RTL_GIGA_MAC_VER_38) in rtl_set_d3_pll_down()
1570 RTL_W32(tp, IntrMask_8125, tp->irq_mask); in rtl_irq_enable()
1572 RTL_W16(tp, IntrMask, tp->irq_mask); in rtl_irq_enable()
1584 struct phy_device *phydev = tp->phydev; in rtl_link_chg_patch()
1586 if (tp->mac_version == RTL_GIGA_MAC_VER_34 || in rtl_link_chg_patch()
1587 tp->mac_version == RTL_GIGA_MAC_VER_38) { in rtl_link_chg_patch()
1588 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1591 } else if (phydev->speed == SPEED_100) { in rtl_link_chg_patch()
1599 } else if (tp->mac_version == RTL_GIGA_MAC_VER_35 || in rtl_link_chg_patch()
1600 tp->mac_version == RTL_GIGA_MAC_VER_36) { in rtl_link_chg_patch()
1601 if (phydev->speed == SPEED_1000) { in rtl_link_chg_patch()
1608 } else if (tp->mac_version == RTL_GIGA_MAC_VER_37) { in rtl_link_chg_patch()
1609 if (phydev->speed == SPEED_10) { in rtl_link_chg_patch()
1624 wol->supported = WAKE_ANY; in rtl8169_get_wol()
1625 wol->wolopts = tp->saved_wolopts; in rtl8169_get_wol()
1656 switch (tp->mac_version) { in __rtl8169_set_wol()
1673 if (!tp->dash_enabled) { in __rtl8169_set_wol()
1675 tp->dev->ethtool->wol_enabled = wolopts ? 1 : 0; in __rtl8169_set_wol()
1683 if (wol->wolopts & ~WAKE_ANY) in rtl8169_set_wol()
1684 return -EINVAL; in rtl8169_set_wol()
1686 tp->saved_wolopts = wol->wolopts; in rtl8169_set_wol()
1687 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_set_wol()
1696 struct rtl_fw *rtl_fw = tp->rtl_fw; in rtl8169_get_drvinfo()
1698 strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); in rtl8169_get_drvinfo()
1699 strscpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info)); in rtl8169_get_drvinfo()
1700 BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); in rtl8169_get_drvinfo()
1702 strscpy(info->fw_version, rtl_fw->version, in rtl8169_get_drvinfo()
1703 sizeof(info->fw_version)); in rtl8169_get_drvinfo()
1716 if (dev->mtu > TD_MSS_MAX) in rtl8169_fix_features()
1719 if (dev->mtu > ETH_DATA_LEN && in rtl8169_fix_features()
1720 tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl8169_fix_features()
1754 tp->cp_cmd |= RxChkSum; in rtl8169_set_features()
1756 tp->cp_cmd &= ~RxChkSum; in rtl8169_set_features()
1760 tp->cp_cmd |= RxVlan; in rtl8169_set_features()
1762 tp->cp_cmd &= ~RxVlan; in rtl8169_set_features()
1765 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl8169_set_features()
1779 u32 opts2 = le32_to_cpu(desc->opts2); in rtl8169_rx_vlan_tag()
1789 u32 __iomem *data = tp->mmio_addr; in rtl8169_get_regs()
1790 u32 *dw = p; in rtl8169_get_regs() local
1794 memcpy_fromio(dw++, data++, 4); in rtl8169_get_regs()
1819 return -EOPNOTSUPP; in rtl8169_get_sset_count()
1830 u32 cmd = lower_32_bits(tp->counters_phys_addr); in rtl8169_do_counters()
1832 RTL_W32(tp, CounterAddrHigh, upper_32_bits(tp->counters_phys_addr)); in rtl8169_do_counters()
1846 * is disabled. If 0xff chip may be in a PCI power-save state. in rtl8169_update_counters()
1854 struct rtl8169_counters *counters = tp->counters; in rtl8169_init_counter_offsets()
1871 if (tp->tc_offset.inited) in rtl8169_init_counter_offsets()
1874 if (tp->mac_version >= RTL_GIGA_MAC_VER_19) { in rtl8169_init_counter_offsets()
1878 tp->tc_offset.tx_errors = counters->tx_errors; in rtl8169_init_counter_offsets()
1879 tp->tc_offset.tx_multi_collision = counters->tx_multi_collision; in rtl8169_init_counter_offsets()
1880 tp->tc_offset.tx_aborted = counters->tx_aborted; in rtl8169_init_counter_offsets()
1881 tp->tc_offset.rx_missed = counters->rx_missed; in rtl8169_init_counter_offsets()
1884 tp->tc_offset.inited = true; in rtl8169_init_counter_offsets()
1893 counters = tp->counters; in rtl8169_get_ethtool_stats()
1896 data[0] = le64_to_cpu(counters->tx_packets); in rtl8169_get_ethtool_stats()
1897 data[1] = le64_to_cpu(counters->rx_packets); in rtl8169_get_ethtool_stats()
1898 data[2] = le64_to_cpu(counters->tx_errors); in rtl8169_get_ethtool_stats()
1899 data[3] = le32_to_cpu(counters->rx_errors); in rtl8169_get_ethtool_stats()
1900 data[4] = le16_to_cpu(counters->rx_missed); in rtl8169_get_ethtool_stats()
1901 data[5] = le16_to_cpu(counters->align_errors); in rtl8169_get_ethtool_stats()
1902 data[6] = le32_to_cpu(counters->tx_one_collision); in rtl8169_get_ethtool_stats()
1903 data[7] = le32_to_cpu(counters->tx_multi_collision); in rtl8169_get_ethtool_stats()
1904 data[8] = le64_to_cpu(counters->rx_unicast); in rtl8169_get_ethtool_stats()
1905 data[9] = le64_to_cpu(counters->rx_broadcast); in rtl8169_get_ethtool_stats()
1906 data[10] = le32_to_cpu(counters->rx_multicast); in rtl8169_get_ethtool_stats()
1907 data[11] = le16_to_cpu(counters->tx_aborted); in rtl8169_get_ethtool_stats()
1908 data[12] = le16_to_cpu(counters->tx_underrun); in rtl8169_get_ethtool_stats()
1923 * > 1 - the availability of the IntrMitigate (0xe2) register through the
1928 * > 2 - the Tx timer unit at gigabit speed
1978 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_coalesce_info()
1984 if (tp->phydev->speed == SPEED_UNKNOWN) in rtl_coalesce_info()
1987 for (; ci->speed; ci++) { in rtl_coalesce_info()
1988 if (tp->phydev->speed == ci->speed) in rtl_coalesce_info()
1992 return ERR_PTR(-ELNRNG); in rtl_coalesce_info()
2006 return -EOPNOTSUPP; in rtl_get_coalesce()
2015 scale = ci->scale_nsecs[tp->cp_cmd & INTT_MASK]; in rtl_get_coalesce()
2020 ec->tx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
2024 ec->tx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
2027 ec->rx_coalesce_usecs = DIV_ROUND_UP(c_us * scale, 1000); in rtl_get_coalesce()
2030 ec->rx_max_coalesced_frames = (c_us || c_fr) ? c_fr * 4 : 1; in rtl_get_coalesce()
2047 if (usec <= ci->scale_nsecs[i] * RTL_COALESCE_T_MAX / 1000U) { in rtl_coalesce_choose_scale()
2049 return ci->scale_nsecs[i]; in rtl_coalesce_choose_scale()
2053 return -ERANGE; in rtl_coalesce_choose_scale()
2062 u32 tx_fr = ec->tx_max_coalesced_frames; in rtl_set_coalesce()
2063 u32 rx_fr = ec->rx_max_coalesced_frames; in rtl_set_coalesce()
2069 return -EOPNOTSUPP; in rtl_set_coalesce()
2072 return -ERANGE; in rtl_set_coalesce()
2074 coal_usec_max = max(ec->rx_coalesce_usecs, ec->tx_coalesce_usecs); in rtl_set_coalesce()
2082 * - both rx_usecs=0 & rx_frames=0 in hardware (no delay on RX) in rtl_set_coalesce()
2083 * - rtl_get_coalesce returns rx_usecs=0, rx_frames=1 in rtl_set_coalesce()
2084 * - then user does `ethtool -C eth0 rx-usecs 100` in rtl_set_coalesce()
2095 if ((tx_fr && !ec->tx_coalesce_usecs) || in rtl_set_coalesce()
2096 (rx_fr && !ec->rx_coalesce_usecs)) in rtl_set_coalesce()
2097 return -EINVAL; in rtl_set_coalesce()
2102 units = DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
2104 units = DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000U, scale); in rtl_set_coalesce()
2109 /* Meaning of PktCntrDisable bit changed from RTL8168e-vl */ in rtl_set_coalesce()
2113 tp->cp_cmd |= PktCntrDisable; in rtl_set_coalesce()
2115 tp->cp_cmd &= ~PktCntrDisable; in rtl_set_coalesce()
2118 tp->cp_cmd = (tp->cp_cmd & ~INTT_MASK) | cp01; in rtl_set_coalesce()
2119 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_set_coalesce()
2127 unsigned int timer_val = READ_ONCE(tp->dev->mtu) + ETH_HLEN + 0x20; in rtl_set_eee_txidle_timer()
2129 switch (tp->mac_version) { in rtl_set_eee_txidle_timer()
2132 tp->tx_lpi_timer = timer_val; in rtl_set_eee_txidle_timer()
2136 tp->tx_lpi_timer = timer_val; in rtl_set_eee_txidle_timer()
2146 unsigned int speed = tp->phydev->speed; in r8169_get_tx_lpi_timer_us()
2147 unsigned int timer = tp->tx_lpi_timer; in r8169_get_tx_lpi_timer_us()
2162 return -EOPNOTSUPP; in rtl8169_get_eee()
2164 ret = phy_ethtool_get_eee(tp->phydev, data); in rtl8169_get_eee()
2168 data->tx_lpi_timer = r8169_get_tx_lpi_timer_us(tp); in rtl8169_get_eee()
2178 return -EOPNOTSUPP; in rtl8169_set_eee()
2180 return phy_ethtool_set_eee(tp->phydev, data); in rtl8169_set_eee()
2188 data->rx_max_pending = NUM_RX_DESC; in rtl8169_get_ringparam()
2189 data->rx_pending = NUM_RX_DESC; in rtl8169_get_ringparam()
2190 data->tx_max_pending = NUM_TX_DESC; in rtl8169_get_ringparam()
2191 data->tx_pending = NUM_TX_DESC; in rtl8169_get_ringparam()
2203 pause_stats->tx_pause_frames = le32_to_cpu(tp->counters->tx_pause_on); in rtl8169_get_pause_stats()
2204 pause_stats->rx_pause_frames = le32_to_cpu(tp->counters->rx_pause_on); in rtl8169_get_pause_stats()
2213 phy_get_pause(tp->phydev, &tx_pause, &rx_pause); in rtl8169_get_pauseparam()
2215 data->autoneg = tp->phydev->autoneg; in rtl8169_get_pauseparam()
2216 data->tx_pause = tx_pause ? 1 : 0; in rtl8169_get_pauseparam()
2217 data->rx_pause = rx_pause ? 1 : 0; in rtl8169_get_pauseparam()
2225 if (dev->mtu > ETH_DATA_LEN) in rtl8169_set_pauseparam()
2226 return -EOPNOTSUPP; in rtl8169_set_pauseparam()
2228 phy_set_asym_pause(tp->phydev, data->rx_pause, data->tx_pause); in rtl8169_set_pauseparam()
2240 mac_stats->FramesTransmittedOK = in rtl8169_get_eth_mac_stats()
2241 le64_to_cpu(tp->counters->tx_packets); in rtl8169_get_eth_mac_stats()
2242 mac_stats->SingleCollisionFrames = in rtl8169_get_eth_mac_stats()
2243 le32_to_cpu(tp->counters->tx_one_collision); in rtl8169_get_eth_mac_stats()
2244 mac_stats->MultipleCollisionFrames = in rtl8169_get_eth_mac_stats()
2245 le32_to_cpu(tp->counters->tx_multi_collision); in rtl8169_get_eth_mac_stats()
2246 mac_stats->FramesReceivedOK = in rtl8169_get_eth_mac_stats()
2247 le64_to_cpu(tp->counters->rx_packets); in rtl8169_get_eth_mac_stats()
2248 mac_stats->AlignmentErrors = in rtl8169_get_eth_mac_stats()
2249 le16_to_cpu(tp->counters->align_errors); in rtl8169_get_eth_mac_stats()
2250 mac_stats->FramesLostDueToIntMACXmitError = in rtl8169_get_eth_mac_stats()
2251 le64_to_cpu(tp->counters->tx_errors); in rtl8169_get_eth_mac_stats()
2252 mac_stats->BroadcastFramesReceivedOK = in rtl8169_get_eth_mac_stats()
2253 le64_to_cpu(tp->counters->rx_broadcast); in rtl8169_get_eth_mac_stats()
2254 mac_stats->MulticastFramesReceivedOK = in rtl8169_get_eth_mac_stats()
2255 le32_to_cpu(tp->counters->rx_multicast); in rtl8169_get_eth_mac_stats()
2260 mac_stats->AlignmentErrors = in rtl8169_get_eth_mac_stats()
2261 le32_to_cpu(tp->counters->align_errors32); in rtl8169_get_eth_mac_stats()
2262 mac_stats->OctetsTransmittedOK = in rtl8169_get_eth_mac_stats()
2263 le64_to_cpu(tp->counters->tx_octets); in rtl8169_get_eth_mac_stats()
2264 mac_stats->LateCollisions = in rtl8169_get_eth_mac_stats()
2265 le32_to_cpu(tp->counters->tx_late_collision); in rtl8169_get_eth_mac_stats()
2266 mac_stats->FramesAbortedDueToXSColls = in rtl8169_get_eth_mac_stats()
2267 le32_to_cpu(tp->counters->tx_aborted32); in rtl8169_get_eth_mac_stats()
2268 mac_stats->OctetsReceivedOK = in rtl8169_get_eth_mac_stats()
2269 le64_to_cpu(tp->counters->rx_octets); in rtl8169_get_eth_mac_stats()
2270 mac_stats->FramesLostDueToIntMACRcvError = in rtl8169_get_eth_mac_stats()
2271 le32_to_cpu(tp->counters->rx_mac_error); in rtl8169_get_eth_mac_stats()
2272 mac_stats->MulticastFramesXmittedOK = in rtl8169_get_eth_mac_stats()
2273 le64_to_cpu(tp->counters->tx_multicast64); in rtl8169_get_eth_mac_stats()
2274 mac_stats->BroadcastFramesXmittedOK = in rtl8169_get_eth_mac_stats()
2275 le64_to_cpu(tp->counters->tx_broadcast64); in rtl8169_get_eth_mac_stats()
2276 mac_stats->MulticastFramesReceivedOK = in rtl8169_get_eth_mac_stats()
2277 le64_to_cpu(tp->counters->rx_multicast64); in rtl8169_get_eth_mac_stats()
2278 mac_stats->FrameTooLongErrors = in rtl8169_get_eth_mac_stats()
2279 le32_to_cpu(tp->counters->rx_frame_too_long); in rtl8169_get_eth_mac_stats()
2292 ctrl_stats->UnsupportedOpcodesReceived = in rtl8169_get_eth_ctrl_stats()
2293 le32_to_cpu(tp->counters->rx_unknown_opcode); in rtl8169_get_eth_ctrl_stats()
2339 while ((xid & p->mask) != p->val) in rtl8169_get_chip_version()
2342 if (p->mac_version == RTL_GIGA_MAC_VER_42 && !gmii) in rtl8169_get_chip_version()
2344 if (p->mac_version == RTL_GIGA_MAC_VER_46 && !gmii) in rtl8169_get_chip_version()
2352 if (tp->rtl_fw) { in rtl_release_firmware()
2353 rtl_fw_release_firmware(tp->rtl_fw); in rtl_release_firmware()
2354 kfree(tp->rtl_fw); in rtl_release_firmware()
2355 tp->rtl_fw = NULL; in rtl_release_firmware()
2364 if (tp->rtl_fw) { in r8169_apply_firmware()
2365 rtl_fw_write_firmware(tp, tp->rtl_fw); in r8169_apply_firmware()
2366 /* At least one firmware doesn't reset tp->ocp_base. */ in r8169_apply_firmware()
2367 tp->ocp_base = OCP_STD_PHY_BASE; in r8169_apply_firmware()
2370 phy_read_poll_timeout(tp->phydev, MII_BMCR, val, in r8169_apply_firmware()
2379 if (tp->mac_version != RTL_GIGA_MAC_VER_38) in rtl8168_config_eee_mac()
2422 set_bit(flag, tp->wk.flags); in rtl_schedule_task()
2423 if (!schedule_work(&tp->wk.work)) in rtl_schedule_task()
2424 clear_bit(flag, tp->wk.flags); in rtl_schedule_task()
2429 r8169_hw_phy_config(tp, tp->phydev, tp->mac_version); in rtl8169_init_phy()
2431 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { in rtl8169_init_phy()
2432 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); in rtl8169_init_phy()
2433 pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); in rtl8169_init_phy()
2438 if (tp->mac_version == RTL_GIGA_MAC_VER_05 && in rtl8169_init_phy()
2439 tp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_GIGABYTE && in rtl8169_init_phy()
2440 tp->pci_dev->subsystem_device == 0xe000) in rtl8169_init_phy()
2441 phy_write_paged(tp->phydev, 0x0001, 0x10, 0xf01b); in rtl8169_init_phy()
2444 phy_speed_up(tp->phydev); in rtl8169_init_phy()
2446 genphy_soft_reset(tp->phydev); in rtl8169_init_phy()
2459 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl_rar_set()
2474 rtl_rar_set(tp, dev->dev_addr); in rtl_set_mac_address()
2481 switch (tp->mac_version) { in rtl_init_rxcfg()
2509 tp->dirty_tx = tp->cur_tx = tp->cur_rx = 0; in rtl8169_init_ring_indexes()
2514 bool jumbo = tp->dev->mtu > ETH_DATA_LEN; in rtl_jumbo_config()
2517 if (jumbo && tp->mac_version >= RTL_GIGA_MAC_VER_17 && in rtl_jumbo_config()
2518 tp->mac_version <= RTL_GIGA_MAC_VER_26) in rtl_jumbo_config()
2522 switch (tp->mac_version) { in rtl_jumbo_config()
2543 if (pci_is_pcie(tp->pci_dev) && tp->supports_gmii) in rtl_jumbo_config()
2544 pcie_set_readrq(tp->pci_dev, readrq); in rtl_jumbo_config()
2549 tp->phydev->advertising); in rtl_jumbo_config()
2551 tp->phydev->advertising); in rtl_jumbo_config()
2552 phy_start_aneg(tp->phydev); in rtl_jumbo_config()
2573 if (tp->rtl_fw || !tp->fw_name) in rtl_request_firmware()
2580 rtl_fw->phy_write = rtl_writephy; in rtl_request_firmware()
2581 rtl_fw->phy_read = rtl_readphy; in rtl_request_firmware()
2582 rtl_fw->mac_mcu_write = mac_mcu_write; in rtl_request_firmware()
2583 rtl_fw->mac_mcu_read = mac_mcu_read; in rtl_request_firmware()
2584 rtl_fw->fw_name = tp->fw_name; in rtl_request_firmware()
2585 rtl_fw->dev = tp_to_dev(tp); in rtl_request_firmware()
2590 tp->rtl_fw = rtl_fw; in rtl_request_firmware()
2621 switch (tp->mac_version) { in rtl_wait_txrx_fifo_empty()
2653 if (tp->mac_version >= RTL_GIGA_MAC_VER_25) in rtl_wol_enable_rx()
2657 if (tp->mac_version >= RTL_GIGA_MAC_VER_40) in rtl_wol_enable_rx()
2663 if (tp->dash_enabled) in rtl_prepare_power_down()
2666 if (tp->mac_version == RTL_GIGA_MAC_VER_32 || in rtl_prepare_power_down()
2667 tp->mac_version == RTL_GIGA_MAC_VER_33) in rtl_prepare_power_down()
2671 phy_speed_down(tp->phydev, false); in rtl_prepare_power_down()
2700 RTL_W32(tp, TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2701 RTL_W32(tp, TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2702 RTL_W32(tp, RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); in rtl_set_rx_tx_desc_registers()
2703 RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32)); in rtl_set_rx_tx_desc_registers()
2710 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl8169_set_magic_reg()
2712 else if (tp->mac_version == RTL_GIGA_MAC_VER_06) in rtl8169_set_magic_reg()
2731 if (dev->flags & IFF_PROMISC) { in rtl_set_rx_mode()
2733 } else if (!(dev->flags & IFF_MULTICAST)) { in rtl_set_rx_mode()
2735 } else if (dev->flags & IFF_ALLMULTI || in rtl_set_rx_mode()
2736 tp->mac_version == RTL_GIGA_MAC_VER_35) { in rtl_set_rx_mode()
2749 if (tp->mac_version > RTL_GIGA_MAC_VER_06) { in rtl_set_rx_mode()
2770 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_write()
2781 u32 func = PCI_FUNC(tp->pci_dev->devfn); in rtl_csi_read()
2797 netdev_notice_once(tp->dev, in rtl_csi_mod()
2806 struct pci_dev *pdev = tp->pci_dev; in rtl_disable_zrxdc_timeout()
2812 if (pdev->cfg_size > RTL_GEN3_RELATED_OFF) { in rtl_disable_zrxdc_timeout()
2828 struct pci_dev *pdev = tp->pci_dev; in rtl_set_aspm_entry_latency()
2836 if (pdev->cfg_size > 0x070f && in rtl_set_aspm_entry_latency()
2860 while (len-- > 0) { in __rtl_ephy_init()
2861 w = (rtl_ephy_read(tp, e->offset) & ~e->mask) | e->bits; in __rtl_ephy_init()
2862 rtl_ephy_write(tp, e->offset, w); in __rtl_ephy_init()
2871 pcie_capability_clear_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_disable_clock_request()
2877 pcie_capability_set_word(tp->pci_dev, PCI_EXP_LNKCTL, in rtl_enable_clock_request()
2897 switch (tp->mac_version) { in rtl_enable_exit_l1()
2914 switch (tp->mac_version) { in rtl_disable_exit_l1()
2930 if (tp->mac_version < RTL_GIGA_MAC_VER_32) in rtl_hw_aspm_clkreq_enable()
2934 if (enable && tp->aspm_manageable) { in rtl_hw_aspm_clkreq_enable()
2938 if (tp->mac_version == RTL_GIGA_MAC_VER_42 || in rtl_hw_aspm_clkreq_enable()
2939 tp->mac_version == RTL_GIGA_MAC_VER_43) in rtl_hw_aspm_clkreq_enable()
2943 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
2954 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
2966 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
2975 switch (tp->mac_version) { in rtl_hw_aspm_clkreq_enable()
3310 raw_spin_lock_irqsave(&tp->mac_ocp_lock, flags); in rtl8411b_fix_phy_down()
3313 raw_spin_unlock_irqrestore(&tp->mac_ocp_lock, flags); in rtl8411b_fix_phy_down()
3335 /* The following Realtek-provided magic fixes an issue with the RX unit in rtl_hw_start_8411_2()
3336 * getting confused after the PHY having been powered-down. in rtl_hw_start_8411_2()
3403 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8168h_1()
3509 rg_saw_cnt = phy_read_paged(tp->phydev, 0x0c42, 0x13) & 0x3fff; in rtl_hw_start_8117()
3658 /* L0 7us, L1 32us - needed to avoid issues with link-up detection */ in rtl_hw_start_8106()
3697 if (tp->mac_version == RTL_GIGA_MAC_VER_70 || in rtl_hw_start_8125_common()
3698 tp->mac_version == RTL_GIGA_MAC_VER_80) in rtl_hw_start_8125_common()
3701 if (tp->mac_version == RTL_GIGA_MAC_VER_80) in rtl_hw_start_8125_common()
3703 else if (tp->mac_version == RTL_GIGA_MAC_VER_70) in rtl_hw_start_8125_common()
3705 else if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3710 if (tp->mac_version == RTL_GIGA_MAC_VER_63) in rtl_hw_start_8125_common()
3721 if (tp->mac_version == RTL_GIGA_MAC_VER_70 || in rtl_hw_start_8125_common()
3722 tp->mac_version == RTL_GIGA_MAC_VER_80) in rtl_hw_start_8125_common()
3740 if (tp->mac_version == RTL_GIGA_MAC_VER_61) in rtl_hw_start_8125_common()
3852 if (hw_configs[tp->mac_version]) in rtl_hw_config()
3853 hw_configs[tp->mac_version](tp); in rtl_hw_config()
3863 switch (tp->mac_version) { in rtl_hw_start_8125()
3870 if (tp->mac_version == RTL_GIGA_MAC_VER_80) in rtl_hw_start_8125()
3906 tp->cp_cmd |= PCIMulRW; in rtl_hw_start_8169()
3908 if (tp->mac_version == RTL_GIGA_MAC_VER_02 || in rtl_hw_start_8169()
3909 tp->mac_version == RTL_GIGA_MAC_VER_03) in rtl_hw_start_8169()
3910 tp->cp_cmd |= EnAnaPLL; in rtl_hw_start_8169()
3912 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start_8169()
3925 RTL_W16(tp, CPlusCmd, tp->cp_cmd); in rtl_hw_start()
3929 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_hw_start()
3944 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ in rtl_hw_start()
3950 rtl_set_rx_config_features(tp, tp->dev->features); in rtl_hw_start()
3951 rtl_set_rx_mode(tp->dev); in rtl_hw_start()
3959 WRITE_ONCE(dev->mtu, new_mtu); in rtl8169_change_mtu()
3969 u32 eor = le32_to_cpu(desc->opts1) & RingEnd; in rtl8169_mark_to_asic()
3971 desc->opts2 = 0; in rtl8169_mark_to_asic()
3974 WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | R8169_RX_BUF_SIZE)); in rtl8169_mark_to_asic()
3991 netdev_err(tp->dev, "Failed to map RX DMA!\n"); in rtl8169_alloc_rx_data()
3996 desc->addr = cpu_to_le64(mapping); in rtl8169_alloc_rx_data()
4006 for (i = 0; i < NUM_RX_DESC && tp->Rx_databuff[i]; i++) { in rtl8169_rx_clear()
4008 le64_to_cpu(tp->RxDescArray[i].addr), in rtl8169_rx_clear()
4010 __free_pages(tp->Rx_databuff[i], get_order(R8169_RX_BUF_SIZE)); in rtl8169_rx_clear()
4011 tp->Rx_databuff[i] = NULL; in rtl8169_rx_clear()
4012 tp->RxDescArray[i].addr = 0; in rtl8169_rx_clear()
4013 tp->RxDescArray[i].opts1 = 0; in rtl8169_rx_clear()
4024 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i); in rtl8169_rx_fill()
4027 return -ENOMEM; in rtl8169_rx_fill()
4029 tp->Rx_databuff[i] = data; in rtl8169_rx_fill()
4033 tp->RxDescArray[NUM_RX_DESC - 1].opts1 |= cpu_to_le32(RingEnd); in rtl8169_rx_fill()
4042 memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); in rtl8169_init_ring()
4043 memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); in rtl8169_init_ring()
4050 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_unmap_tx_skb()
4051 struct TxDesc *desc = tp->TxDescArray + entry; in rtl8169_unmap_tx_skb()
4053 dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), tx_skb->len, in rtl8169_unmap_tx_skb()
4066 struct ring_info *tx_skb = tp->tx_skb + entry; in rtl8169_tx_clear_range()
4067 unsigned int len = tx_skb->len; in rtl8169_tx_clear_range()
4070 struct sk_buff *skb = tx_skb->skb; in rtl8169_tx_clear_range()
4081 rtl8169_tx_clear_range(tp, tp->dirty_tx, NUM_TX_DESC); in rtl8169_tx_clear()
4082 netdev_reset_queue(tp->dev); in rtl8169_tx_clear()
4087 napi_disable(&tp->napi); in rtl8169_cleanup()
4097 switch (tp->mac_version) { in rtl8169_cleanup()
4126 netif_stop_queue(tp->dev); in rtl_reset_work()
4131 rtl8169_mark_to_asic(tp->RxDescArray + i); in rtl_reset_work()
4133 napi_enable(&tp->napi); in rtl_reset_work()
4147 struct TxDesc *txd = tp->TxDescArray + entry; in rtl8169_tx_map()
4157 netdev_err(tp->dev, "Failed to map TX data!\n"); in rtl8169_tx_map()
4161 txd->addr = cpu_to_le64(mapping); in rtl8169_tx_map()
4162 txd->opts2 = cpu_to_le32(opts[1]); in rtl8169_tx_map()
4165 if (entry == NUM_TX_DESC - 1) in rtl8169_tx_map()
4169 txd->opts1 = cpu_to_le32(opts1); in rtl8169_tx_map()
4171 tp->tx_skb[entry].len = len; in rtl8169_tx_map()
4182 for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { in rtl8169_xmit_frags()
4183 const skb_frag_t *frag = info->frags + cur_frag; in rtl8169_xmit_frags()
4196 rtl8169_tx_clear_range(tp, tp->cur_tx + 1, cur_frag); in rtl8169_xmit_frags()
4197 return -EIO; in rtl8169_xmit_frags()
4209 return ih && ih->protocol == IPPROTO_UDP; in rtl_skb_is_udp()
4212 return i6h && i6h->nexthdr == IPPROTO_UDP; in rtl_skb_is_udp()
4224 unsigned int padto = 0, len = skb->len; in rtl8125_quirk_udp_padto()
4228 unsigned int trans_data_len = skb_tail_pointer(skb) - in rtl8125_quirk_udp_padto()
4233 u16 dest = ntohs(udp_hdr(skb)->dest); in rtl8125_quirk_udp_padto()
4237 padto = len + RTL_MIN_PATCH_LEN - trans_data_len; in rtl8125_quirk_udp_padto()
4242 len + sizeof(struct udphdr) - trans_data_len); in rtl8125_quirk_udp_padto()
4253 switch (tp->mac_version) { in rtl_quirk_packet_padto()
4261 switch (tp->mac_version) { in rtl_quirk_packet_padto()
4275 u32 mss = skb_shinfo(skb)->gso_size; in rtl8169_tso_csum_v1()
4280 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v1()
4283 if (ip->protocol == IPPROTO_TCP) in rtl8169_tso_csum_v1()
4285 else if (ip->protocol == IPPROTO_UDP) in rtl8169_tso_csum_v1()
4296 u32 mss = shinfo->gso_size; in rtl8169_tso_csum_v2()
4299 if (shinfo->gso_type & SKB_GSO_TCPV4) { in rtl8169_tso_csum_v2()
4301 } else if (shinfo->gso_type & SKB_GSO_TCPV6) { in rtl8169_tso_csum_v2()
4313 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_tso_csum_v2()
4319 ip_protocol = ip_hdr(skb)->protocol; in rtl8169_tso_csum_v2()
4324 ip_protocol = ipv6_hdr(skb)->nexthdr; in rtl8169_tso_csum_v2()
4352 return READ_ONCE(tp->dirty_tx) + NUM_TX_DESC - READ_ONCE(tp->cur_tx); in rtl_tx_slots_avail()
4358 switch (tp->mac_version) { in rtl_chip_supports_csum_v2()
4379 unsigned int entry = tp->cur_tx % NUM_TX_DESC; in rtl8169_start_xmit()
4400 if (unlikely(rtl8169_tx_map(tp, opts, skb_headlen(skb), skb->data, in rtl8169_start_xmit()
4404 txd_first = tp->TxDescArray + entry; in rtl8169_start_xmit()
4406 frags = skb_shinfo(skb)->nr_frags; in rtl8169_start_xmit()
4413 txd_last = tp->TxDescArray + entry; in rtl8169_start_xmit()
4414 txd_last->opts1 |= cpu_to_le32(LastFrag); in rtl8169_start_xmit()
4415 tp->tx_skb[entry].skb = skb; in rtl8169_start_xmit()
4422 door_bell = __netdev_sent_queue(dev, skb->len, netdev_xmit_more()); in rtl8169_start_xmit()
4424 txd_first->opts1 |= cpu_to_le32(DescOwn | FirstFrag); in rtl8169_start_xmit()
4426 /* rtl_tx needs to see descriptor changes before updated tp->cur_tx */ in rtl8169_start_xmit()
4429 WRITE_ONCE(tp->cur_tx, tp->cur_tx + frags + 1); in rtl8169_start_xmit()
4443 dev->stats.tx_dropped++; in rtl8169_start_xmit()
4450 unsigned int nr_frags = info->nr_frags; in rtl_last_frag_len()
4455 return skb_frag_size(info->frags + nr_frags - 1); in rtl_last_frag_len()
4468 else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4 && in rtl8168evl_fix_tso()
4485 if (tp->mac_version == RTL_GIGA_MAC_VER_34) in rtl8169_features_check()
4491 } else if (skb->ip_summed == CHECKSUM_PARTIAL) { in rtl8169_features_check()
4493 if (skb->len < ETH_ZLEN) in rtl8169_features_check()
4510 struct pci_dev *pdev = tp->pci_dev; in rtl8169_pcierr_interrupt()
4531 dirty_tx = tp->dirty_tx; in rtl_tx()
4533 while (READ_ONCE(tp->cur_tx) != dirty_tx) { in rtl_tx()
4537 status = le32_to_cpu(READ_ONCE(tp->TxDescArray[entry].opts1)); in rtl_tx()
4541 skb = tp->tx_skb[entry].skb; in rtl_tx()
4546 bytes_compl += skb->len; in rtl_tx()
4552 if (tp->dirty_tx != dirty_tx) { in rtl_tx()
4554 WRITE_ONCE(tp->dirty_tx, dirty_tx); in rtl_tx()
4563 * it is slow enough). -- FR in rtl_tx()
4567 if (READ_ONCE(tp->cur_tx) != dirty_tx && skb) in rtl_tx()
4582 skb->ip_summed = CHECKSUM_UNNECESSARY; in rtl8169_rx_csum()
4592 for (count = 0; count < budget; count++, tp->cur_rx++) { in rtl_rx()
4593 unsigned int pkt_size, entry = tp->cur_rx % NUM_RX_DESC; in rtl_rx()
4594 struct RxDesc *desc = tp->RxDescArray + entry; in rtl_rx()
4600 status = le32_to_cpu(READ_ONCE(desc->opts1)); in rtl_rx()
4614 dev->stats.rx_errors++; in rtl_rx()
4616 dev->stats.rx_length_errors++; in rtl_rx()
4618 dev->stats.rx_crc_errors++; in rtl_rx()
4620 if (!(dev->features & NETIF_F_RXALL)) in rtl_rx()
4627 if (likely(!(dev->features & NETIF_F_RXFCS))) in rtl_rx()
4628 pkt_size -= ETH_FCS_LEN; in rtl_rx()
4631 * They are seen as a symptom of over-mtu sized frames. in rtl_rx()
4634 dev->stats.rx_dropped++; in rtl_rx()
4635 dev->stats.rx_length_errors++; in rtl_rx()
4639 skb = napi_alloc_skb(&tp->napi, pkt_size); in rtl_rx()
4641 dev->stats.rx_dropped++; in rtl_rx()
4645 addr = le64_to_cpu(desc->addr); in rtl_rx()
4646 rx_buf = page_address(tp->Rx_databuff[entry]); in rtl_rx()
4651 skb->tail += pkt_size; in rtl_rx()
4652 skb->len = pkt_size; in rtl_rx()
4656 skb->protocol = eth_type_trans(skb, dev); in rtl_rx()
4660 if (skb->pkt_type == PACKET_MULTICAST) in rtl_rx()
4661 dev->stats.multicast++; in rtl_rx()
4663 napi_gro_receive(&tp->napi, skb); in rtl_rx()
4678 if ((status & 0xffff) == 0xffff || !(status & tp->irq_mask)) in rtl8169_interrupt()
4683 tp->mac_version <= RTL_GIGA_MAC_VER_06)) { in rtl8169_interrupt()
4684 rtl8169_pcierr_interrupt(tp->dev); in rtl8169_interrupt()
4689 phy_mac_interrupt(tp->phydev); in rtl8169_interrupt()
4692 napi_schedule(&tp->napi); in rtl8169_interrupt()
4705 if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) { in rtl_task()
4708 ret = pci_reset_bus(tp->pci_dev); in rtl_task()
4710 netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n"); in rtl_task()
4711 netif_device_detach(tp->dev); in rtl_task()
4717 ret = pci_disable_link_state(tp->pci_dev, PCIE_LINK_STATE_L1 | in rtl_task()
4720 netdev_warn_once(tp->dev, "ASPM disabled on Tx timeout\n"); in rtl_task()
4724 if (test_and_clear_bit(RTL_FLAG_TASK_RESET_PENDING, tp->wk.flags)) { in rtl_task()
4727 netif_wake_queue(tp->dev); in rtl_task()
4734 struct net_device *dev = tp->dev; in rtl8169_poll()
4759 phy_print_status(tp->phydev); in r8169_phylink_handler()
4764 struct phy_device *phydev = tp->phydev; in r8169_phy_connect()
4768 phy_mode = tp->supports_gmii ? PHY_INTERFACE_MODE_GMII : in r8169_phy_connect()
4771 ret = phy_connect_direct(tp->dev, phydev, r8169_phylink_handler, in r8169_phy_connect()
4776 if (!tp->supports_gmii) in r8169_phy_connect()
4786 disable_work_sync(&tp->wk.work); in rtl8169_down()
4788 bitmap_zero(tp->wk.flags, RTL_FLAG_MAX); in rtl8169_down()
4790 phy_stop(tp->phydev); in rtl8169_down()
4794 pci_clear_master(tp->pci_dev); in rtl8169_down()
4801 if (tp->dash_type != RTL_DASH_NONE) in rtl8169_down()
4807 if (tp->dash_type != RTL_DASH_NONE) in rtl8169_up()
4810 pci_set_master(tp->pci_dev); in rtl8169_up()
4811 phy_init_hw(tp->phydev); in rtl8169_up()
4812 phy_resume(tp->phydev); in rtl8169_up()
4814 napi_enable(&tp->napi); in rtl8169_up()
4815 enable_work(&tp->wk.work); in rtl8169_up()
4818 phy_start(tp->phydev); in rtl8169_up()
4824 struct pci_dev *pdev = tp->pci_dev; in rtl8169_close()
4826 pm_runtime_get_sync(&pdev->dev); in rtl8169_close()
4832 free_irq(tp->irq, tp); in rtl8169_close()
4834 phy_disconnect(tp->phydev); in rtl8169_close()
4836 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl8169_close()
4837 tp->RxPhyAddr); in rtl8169_close()
4838 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl8169_close()
4839 tp->TxPhyAddr); in rtl8169_close()
4840 tp->TxDescArray = NULL; in rtl8169_close()
4841 tp->RxDescArray = NULL; in rtl8169_close()
4843 pm_runtime_put_sync(&pdev->dev); in rtl8169_close()
4853 rtl8169_interrupt(tp->irq, tp); in rtl8169_netpoll()
4860 struct pci_dev *pdev = tp->pci_dev; in rtl_open()
4862 int retval = -ENOMEM; in rtl_open()
4864 pm_runtime_get_sync(&pdev->dev); in rtl_open()
4870 tp->TxDescArray = dma_alloc_coherent(&pdev->dev, R8169_TX_RING_BYTES, in rtl_open()
4871 &tp->TxPhyAddr, GFP_KERNEL); in rtl_open()
4872 if (!tp->TxDescArray) in rtl_open()
4875 tp->RxDescArray = dma_alloc_coherent(&pdev->dev, R8169_RX_RING_BYTES, in rtl_open()
4876 &tp->RxPhyAddr, GFP_KERNEL); in rtl_open()
4877 if (!tp->RxDescArray) in rtl_open()
4887 retval = request_irq(tp->irq, rtl8169_interrupt, irqflags, dev->name, tp); in rtl_open()
4899 pm_runtime_put_sync(&pdev->dev); in rtl_open()
4904 free_irq(tp->irq, tp); in rtl_open()
4909 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, in rtl_open()
4910 tp->RxPhyAddr); in rtl_open()
4911 tp->RxDescArray = NULL; in rtl_open()
4913 dma_free_coherent(&pdev->dev, R8169_TX_RING_BYTES, tp->TxDescArray, in rtl_open()
4914 tp->TxPhyAddr); in rtl_open()
4915 tp->TxDescArray = NULL; in rtl_open()
4923 struct pci_dev *pdev = tp->pci_dev; in rtl8169_get_stats64()
4924 struct rtl8169_counters *counters = tp->counters; in rtl8169_get_stats64()
4926 pm_runtime_get_noresume(&pdev->dev); in rtl8169_get_stats64()
4928 netdev_stats_to_stats64(stats, &dev->stats); in rtl8169_get_stats64()
4929 dev_fetch_sw_netstats(stats, dev->tstats); in rtl8169_get_stats64()
4935 if (pm_runtime_active(&pdev->dev)) in rtl8169_get_stats64()
4942 stats->tx_errors = le64_to_cpu(counters->tx_errors) - in rtl8169_get_stats64()
4943 le64_to_cpu(tp->tc_offset.tx_errors); in rtl8169_get_stats64()
4944 stats->collisions = le32_to_cpu(counters->tx_multi_collision) - in rtl8169_get_stats64()
4945 le32_to_cpu(tp->tc_offset.tx_multi_collision); in rtl8169_get_stats64()
4946 stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) - in rtl8169_get_stats64()
4947 le16_to_cpu(tp->tc_offset.tx_aborted); in rtl8169_get_stats64()
4948 stats->rx_missed_errors = le16_to_cpu(counters->rx_missed) - in rtl8169_get_stats64()
4949 le16_to_cpu(tp->tc_offset.rx_missed); in rtl8169_get_stats64()
4951 pm_runtime_put_noidle(&pdev->dev); in rtl8169_get_stats64()
4956 netif_device_detach(tp->dev); in rtl8169_net_suspend()
4958 if (netif_running(tp->dev)) in rtl8169_net_suspend()
4966 rtl_rar_set(tp, tp->dev->dev_addr); in rtl8169_runtime_resume()
4967 __rtl8169_set_wol(tp, tp->saved_wolopts); in rtl8169_runtime_resume()
4969 if (tp->TxDescArray) in rtl8169_runtime_resume()
4972 netif_device_attach(tp->dev); in rtl8169_runtime_resume()
4984 clk_disable_unprepare(tp->clk); in rtl8169_suspend()
4995 clk_prepare_enable(tp->clk); in rtl8169_resume()
4998 if (tp->mac_version == RTL_GIGA_MAC_VER_37) in rtl8169_resume()
5008 if (!tp->TxDescArray) { in rtl8169_runtime_suspend()
5009 netif_device_detach(tp->dev); in rtl8169_runtime_suspend()
5025 if (tp->dash_enabled) in rtl8169_runtime_idle()
5026 return -EBUSY; in rtl8169_runtime_idle()
5028 if (!netif_running(tp->dev) || !netif_carrier_ok(tp->dev)) in rtl8169_runtime_idle()
5031 return -EBUSY; in rtl8169_runtime_idle()
5049 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_shutdown()
5051 if (system_state == SYSTEM_POWER_OFF && !tp->dash_enabled) in rtl_shutdown()
5060 pm_runtime_get_noresume(&pdev->dev); in rtl_remove_one()
5062 disable_work_sync(&tp->wk.work); in rtl_remove_one()
5065 r8169_remove_leds(tp->leds); in rtl_remove_one()
5067 unregister_netdev(tp->dev); in rtl_remove_one()
5069 if (tp->dash_type != RTL_DASH_NONE) in rtl_remove_one()
5075 rtl_rar_set(tp, tp->dev->perm_addr); in rtl_remove_one()
5100 tp->irq_mask = RxOK | RxErr | TxOK | TxErr | LinkChg; in rtl_set_irq_mask()
5102 if (tp->mac_version <= RTL_GIGA_MAC_VER_06) in rtl_set_irq_mask()
5103 tp->irq_mask |= SYSErr | RxFIFOOver; in rtl_set_irq_mask()
5110 switch (tp->mac_version) { in rtl_alloc_irq()
5124 return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags); in rtl_alloc_irq()
5131 if (rtl_is_8168evl_up(tp) && tp->mac_version != RTL_GIGA_MAC_VER_34) { in rtl_read_mac_address()
5155 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_read_reg()
5158 return -ENODEV; in r8169_mdio_read_reg()
5166 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_write_reg()
5169 return -ENODEV; in r8169_mdio_write_reg()
5179 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_read_reg_c45()
5182 return -ENODEV; in r8169_mdio_read_reg_c45()
5193 struct rtl8169_private *tp = mii_bus->priv; in r8169_mdio_write_reg_c45()
5196 return -ENODEV; in r8169_mdio_write_reg_c45()
5205 struct pci_dev *pdev = tp->pci_dev; in r8169_mdio_register()
5214 if (tp->mac_version == RTL_GIGA_MAC_VER_25 || in r8169_mdio_register()
5215 tp->mac_version == RTL_GIGA_MAC_VER_26) in r8169_mdio_register()
5218 new_bus = devm_mdiobus_alloc(&pdev->dev); in r8169_mdio_register()
5220 return -ENOMEM; in r8169_mdio_register()
5222 new_bus->name = "r8169"; in r8169_mdio_register()
5223 new_bus->priv = tp; in r8169_mdio_register()
5224 new_bus->parent = &pdev->dev; in r8169_mdio_register()
5225 new_bus->irq[0] = PHY_MAC_INTERRUPT; in r8169_mdio_register()
5226 new_bus->phy_mask = GENMASK(31, 1); in r8169_mdio_register()
5227 snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x", in r8169_mdio_register()
5228 pci_domain_nr(pdev->bus), pci_dev_id(pdev)); in r8169_mdio_register()
5230 new_bus->read = r8169_mdio_read_reg; in r8169_mdio_register()
5231 new_bus->write = r8169_mdio_write_reg; in r8169_mdio_register()
5233 if (tp->mac_version >= RTL_GIGA_MAC_VER_40) { in r8169_mdio_register()
5234 new_bus->read_c45 = r8169_mdio_read_reg_c45; in r8169_mdio_register()
5235 new_bus->write_c45 = r8169_mdio_write_reg_c45; in r8169_mdio_register()
5238 ret = devm_mdiobus_register(&pdev->dev, new_bus); in r8169_mdio_register()
5242 tp->phydev = mdiobus_get_phy(new_bus, 0); in r8169_mdio_register()
5243 if (!tp->phydev) { in r8169_mdio_register()
5244 return -ENODEV; in r8169_mdio_register()
5245 } else if (!tp->phydev->drv) { in r8169_mdio_register()
5249 …dev_err(&pdev->dev, "no dedicated PHY driver found for PHY ID 0x%08x, maybe realtek.ko needs to be… in r8169_mdio_register()
5250 tp->phydev->phy_id); in r8169_mdio_register()
5251 return -EUNATCH; in r8169_mdio_register()
5254 tp->phydev->mac_managed_pm = true; in r8169_mdio_register()
5256 phy_support_eee(tp->phydev); in r8169_mdio_register()
5257 phy_support_asym_pause(tp->phydev); in r8169_mdio_register()
5260 if (tp->mac_version == RTL_GIGA_MAC_VER_61) in r8169_mdio_register()
5261 phy_disable_eee_mode(tp->phydev, in r8169_mdio_register()
5265 phy_suspend(tp->phydev); in r8169_mdio_register()
5304 switch (tp->mac_version) { in rtl_hw_initialize()
5321 /* Non-GBit versions don't support jumbo frames */ in rtl_jumbo_max()
5322 if (!tp->supports_gmii) in rtl_jumbo_max()
5325 switch (tp->mac_version) { in rtl_jumbo_max()
5346 struct net_device *dev = tp->dev; in rtl_init_mac_address()
5362 dev->addr_assign_type = NET_ADDR_RANDOM; in rtl_init_mac_address()
5372 if (tp->mac_version >= RTL_GIGA_MAC_VER_46 && in rtl_aspm_is_safe()
5388 dev = devm_alloc_etherdev(&pdev->dev, sizeof (*tp)); in rtl_init_one()
5390 return -ENOMEM; in rtl_init_one()
5392 SET_NETDEV_DEV(dev, &pdev->dev); in rtl_init_one()
5393 dev->netdev_ops = &rtl_netdev_ops; in rtl_init_one()
5395 tp->dev = dev; in rtl_init_one()
5396 tp->pci_dev = pdev; in rtl_init_one()
5397 tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1; in rtl_init_one()
5398 tp->ocp_base = OCP_STD_PHY_BASE; in rtl_init_one()
5400 raw_spin_lock_init(&tp->mac_ocp_lock); in rtl_init_one()
5401 mutex_init(&tp->led_lock); in rtl_init_one()
5404 tp->clk = devm_clk_get_optional_enabled(&pdev->dev, "ether_clk"); in rtl_init_one()
5405 if (IS_ERR(tp->clk)) in rtl_init_one()
5406 return dev_err_probe(&pdev->dev, PTR_ERR(tp->clk), "failed to get ether_clk\n"); in rtl_init_one()
5411 return dev_err_probe(&pdev->dev, rc, "enable failure\n"); in rtl_init_one()
5414 dev_info(&pdev->dev, "Mem-Wr-Inval unavailable\n"); in rtl_init_one()
5417 region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1; in rtl_init_one()
5419 return dev_err_probe(&pdev->dev, -ENODEV, "no MMIO resource found\n"); in rtl_init_one()
5421 tp->mmio_addr = pcim_iomap_region(pdev, region, KBUILD_MODNAME); in rtl_init_one()
5422 if (IS_ERR(tp->mmio_addr)) in rtl_init_one()
5423 return dev_err_probe(&pdev->dev, PTR_ERR(tp->mmio_addr), in rtl_init_one()
5428 return dev_err_probe(&pdev->dev, -EIO, "PCI read failed\n"); in rtl_init_one()
5433 chip = rtl8169_get_chip_version(xid, tp->supports_gmii); in rtl_init_one()
5434 if (chip->mac_version == RTL_GIGA_MAC_NONE) in rtl_init_one()
5435 return dev_err_probe(&pdev->dev, -ENODEV, in rtl_init_one()
5438 tp->mac_version = chip->mac_version; in rtl_init_one()
5439 tp->fw_name = chip->fw_name; in rtl_init_one()
5442 * problems as well as full system hangs for some PCIe devices users. in rtl_init_one()
5448 tp->aspm_manageable = !rc; in rtl_init_one()
5450 tp->dash_type = rtl_get_dash_type(tp); in rtl_init_one()
5451 tp->dash_enabled = rtl_dash_is_enabled(tp); in rtl_init_one()
5453 tp->cp_cmd = RTL_R16(tp, CPlusCmd) & CPCMD_MASK; in rtl_init_one()
5455 if (sizeof(dma_addr_t) > 4 && tp->mac_version >= RTL_GIGA_MAC_VER_18 && in rtl_init_one()
5456 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) in rtl_init_one()
5457 dev->features |= NETIF_F_HIGHDMA; in rtl_init_one()
5469 return dev_err_probe(&pdev->dev, rc, "Can't allocate interrupt\n"); in rtl_init_one()
5471 tp->irq = pci_irq_vector(pdev, 0); in rtl_init_one()
5473 INIT_WORK(&tp->wk.work, rtl_task); in rtl_init_one()
5474 disable_work(&tp->wk.work); in rtl_init_one()
5478 dev->ethtool_ops = &rtl8169_ethtool_ops; in rtl_init_one()
5480 netif_napi_add(dev, &tp->napi, rtl8169_poll); in rtl_init_one()
5482 dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM | in rtl_init_one()
5484 dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; in rtl_init_one()
5485 dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; in rtl_init_one()
5491 if (tp->mac_version == RTL_GIGA_MAC_VER_05) in rtl_init_one()
5493 dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX; in rtl_init_one()
5496 dev->hw_features |= NETIF_F_IPV6_CSUM; in rtl_init_one()
5498 dev->features |= dev->hw_features; in rtl_init_one()
5501 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6; in rtl_init_one()
5505 dev->hw_features |= NETIF_F_SG | NETIF_F_TSO; in rtl_init_one()
5517 if (tp->mac_version >= RTL_GIGA_MAC_VER_46 && in rtl_init_one()
5518 tp->mac_version != RTL_GIGA_MAC_VER_61) in rtl_init_one()
5519 dev->features |= dev->hw_features; in rtl_init_one()
5521 dev->hw_features |= NETIF_F_RXALL; in rtl_init_one()
5522 dev->hw_features |= NETIF_F_RXFCS; in rtl_init_one()
5524 dev->pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS; in rtl_init_one()
5529 rtl8169_set_features(dev, dev->features); in rtl_init_one()
5531 if (!tp->dash_enabled) { in rtl_init_one()
5535 dev->ethtool->wol_enabled = 1; in rtl_init_one()
5540 dev->max_mtu = jumbo_max; in rtl_init_one()
5544 tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters), in rtl_init_one()
5545 &tp->counters_phys_addr, in rtl_init_one()
5547 if (!tp->counters) in rtl_init_one()
5548 return -ENOMEM; in rtl_init_one()
5562 tp->leds = rtl8125_init_leds(dev); in rtl_init_one()
5563 else if (tp->mac_version > RTL_GIGA_MAC_VER_06) in rtl_init_one()
5564 tp->leds = rtl8168_init_leds(dev); in rtl_init_one()
5568 chip->name, dev->dev_addr, xid, tp->irq); in rtl_init_one()
5572 jumbo_max, tp->mac_version <= RTL_GIGA_MAC_VER_06 ? in rtl_init_one()
5575 if (tp->dash_type != RTL_DASH_NONE) { in rtl_init_one()
5577 tp->dash_enabled ? "enabled" : "disabled"); in rtl_init_one()
5582 pm_runtime_put_sync(&pdev->dev); in rtl_init_one()