Lines Matching full:receive
48 #define RX_DESC0_ODD_NB 0x400000 /* receive odd nibbles */
49 #define RX_DESC0_LRS 0x10000000 /* last receive segment */
50 #define RX_DESC0_FRS 0x20000000 /* first receive segment */
122 #define NORXBUF BIT(1) /* receive buffer unavailable */
127 #define RPKT_SAV BIT(6) /* FIFO receive success */
128 #define RPKT_LOST_INT_STS BIT(7) /* FIFO full, receive failed */
172 #define RX_BROADPKT BIT(17) /* receive broadcast packets */
173 #define RX_MULTIPKT BIT(16) /* receive all multicast packets */
181 #define ENRX_IN_HALFTX BIT(6) /* enable receive in half duplex mode */
186 #define RDMA_EN BIT(1) /* enable receive DMA chan */
194 #define RUNT_MAC_STS BIT(7) /* receive runt detected */
195 #define FTL_MAC_STS BIT(6) /* receive frame too long detected */
197 #define RPKT_LOST BIT(4) /* RX FIFO full, receive failed */
198 #define RPKT_SAVE BIT(3) /* RX FIFO receive success */
217 #define RX_PAUSE BIT(4) /* receive pause frame */
218 #define TX_PAUSED BIT(3) /* transmit pause due to receive */