71 static void encx24j600_dump_rsv(struct encx24j600_priv *priv, const char *msg,  in encx24j600_dump_rsv()  argument
74 	struct net_device *dev = priv->ndev;  in encx24j600_dump_rsv()
98 static u16 encx24j600_read_reg(struct encx24j600_priv *priv, u8 reg)  in encx24j600_read_reg()  argument
100 	struct net_device *dev = priv->ndev;  in encx24j600_read_reg()
102 	int ret = regmap_read(priv->ctx.regmap, reg, &val);  in encx24j600_read_reg()
105 		netif_err(priv, drv, dev, "%s: error %d reading reg %02x\n",  in encx24j600_read_reg()
110 static void encx24j600_write_reg(struct encx24j600_priv *priv, u8 reg, u16 val)  in encx24j600_write_reg()  argument
112 	struct net_device *dev = priv->ndev;  in encx24j600_write_reg()
113 	int ret = regmap_write(priv->ctx.regmap, reg, val);  in encx24j600_write_reg()
116 		netif_err(priv, drv, dev, "%s: error %d writing reg %02x=%04x\n",  in encx24j600_write_reg()
120 static void encx24j600_update_reg(struct encx24j600_priv *priv, u8 reg,  in encx24j600_update_reg()  argument
123 	struct net_device *dev = priv->ndev;  in encx24j600_update_reg()
124 	int ret = regmap_update_bits(priv->ctx.regmap, reg, mask, val);  in encx24j600_update_reg()
127 		netif_err(priv, drv, dev, "%s: error %d updating reg %02x=%04x~%04x\n",  in encx24j600_update_reg()
131 static u16 encx24j600_read_phy(struct encx24j600_priv *priv, u8 reg)  in encx24j600_read_phy()  argument
133 	struct net_device *dev = priv->ndev;  in encx24j600_read_phy()
135 	int ret = regmap_read(priv->ctx.phymap, reg, &val);  in encx24j600_read_phy()
138 		netif_err(priv, drv, dev, "%s: error %d reading %02x\n",  in encx24j600_read_phy()
143 static void encx24j600_write_phy(struct encx24j600_priv *priv, u8 reg, u16 val)  in encx24j600_write_phy()  argument
145 	struct net_device *dev = priv->ndev;  in encx24j600_write_phy()
146 	int ret = regmap_write(priv->ctx.phymap, reg, val);  in encx24j600_write_phy()
149 		netif_err(priv, drv, dev, "%s: error %d writing reg %02x=%04x\n",  in encx24j600_write_phy()
153 static void encx24j600_clr_bits(struct encx24j600_priv *priv, u8 reg, u16 mask)  in encx24j600_clr_bits()  argument
155 	encx24j600_update_reg(priv, reg, mask, 0);  in encx24j600_clr_bits()
158 static void encx24j600_set_bits(struct encx24j600_priv *priv, u8 reg, u16 mask)  in encx24j600_set_bits()  argument
160 	encx24j600_update_reg(priv, reg, mask, mask);  in encx24j600_set_bits()
163 static void encx24j600_cmd(struct encx24j600_priv *priv, u8 cmd)  in encx24j600_cmd()  argument
165 	struct net_device *dev = priv->ndev;  in encx24j600_cmd()
166 	int ret = regmap_write(priv->ctx.regmap, cmd, 0);  in encx24j600_cmd()
169 		netif_err(priv, drv, dev, "%s: error %d with cmd %02x\n",  in encx24j600_cmd()
173 static int encx24j600_raw_read(struct encx24j600_priv *priv, u8 reg, u8 *data,  in encx24j600_raw_read()  argument
178 	mutex_lock(&priv->ctx.mutex);  in encx24j600_raw_read()
179 	ret = regmap_encx24j600_spi_read(&priv->ctx, reg, data, count);  in encx24j600_raw_read()
180 	mutex_unlock(&priv->ctx.mutex);  in encx24j600_raw_read()
185 static int encx24j600_raw_write(struct encx24j600_priv *priv, u8 reg,  in encx24j600_raw_write()  argument
190 	mutex_lock(&priv->ctx.mutex);  in encx24j600_raw_write()
191 	ret = regmap_encx24j600_spi_write(&priv->ctx, reg, data, count);  in encx24j600_raw_write()
192 	mutex_unlock(&priv->ctx.mutex);  in encx24j600_raw_write()
197 static void encx24j600_update_phcon1(struct encx24j600_priv *priv)  in encx24j600_update_phcon1()  argument
199 	u16 phcon1 = encx24j600_read_phy(priv, PHCON1);  in encx24j600_update_phcon1()
201 	if (priv->autoneg == AUTONEG_ENABLE) {  in encx24j600_update_phcon1()
205 		if (priv->speed == SPEED_100)  in encx24j600_update_phcon1()
210 		if (priv->full_duplex)  in encx24j600_update_phcon1()
215 	encx24j600_write_phy(priv, PHCON1, phcon1);  in encx24j600_update_phcon1()
219 static int encx24j600_wait_for_autoneg(struct encx24j600_priv *priv)  in encx24j600_wait_for_autoneg()  argument
221 	struct net_device *dev = priv->ndev;  in encx24j600_wait_for_autoneg()
226 	phstat1 = encx24j600_read_phy(priv, PHSTAT1);  in encx24j600_wait_for_autoneg()
231 			netif_notice(priv, drv, dev, "timeout waiting for autoneg done\n");  in encx24j600_wait_for_autoneg()
233 			priv->autoneg = AUTONEG_DISABLE;  in encx24j600_wait_for_autoneg()
234 			phstat3 = encx24j600_read_phy(priv, PHSTAT3);  in encx24j600_wait_for_autoneg()
235 			priv->speed = (phstat3 & PHY3SPD100)  in encx24j600_wait_for_autoneg()
237 			priv->full_duplex = (phstat3 & PHY3DPX) ? 1 : 0;  in encx24j600_wait_for_autoneg()
238 			encx24j600_update_phcon1(priv);  in encx24j600_wait_for_autoneg()
239 			netif_notice(priv, drv, dev, "Using parallel detection: %s/%s",  in encx24j600_wait_for_autoneg()
240 				     priv->speed == SPEED_100 ? "100" : "10",  in encx24j600_wait_for_autoneg()
241 				     priv->full_duplex ? "Full" : "Half");  in encx24j600_wait_for_autoneg()
246 		phstat1 = encx24j600_read_phy(priv, PHSTAT1);  in encx24j600_wait_for_autoneg()
249 	estat = encx24j600_read_reg(priv, ESTAT);  in encx24j600_wait_for_autoneg()
251 		encx24j600_set_bits(priv, MACON2, FULDPX);  in encx24j600_wait_for_autoneg()
252 		encx24j600_write_reg(priv, MABBIPG, 0x15);  in encx24j600_wait_for_autoneg()
254 		encx24j600_clr_bits(priv, MACON2, FULDPX);  in encx24j600_wait_for_autoneg()
255 		encx24j600_write_reg(priv, MABBIPG, 0x12);  in encx24j600_wait_for_autoneg()
257 		encx24j600_write_reg(priv, MACLCON, 0x370f);  in encx24j600_wait_for_autoneg()
264 static void encx24j600_check_link_status(struct encx24j600_priv *priv)  in encx24j600_check_link_status()  argument
266 	struct net_device *dev = priv->ndev;  in encx24j600_check_link_status()
269 	estat = encx24j600_read_reg(priv, ESTAT);  in encx24j600_check_link_status()
272 		if (priv->autoneg == AUTONEG_ENABLE)  in encx24j600_check_link_status()
273 			encx24j600_wait_for_autoneg(priv);  in encx24j600_check_link_status()
276 		netif_info(priv, ifup, dev, "link up\n");  in encx24j600_check_link_status()
278 		netif_info(priv, ifdown, dev, "link down\n");  in encx24j600_check_link_status()
283 		priv->autoneg  = AUTONEG_ENABLE;  in encx24j600_check_link_status()
284 		priv->full_duplex = true;  in encx24j600_check_link_status()
285 		priv->speed = SPEED_100;  in encx24j600_check_link_status()
290 static void encx24j600_int_link_handler(struct encx24j600_priv *priv)  in encx24j600_int_link_handler()  argument
292 	struct net_device *dev = priv->ndev;  in encx24j600_int_link_handler()
294 	netif_dbg(priv, intr, dev, "%s", __func__);  in encx24j600_int_link_handler()
295 	encx24j600_check_link_status(priv);  in encx24j600_int_link_handler()
296 	encx24j600_clr_bits(priv, EIR, LINKIF);  in encx24j600_int_link_handler()
299 static void encx24j600_tx_complete(struct encx24j600_priv *priv, bool err)  in encx24j600_tx_complete()  argument
301 	struct net_device *dev = priv->ndev;  in encx24j600_tx_complete()
303 	if (!priv->tx_skb) {  in encx24j600_tx_complete()
308 	mutex_lock(&priv->lock);  in encx24j600_tx_complete()
315 	dev->stats.tx_bytes += priv->tx_skb->len;  in encx24j600_tx_complete()
317 	encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF);  in encx24j600_tx_complete()
319 	netif_dbg(priv, tx_done, dev, "TX Done%s\n", err ? ": Err" : "");  in encx24j600_tx_complete()
321 	dev_kfree_skb(priv->tx_skb);  in encx24j600_tx_complete()
322 	priv->tx_skb = NULL;  in encx24j600_tx_complete()
326 	mutex_unlock(&priv->lock);  in encx24j600_tx_complete()
329 static int encx24j600_receive_packet(struct encx24j600_priv *priv,  in encx24j600_receive_packet()  argument
332 	struct net_device *dev = priv->ndev;  in encx24j600_receive_packet()
341 	encx24j600_raw_read(priv, RRXDATA, skb_put(skb, rsv->len), rsv->len);  in encx24j600_receive_packet()
343 	if (netif_msg_pktdata(priv))  in encx24j600_receive_packet()
359 static void encx24j600_rx_packets(struct encx24j600_priv *priv, u8 packet_count)  in encx24j600_rx_packets()  argument
361 	struct net_device *dev = priv->ndev;  in encx24j600_rx_packets()
367 		encx24j600_write_reg(priv, ERXRDPT, priv->next_packet);  in encx24j600_rx_packets()
368 		encx24j600_raw_read(priv, RRXDATA, (u8 *)&rsv, sizeof(rsv));  in encx24j600_rx_packets()
370 		if (netif_msg_rx_status(priv))  in encx24j600_rx_packets()
371 			encx24j600_dump_rsv(priv, __func__, &rsv);  in encx24j600_rx_packets()
375 			netif_err(priv, rx_err, dev, "RX Error %04x\n",  in encx24j600_rx_packets()
386 			encx24j600_receive_packet(priv, &rsv);  in encx24j600_rx_packets()
389 		priv->next_packet = rsv.next_packet;  in encx24j600_rx_packets()
391 		newrxtail = priv->next_packet - 2;  in encx24j600_rx_packets()
395 		encx24j600_cmd(priv, SETPKTDEC);  in encx24j600_rx_packets()
396 		encx24j600_write_reg(priv, ERXTAIL, newrxtail);  in encx24j600_rx_packets()
402 	struct encx24j600_priv *priv = dev_id;  in encx24j600_isr()  local
403 	struct net_device *dev = priv->ndev;  in encx24j600_isr()
407 	encx24j600_cmd(priv, CLREIE);  in encx24j600_isr()
409 	eir = encx24j600_read_reg(priv, EIR);  in encx24j600_isr()
412 		encx24j600_int_link_handler(priv);  in encx24j600_isr()
415 		encx24j600_tx_complete(priv, false);  in encx24j600_isr()
418 		encx24j600_tx_complete(priv, true);  in encx24j600_isr()
423 			netif_err(priv, rx_err, dev, "Packet counter full\n");  in encx24j600_isr()
426 		encx24j600_clr_bits(priv, EIR, RXABTIF);  in encx24j600_isr()
432 		mutex_lock(&priv->lock);  in encx24j600_isr()
434 		packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff;  in encx24j600_isr()
436 			encx24j600_rx_packets(priv, packet_count);  in encx24j600_isr()
437 			packet_count = encx24j600_read_reg(priv, ESTAT) & 0xff;  in encx24j600_isr()
440 		mutex_unlock(&priv->lock);  in encx24j600_isr()
444 	encx24j600_cmd(priv, SETEIE);  in encx24j600_isr()
449 static int encx24j600_soft_reset(struct encx24j600_priv *priv)  in encx24j600_soft_reset()  argument
456 	regcache_cache_bypass(priv->ctx.regmap, true);  in encx24j600_soft_reset()
459 		encx24j600_write_reg(priv, EUDAST, EUDAST_TEST_VAL);  in encx24j600_soft_reset()
460 		eudast = encx24j600_read_reg(priv, EUDAST);  in encx24j600_soft_reset()
463 	regcache_cache_bypass(priv->ctx.regmap, false);  in encx24j600_soft_reset()
472 	while (!(encx24j600_read_reg(priv, ESTAT) & CLKRDY) && --timeout)  in encx24j600_soft_reset()
481 	encx24j600_cmd(priv, SETETHRST);  in encx24j600_soft_reset()
485 	if (encx24j600_read_reg(priv, EUDAST) != 0) {  in encx24j600_soft_reset()
497 static int encx24j600_hw_reset(struct encx24j600_priv *priv)  in encx24j600_hw_reset()  argument
501 	mutex_lock(&priv->lock);  in encx24j600_hw_reset()
502 	ret = encx24j600_soft_reset(priv);  in encx24j600_hw_reset()
503 	mutex_unlock(&priv->lock);  in encx24j600_hw_reset()
508 static void encx24j600_reset_hw_tx(struct encx24j600_priv *priv)  in encx24j600_reset_hw_tx()  argument
510 	encx24j600_set_bits(priv, ECON2, TXRST);  in encx24j600_reset_hw_tx()
511 	encx24j600_clr_bits(priv, ECON2, TXRST);  in encx24j600_reset_hw_tx()
514 static void encx24j600_hw_init_tx(struct encx24j600_priv *priv)  in encx24j600_hw_init_tx()  argument
517 	encx24j600_reset_hw_tx(priv);  in encx24j600_hw_init_tx()
520 	encx24j600_clr_bits(priv, EIR, TXIF | TXABTIF);  in encx24j600_hw_init_tx()
523 	encx24j600_write_reg(priv, EGPWRPT, ENC_TX_BUF_START);  in encx24j600_hw_init_tx()
526 static void encx24j600_hw_init_rx(struct encx24j600_priv *priv)  in encx24j600_hw_init_rx()  argument
528 	encx24j600_cmd(priv, DISABLERX);  in encx24j600_hw_init_rx()
531 	encx24j600_write_reg(priv, ERXST, ENC_RX_BUF_START);  in encx24j600_hw_init_rx()
534 	encx24j600_write_reg(priv, ERXRDPT, ENC_RX_BUF_START);  in encx24j600_hw_init_rx()
536 	priv->next_packet = ENC_RX_BUF_START;  in encx24j600_hw_init_rx()
539 	encx24j600_write_reg(priv, ERXTAIL, ENC_SRAM_SIZE - 2);  in encx24j600_hw_init_rx()
542 	encx24j600_write_reg(priv, EUDAST, ENC_SRAM_SIZE);  in encx24j600_hw_init_rx()
543 	encx24j600_write_reg(priv, EUDAND, ENC_SRAM_SIZE + 1);  in encx24j600_hw_init_rx()
546 	encx24j600_write_reg(priv, MAMXFL, MAX_FRAMELEN);  in encx24j600_hw_init_rx()
549 static void encx24j600_dump_config(struct encx24j600_priv *priv,  in encx24j600_dump_config()  argument
555 	pr_info(DRV_NAME " ECON1:   %04X\n", encx24j600_read_reg(priv, ECON1));  in encx24j600_dump_config()
556 	pr_info(DRV_NAME " ECON2:   %04X\n", encx24j600_read_reg(priv, ECON2));  in encx24j600_dump_config()
557 	pr_info(DRV_NAME " ERXFCON: %04X\n", encx24j600_read_reg(priv,  in encx24j600_dump_config()
559 	pr_info(DRV_NAME " ESTAT:   %04X\n", encx24j600_read_reg(priv, ESTAT));  in encx24j600_dump_config()
560 	pr_info(DRV_NAME " EIR:     %04X\n", encx24j600_read_reg(priv, EIR));  in encx24j600_dump_config()
561 	pr_info(DRV_NAME " EIDLED:  %04X\n", encx24j600_read_reg(priv, EIDLED));  in encx24j600_dump_config()
564 	pr_info(DRV_NAME " MACON1:  %04X\n", encx24j600_read_reg(priv, MACON1));  in encx24j600_dump_config()
565 	pr_info(DRV_NAME " MACON2:  %04X\n", encx24j600_read_reg(priv, MACON2));  in encx24j600_dump_config()
566 	pr_info(DRV_NAME " MAIPG:   %04X\n", encx24j600_read_reg(priv, MAIPG));  in encx24j600_dump_config()
567 	pr_info(DRV_NAME " MACLCON: %04X\n", encx24j600_read_reg(priv,  in encx24j600_dump_config()
569 	pr_info(DRV_NAME " MABBIPG: %04X\n", encx24j600_read_reg(priv,  in encx24j600_dump_config()
573 	pr_info(DRV_NAME " PHCON1:  %04X\n", encx24j600_read_phy(priv, PHCON1));  in encx24j600_dump_config()
574 	pr_info(DRV_NAME " PHCON2:  %04X\n", encx24j600_read_phy(priv, PHCON2));  in encx24j600_dump_config()
575 	pr_info(DRV_NAME " PHANA:   %04X\n", encx24j600_read_phy(priv, PHANA));  in encx24j600_dump_config()
576 	pr_info(DRV_NAME " PHANLPA: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
578 	pr_info(DRV_NAME " PHANE:   %04X\n", encx24j600_read_phy(priv, PHANE));  in encx24j600_dump_config()
579 	pr_info(DRV_NAME " PHSTAT1: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
581 	pr_info(DRV_NAME " PHSTAT2: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
583 	pr_info(DRV_NAME " PHSTAT3: %04X\n", encx24j600_read_phy(priv,  in encx24j600_dump_config()
587 static void encx24j600_set_rxfilter_mode(struct encx24j600_priv *priv)  in encx24j600_set_rxfilter_mode()  argument
589 	switch (priv->rxfilter) {  in encx24j600_set_rxfilter_mode()
591 		encx24j600_set_bits(priv, MACON1, PASSALL);  in encx24j600_set_rxfilter_mode()
592 		encx24j600_write_reg(priv, ERXFCON, UCEN | MCEN | NOTMEEN);  in encx24j600_set_rxfilter_mode()
595 		encx24j600_clr_bits(priv, MACON1, PASSALL);  in encx24j600_set_rxfilter_mode()
596 		encx24j600_write_reg(priv, ERXFCON, UCEN | CRCEN | BCEN | MCEN);  in encx24j600_set_rxfilter_mode()
600 		encx24j600_clr_bits(priv, MACON1, PASSALL);  in encx24j600_set_rxfilter_mode()
601 		encx24j600_write_reg(priv, ERXFCON, UCEN | CRCEN | BCEN);  in encx24j600_set_rxfilter_mode()
606 static void encx24j600_hw_init(struct encx24j600_priv *priv)  in encx24j600_hw_init()  argument
610 	priv->hw_enabled = false;  in encx24j600_hw_init()
616 	encx24j600_update_reg(priv, EIDLED, 0xff00, 0xcb00);  in encx24j600_hw_init()
619 	encx24j600_write_reg(priv, MACON1, 0x9);  in encx24j600_hw_init()
622 	encx24j600_write_reg(priv, MAIPG, 0x0c12);  in encx24j600_hw_init()
625 	encx24j600_write_phy(priv, PHANA, PHANA_DEFAULT);  in encx24j600_hw_init()
627 	encx24j600_update_phcon1(priv);  in encx24j600_hw_init()
628 	encx24j600_check_link_status(priv);  in encx24j600_hw_init()
631 	if ((priv->autoneg == AUTONEG_DISABLE) && priv->full_duplex)  in encx24j600_hw_init()
634 	encx24j600_set_bits(priv, MACON2, macon2);  in encx24j600_hw_init()
636 	priv->rxfilter = RXFILTER_NORMAL;  in encx24j600_hw_init()
637 	encx24j600_set_rxfilter_mode(priv);  in encx24j600_hw_init()
640 	encx24j600_write_reg(priv, MAMXFL, MAX_FRAMELEN);  in encx24j600_hw_init()
643 	encx24j600_hw_init_tx(priv);  in encx24j600_hw_init()
646 	encx24j600_hw_init_rx(priv);  in encx24j600_hw_init()
648 	if (netif_msg_hw(priv))  in encx24j600_hw_init()
649 		encx24j600_dump_config(priv, "Hw is initialized");  in encx24j600_hw_init()
652 static void encx24j600_hw_enable(struct encx24j600_priv *priv)  in encx24j600_hw_enable()  argument
655 	encx24j600_clr_bits(priv, EIR, (PCFULIF | RXABTIF | TXABTIF | TXIF |  in encx24j600_hw_enable()
659 	encx24j600_write_reg(priv, EIE, (PCFULIE | RXABTIE | TXABTIE | TXIE |  in encx24j600_hw_enable()
663 	encx24j600_cmd(priv, ENABLERX);  in encx24j600_hw_enable()
665 	priv->hw_enabled = true;  in encx24j600_hw_enable()
668 static void encx24j600_hw_disable(struct encx24j600_priv *priv)  in encx24j600_hw_disable()  argument
671 	encx24j600_write_reg(priv, EIE, 0);  in encx24j600_hw_disable()
674 	encx24j600_cmd(priv, DISABLERX);  in encx24j600_hw_disable()
676 	priv->hw_enabled = false;  in encx24j600_hw_disable()
682 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_setlink()  local
685 	if (!priv->hw_enabled) {  in encx24j600_setlink()
690 			priv->autoneg = (autoneg == AUTONEG_ENABLE);  in encx24j600_setlink()
691 			priv->full_duplex = (duplex == DUPLEX_FULL);  in encx24j600_setlink()
692 			priv->speed = (speed == SPEED_100);  in encx24j600_setlink()
694 			netif_warn(priv, link, dev, "unsupported link speed setting\n");  in encx24j600_setlink()
700 		netif_warn(priv, link, dev, "Warning: hw must be disabled to set link mode\n");  in encx24j600_setlink()
706 static void encx24j600_hw_get_macaddr(struct encx24j600_priv *priv,  in encx24j600_hw_get_macaddr()  argument
711 	val = encx24j600_read_reg(priv, MAADR1);  in encx24j600_hw_get_macaddr()
716 	val = encx24j600_read_reg(priv, MAADR2);  in encx24j600_hw_get_macaddr()
721 	val = encx24j600_read_reg(priv, MAADR3);  in encx24j600_hw_get_macaddr()
730 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_set_hw_macaddr()  local
732 	if (priv->hw_enabled) {  in encx24j600_set_hw_macaddr()
733 		netif_info(priv, drv, dev, "Hardware must be disabled to set Mac address\n");  in encx24j600_set_hw_macaddr()
737 	mutex_lock(&priv->lock);  in encx24j600_set_hw_macaddr()
739 	netif_info(priv, drv, dev, "%s: Setting MAC address to %pM\n",  in encx24j600_set_hw_macaddr()
742 	encx24j600_write_reg(priv, MAADR3, (dev->dev_addr[4] |  in encx24j600_set_hw_macaddr()
744 	encx24j600_write_reg(priv, MAADR2, (dev->dev_addr[2] |  in encx24j600_set_hw_macaddr()
746 	encx24j600_write_reg(priv, MAADR1, (dev->dev_addr[0] |  in encx24j600_set_hw_macaddr()
749 	mutex_unlock(&priv->lock);  in encx24j600_set_hw_macaddr()
770 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_open()  local
772 	int ret = request_threaded_irq(priv->ctx.spi->irq, NULL, encx24j600_isr,  in encx24j600_open()
774 				       DRV_NAME, priv);  in encx24j600_open()
777 			   priv->ctx.spi->irq, ret);  in encx24j600_open()
781 	encx24j600_hw_disable(priv);  in encx24j600_open()
782 	encx24j600_hw_init(priv);  in encx24j600_open()
783 	encx24j600_hw_enable(priv);  in encx24j600_open()
791 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_stop()  local
794 	free_irq(priv->ctx.spi->irq, priv);  in encx24j600_stop()
800 	struct encx24j600_priv *priv =  in encx24j600_setrx_proc()  local
803 	mutex_lock(&priv->lock);  in encx24j600_setrx_proc()
804 	encx24j600_set_rxfilter_mode(priv);  in encx24j600_setrx_proc()
805 	mutex_unlock(&priv->lock);  in encx24j600_setrx_proc()
810 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_set_multicast_list()  local
811 	int oldfilter = priv->rxfilter;  in encx24j600_set_multicast_list()
814 		netif_dbg(priv, link, dev, "promiscuous mode\n");  in encx24j600_set_multicast_list()
815 		priv->rxfilter = RXFILTER_PROMISC;  in encx24j600_set_multicast_list()
817 		netif_dbg(priv, link, dev, "%smulticast mode\n",  in encx24j600_set_multicast_list()
819 		priv->rxfilter = RXFILTER_MULTI;  in encx24j600_set_multicast_list()
821 		netif_dbg(priv, link, dev, "normal mode\n");  in encx24j600_set_multicast_list()
822 		priv->rxfilter = RXFILTER_NORMAL;  in encx24j600_set_multicast_list()
825 	if (oldfilter != priv->rxfilter)  in encx24j600_set_multicast_list()
826 		kthread_queue_work(&priv->kworker, &priv->setrx_work);  in encx24j600_set_multicast_list()
829 static void encx24j600_hw_tx(struct encx24j600_priv *priv)  in encx24j600_hw_tx()  argument
831 	struct net_device *dev = priv->ndev;  in encx24j600_hw_tx()
833 	netif_info(priv, tx_queued, dev, "TX Packet Len:%d\n",  in encx24j600_hw_tx()
834 		   priv->tx_skb->len);  in encx24j600_hw_tx()
836 	if (netif_msg_pktdata(priv))  in encx24j600_hw_tx()
837 		dump_packet("TX", priv->tx_skb->len, priv->tx_skb->data);  in encx24j600_hw_tx()
839 	if (encx24j600_read_reg(priv, EIR) & TXABTIF)  in encx24j600_hw_tx()
843 		encx24j600_reset_hw_tx(priv);  in encx24j600_hw_tx()
846 	encx24j600_clr_bits(priv, EIR, TXIF);  in encx24j600_hw_tx()
849 	encx24j600_write_reg(priv, EGPWRPT, ENC_TX_BUF_START);  in encx24j600_hw_tx()
852 	encx24j600_raw_write(priv, WGPDATA, (u8 *)priv->tx_skb->data,  in encx24j600_hw_tx()
853 			     priv->tx_skb->len);  in encx24j600_hw_tx()
856 	encx24j600_write_reg(priv, ETXST, ENC_TX_BUF_START);  in encx24j600_hw_tx()
859 	encx24j600_write_reg(priv, ETXLEN, priv->tx_skb->len);  in encx24j600_hw_tx()
862 	encx24j600_cmd(priv, SETTXRTS);  in encx24j600_hw_tx()
867 	struct encx24j600_priv *priv =  in encx24j600_tx_proc()  local
870 	mutex_lock(&priv->lock);  in encx24j600_tx_proc()
871 	encx24j600_hw_tx(priv);  in encx24j600_tx_proc()
872 	mutex_unlock(&priv->lock);  in encx24j600_tx_proc()
877 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_tx()  local
885 	priv->tx_skb = skb;  in encx24j600_tx()
887 	kthread_queue_work(&priv->kworker, &priv->tx_work);  in encx24j600_tx()
895 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_tx_timeout()  local
897 	netif_err(priv, tx_err, dev, "TX timeout at %ld, latency %ld\n",  in encx24j600_tx_timeout()
912 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_get_regs()  local
917 	mutex_lock(&priv->lock);  in encx24j600_get_regs()
921 		regmap_read(priv->ctx.regmap, reg, &val);  in encx24j600_get_regs()
924 	mutex_unlock(&priv->lock);  in encx24j600_get_regs()
939 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_get_link_ksettings()  local
949 	cmd->base.speed = priv->speed;  in encx24j600_get_link_ksettings()
950 	cmd->base.duplex = priv->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;  in encx24j600_get_link_ksettings()
952 	cmd->base.autoneg = priv->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;  in encx24j600_get_link_ksettings()
967 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_get_msglevel()  local
969 	return priv->msg_enable;  in encx24j600_get_msglevel()
974 	struct encx24j600_priv *priv = netdev_priv(dev);  in encx24j600_set_msglevel()  local
976 	priv->msg_enable = val;  in encx24j600_set_msglevel()
1004 	struct encx24j600_priv *priv;  in encx24j600_spi_probe()  local
1015 	priv = netdev_priv(ndev);  in encx24j600_spi_probe()
1016 	spi_set_drvdata(spi, priv);  in encx24j600_spi_probe()
1017 	dev_set_drvdata(&spi->dev, priv);  in encx24j600_spi_probe()
1020 	priv->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);  in encx24j600_spi_probe()
1021 	priv->ndev = ndev;  in encx24j600_spi_probe()
1024 	priv->full_duplex = true;  in encx24j600_spi_probe()
1025 	priv->autoneg = AUTONEG_ENABLE;  in encx24j600_spi_probe()
1026 	priv->speed = SPEED_100;  in encx24j600_spi_probe()
1028 	priv->ctx.spi = spi;  in encx24j600_spi_probe()
1032 	ret = devm_regmap_init_encx24j600(&spi->dev, &priv->ctx);  in encx24j600_spi_probe()
1036 	mutex_init(&priv->lock);  in encx24j600_spi_probe()
1039 	if (encx24j600_hw_reset(priv)) {  in encx24j600_spi_probe()
1040 		netif_err(priv, probe, ndev,  in encx24j600_spi_probe()
1047 	encx24j600_hw_init(priv);  in encx24j600_spi_probe()
1049 	kthread_init_worker(&priv->kworker);  in encx24j600_spi_probe()
1050 	kthread_init_work(&priv->tx_work, encx24j600_tx_proc);  in encx24j600_spi_probe()
1051 	kthread_init_work(&priv->setrx_work, encx24j600_setrx_proc);  in encx24j600_spi_probe()
1053 	priv->kworker_task = kthread_run(kthread_worker_fn, &priv->kworker,  in encx24j600_spi_probe()
1056 	if (IS_ERR(priv->kworker_task)) {  in encx24j600_spi_probe()
1057 		ret = PTR_ERR(priv->kworker_task);  in encx24j600_spi_probe()
1062 	encx24j600_hw_get_macaddr(priv, addr);  in encx24j600_spi_probe()
1069 		netif_err(priv, probe, ndev, "Error %d initializing card encx24j600 card\n",  in encx24j600_spi_probe()
1074 	eidled = encx24j600_read_reg(priv, EIDLED);  in encx24j600_spi_probe()
1080 	netif_info(priv, probe, ndev, "Silicon rev ID: 0x%02x\n",  in encx24j600_spi_probe()
1083 	netif_info(priv, drv, priv->ndev, "MAC address %pM\n", ndev->dev_addr);  in encx24j600_spi_probe()
1088 	unregister_netdev(priv->ndev);  in encx24j600_spi_probe()
1090 	kthread_stop(priv->kworker_task);  in encx24j600_spi_probe()
1100 	struct encx24j600_priv *priv = dev_get_drvdata(&spi->dev);  in encx24j600_spi_remove()  local
1102 	unregister_netdev(priv->ndev);  in encx24j600_spi_remove()
1103 	kthread_stop(priv->kworker_task);  in encx24j600_spi_remove()
1105 	free_netdev(priv->ndev);  in encx24j600_spi_remove()