105 wed_clr(struct mtk_wed_device *dev, u32 reg, u32 mask)  in wed_clr()  function
626 		wed_clr(dev, MTK_WED_AMSDU_FIFO, MTK_WED_AMSDU_IS_PRIOR0_RING);  in mtk_wed_amsdu_init()
1003 		wed_clr(dev, MTK_WED_TXDP_CTRL, MTK_WED_TXDP_DW9_OVERWR);  in mtk_wed_set_512_support()
1033 	wed_clr(dev, MTK_WED_WPDMA_GLO_CFG,  in mtk_wed_dma_disable()
1037 	wed_clr(dev, MTK_WED_WDMA_GLO_CFG, MTK_WED_WDMA_GLO_CFG_RX_DRV_EN);  in mtk_wed_dma_disable()
1039 	wed_clr(dev, MTK_WED_GLO_CFG,  in mtk_wed_dma_disable()
1053 		wed_clr(dev, MTK_WED_WPDMA_GLO_CFG,  in mtk_wed_dma_disable()
1057 		wed_clr(dev, MTK_WED_WPDMA_RX_D_GLO_CFG,  in mtk_wed_dma_disable()
1059 		wed_clr(dev, MTK_WED_WDMA_GLO_CFG,  in mtk_wed_dma_disable()
1097 	wed_clr(dev, MTK_WED_CTRL,  in mtk_wed_deinit()
1106 	wed_clr(dev, MTK_WED_CTRL,  in mtk_wed_deinit()
1112 		wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_TX_AMSDU_EN);  in mtk_wed_deinit()
1113 		wed_clr(dev, MTK_WED_RESET, MTK_WED_RESET_TX_AMSDU);  in mtk_wed_deinit()
1114 		wed_clr(dev, MTK_WED_PCIE_INT_CTRL,  in mtk_wed_deinit()
1406 		wed_clr(dev, MTK_WED_RTQM_GLO_CFG, MTK_WED_RTQM_Q_RST);  in mtk_wed_route_qm_hw_init()
1407 		wed_clr(dev, MTK_WED_RTQM_GLO_CFG, MTK_WED_RTQM_TXDMAD_FPORT);  in mtk_wed_route_qm_hw_init()
1411 		wed_clr(dev, MTK_WED_RTQM_GLO_CFG, MTK_WED_RTQM_Q_RST);  in mtk_wed_route_qm_hw_init()
1473 		wed_clr(dev, MTK_WED_TX_BM_CTRL,  in mtk_wed_hw_init()
1505 		wed_clr(dev, MTK_WED_WPDMA_RX_D_PREF_RX0_SIDX,  in mtk_wed_hw_init()
1510 		wed_clr(dev, MTK_WED_WPDMA_RX_D_PREF_RX1_SIDX,  in mtk_wed_hw_init()
1524 	wed_clr(dev, MTK_WED_TX_BM_CTRL, MTK_WED_TX_BM_CTRL_PAUSE);  in mtk_wed_hw_init()
1526 		wed_clr(dev, MTK_WED_TX_TKID_CTRL, MTK_WED_TX_TKID_CTRL_PAUSE);  in mtk_wed_hw_init()
1563 		wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_RX_IND_CMD_EN);  in mtk_wed_rx_reset()
1569 	wed_clr(dev, MTK_WED_WPDMA_RX_D_GLO_CFG, MTK_WED_WPDMA_RX_D_RX_DRV_EN);  in mtk_wed_rx_reset()
1581 			wed_clr(dev, MTK_WED_WPDMA_RX_D_PREF_CFG,  in mtk_wed_rx_reset()
1596 		wed_clr(dev, MTK_WED_WPDMA_RX_D_GLO_CFG,  in mtk_wed_rx_reset()
1604 	wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_RX_RRO_QM_EN);  in mtk_wed_rx_reset()
1618 		wed_clr(dev, MTK_WED_RRO_MSDU_PG_RING2_CFG,  in mtk_wed_rx_reset()
1622 		wed_clr(dev, MTK_WED_RRO_RX_D_CFG(2), MTK_WED_RRO_RX_D_DRV_EN);  in mtk_wed_rx_reset()
1638 	wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_RX_ROUTE_QM_EN);  in mtk_wed_rx_reset()
1645 		wed_clr(dev, MTK_WED_RTQM_RST, BIT(0));  in mtk_wed_rx_reset()
1655 	wed_clr(dev, MTK_WED_WDMA_GLO_CFG, MTK_WED_WDMA_GLO_CFG_TX_DRV_EN);  in mtk_wed_rx_reset()
1667 	wed_clr(dev, MTK_WED_GLO_CFG, MTK_WED_GLO_CFG_RX_DMA_EN);  in mtk_wed_rx_reset()
1677 	wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_RX_BM_EN);  in mtk_wed_rx_reset()
1683 		wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_RX_PG_BM_EN);  in mtk_wed_rx_reset()
1687 		wed_clr(dev, MTK_WED_RESET, MTK_WED_RESET_RX_PG_BM);  in mtk_wed_rx_reset()
1728 	wed_clr(dev, MTK_WED_GLO_CFG, MTK_WED_GLO_CFG_TX_DMA_EN);  in mtk_wed_reset_dma()
1747 		wed_clr(dev, MTK_WED_WDMA_GLO_CFG,  in mtk_wed_reset_dma()
1764 			wed_clr(dev, MTK_WED_WDMA_RX_PREF_CFG,  in mtk_wed_reset_dma()
1768 			wed_clr(dev, MTK_WED_WDMA_RX_PREF_CFG,  in mtk_wed_reset_dma()
1783 		wed_clr(dev, MTK_WED_WDMA_GLO_CFG,  in mtk_wed_reset_dma()
1788 	wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_TX_FREE_AGENT_EN);  in mtk_wed_reset_dma()
1802 	wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_WED_TX_BM_EN);  in mtk_wed_reset_dma()
1808 	wed_clr(dev, MTK_WED_WPDMA_GLO_CFG,  in mtk_wed_reset_dma()
1839 		wed_clr(dev, MTK_WED_CTRL, MTK_WED_CTRL_TX_AMSDU_EN);  in mtk_wed_reset_dma()
1986 		wed_clr(dev, MTK_WED_WDMA_INT_CTRL, wdma_mask);  in mtk_wed_configure_irq()
2084 		wed_clr(dev, MTK_WED_WDMA_RX_PREF_CFG,  in mtk_wed_dma_enable()
2088 		wed_clr(dev, MTK_WED_WPDMA_GLO_CFG,  in mtk_wed_dma_enable()
2099 	wed_clr(dev, MTK_WED_WPDMA_GLO_CFG,  in mtk_wed_dma_enable()
2110 	wed_clr(dev, MTK_WED_WPDMA_RX_D_GLO_CFG, MTK_WED_WPDMA_RX_D_RXD_READ_LEN);  in mtk_wed_dma_enable()
2484 		wed_clr(dev, MTK_WED_WDMA_RX_PREF_CFG,  in mtk_wed_tx_ring_setup()