Lines Matching +full:rt5350 +full:- +full:pinctrl
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
22 #include <linux/pinctrl/devinfo.h>
24 #include <linux/pcs/pcs-mtk-lynxi.h>
35 static int mtk_msg_level = -1;
37 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
291 __raw_writel(val, eth->base + reg); in mtk_w32()
296 return __raw_readl(eth->base + reg); in mtk_r32()
322 dev_err(eth->dev, "mdio: MDIO timeout\n"); in mtk_mdio_busy_wait()
323 return -ETIMEDOUT; in mtk_mdio_busy_wait()
446 struct mtk_eth *eth = bus->priv; in mtk_mdio_write_c22()
454 struct mtk_eth *eth = bus->priv; in mtk_mdio_write_c45()
461 struct mtk_eth *eth = bus->priv; in mtk_mdio_read_c22()
469 struct mtk_eth *eth = bus->priv; in mtk_mdio_read_c45()
482 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mt7621_gmac0_rgmii_adjust()
495 ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 500000000); in mtk_gmac0_rgmii_adjust()
497 dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret); in mtk_gmac0_rgmii_adjust()
501 dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); in mtk_gmac0_rgmii_adjust()
522 struct mtk_eth *eth = mac->hw; in mtk_mac_select_pcs()
527 sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? in mtk_mac_select_pcs()
528 0 : mac->id; in mtk_mac_select_pcs()
530 return eth->sgmii_pcs[sid]; in mtk_mac_select_pcs()
541 struct mtk_eth *eth = mac->hw; in mtk_mac_prepare()
544 mac->id != MTK_GMAC1_ID) { in mtk_mac_prepare()
545 mtk_m32(mac->hw, XMAC_MCR_TRX_DISABLE, in mtk_mac_prepare()
546 XMAC_MCR_TRX_DISABLE, MTK_XMAC_MCR(mac->id)); in mtk_mac_prepare()
548 mtk_m32(mac->hw, MTK_XGMAC_FORCE_MODE(mac->id) | in mtk_mac_prepare()
549 MTK_XGMAC_FORCE_LINK(mac->id), in mtk_mac_prepare()
550 MTK_XGMAC_FORCE_MODE(mac->id), MTK_XGMAC_STS(mac->id)); in mtk_mac_prepare()
561 struct mtk_eth *eth = mac->hw; in mtk_mac_config()
566 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && in mtk_mac_config()
567 mac->interface != state->interface) { in mtk_mac_config()
569 switch (state->interface) { in mtk_mac_config()
576 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RGMII)) { in mtk_mac_config()
577 err = mtk_gmac_rgmii_path_setup(eth, mac->id); in mtk_mac_config()
585 err = mtk_gmac_sgmii_path_setup(eth, mac->id); in mtk_mac_config()
590 if (MTK_HAS_CAPS(eth->soc->caps, MTK_GEPHY)) { in mtk_mac_config()
591 err = mtk_gmac_gephy_path_setup(eth, mac->id); in mtk_mac_config()
597 if (mac->id == MTK_GMAC2_ID && in mtk_mac_config()
598 MTK_HAS_CAPS(eth->soc->caps, MTK_2P5GPHY)) { in mtk_mac_config()
599 err = mtk_gmac_2p5gphy_path_setup(eth, mac->id); in mtk_mac_config()
609 if (!mac->id && state->interface != PHY_INTERFACE_MODE_SGMII && in mtk_mac_config()
610 !phy_interface_mode_is_8023z(state->interface) && in mtk_mac_config()
611 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII)) { in mtk_mac_config()
612 if (MTK_HAS_CAPS(mac->hw->soc->caps, in mtk_mac_config()
614 if (mt7621_gmac0_rgmii_adjust(mac->hw, in mtk_mac_config()
615 state->interface)) in mtk_mac_config()
618 mtk_gmac0_rgmii_adjust(mac->hw, in mtk_mac_config()
619 state->interface); in mtk_mac_config()
623 mtk_w32(mac->hw, in mtk_mac_config()
628 mtk_m32(mac->hw, 0, RXC_RST | RXC_DQSISEL, in mtk_mac_config()
630 mtk_m32(mac->hw, RXC_RST, 0, TRGMII_RCK_CTRL); in mtk_mac_config()
634 switch (state->interface) { in mtk_mac_config()
645 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
646 val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id); in mtk_mac_config()
647 val |= SYSCFG0_GE_MODE(ge_mode, mac->id); in mtk_mac_config()
648 regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); in mtk_mac_config()
650 mac->interface = state->interface; in mtk_mac_config()
654 if (state->interface == PHY_INTERFACE_MODE_SGMII || in mtk_mac_config()
655 phy_interface_mode_is_8023z(state->interface)) { in mtk_mac_config()
659 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
661 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
666 mac->syscfg0 = val; in mtk_mac_config()
668 dev_err(eth->dev, in mtk_mac_config()
669 "In-band mode not supported in non SGMII mode!\n"); in mtk_mac_config()
674 if (mtk_interface_mode_is_xgmii(eth, state->interface)) { in mtk_mac_config()
675 mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); in mtk_mac_config()
676 mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); in mtk_mac_config()
678 if (mac->id == MTK_GMAC1_ID) in mtk_mac_config()
685 dev_err(eth->dev, "%s: GMAC%d mode %s not supported!\n", __func__, in mtk_mac_config()
686 mac->id, phy_modes(state->interface)); in mtk_mac_config()
690 dev_err(eth->dev, "%s: GMAC%d mode %s err: %d!\n", __func__, in mtk_mac_config()
691 mac->id, phy_modes(state->interface), err); in mtk_mac_config()
699 struct mtk_eth *eth = mac->hw; in mtk_mac_finish()
705 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_finish()
706 SYSCFG0_SGMII_MASK, mac->syscfg0); in mtk_mac_finish()
709 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
716 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
727 if (!mtk_interface_mode_is_xgmii(mac->hw, interface)) { in mtk_mac_link_down()
729 mtk_m32(mac->hw, in mtk_mac_link_down()
731 MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
732 } else if (mac->id != MTK_GMAC1_ID) { in mtk_mac_link_down()
733 /* XGMAC except for built-in switch */ in mtk_mac_link_down()
734 mtk_m32(mac->hw, XMAC_MCR_TRX_DISABLE, XMAC_MCR_TRX_DISABLE, in mtk_mac_link_down()
735 MTK_XMAC_MCR(mac->id)); in mtk_mac_link_down()
736 mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), 0, in mtk_mac_link_down()
737 MTK_XGMAC_STS(mac->id)); in mtk_mac_link_down()
744 const struct mtk_soc_data *soc = eth->soc; in mtk_set_queue_speed()
747 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_set_queue_speed()
807 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_set_queue_speed()
818 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_gdm_mac_link_up()
824 mac->speed = speed; in mtk_gdm_mac_link_up()
839 /* Configure pause modes - phylink will avoid these for half duplex */ in mtk_gdm_mac_link_up()
846 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_gdm_mac_link_up()
857 if (mac->id == MTK_GMAC1_ID) in mtk_xgdm_mac_link_up()
860 /* Eliminate the interference(before link-up) caused by PHY noise */ in mtk_xgdm_mac_link_up()
861 mtk_m32(mac->hw, XMAC_LOGIC_RST, 0, MTK_XMAC_LOGIC_RST(mac->id)); in mtk_xgdm_mac_link_up()
863 mtk_m32(mac->hw, XMAC_GLB_CNTCLR, XMAC_GLB_CNTCLR, in mtk_xgdm_mac_link_up()
864 MTK_XMAC_CNT_CTRL(mac->id)); in mtk_xgdm_mac_link_up()
866 mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), in mtk_xgdm_mac_link_up()
867 MTK_XGMAC_FORCE_LINK(mac->id), MTK_XGMAC_STS(mac->id)); in mtk_xgdm_mac_link_up()
869 mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); in mtk_xgdm_mac_link_up()
872 /* Configure pause modes - in mtk_xgdm_mac_link_up()
880 mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); in mtk_xgdm_mac_link_up()
891 if (mtk_interface_mode_is_xgmii(mac->hw, interface)) in mtk_mac_link_up()
903 struct mtk_eth *eth = mac->hw; in mtk_mac_disable_tx_lpi()
905 mtk_m32(eth, MAC_MCR_EEE100M | MAC_MCR_EEE1G, 0, MTK_MAC_MCR(mac->id)); in mtk_mac_disable_tx_lpi()
913 struct mtk_eth *eth = mac->hw; in mtk_mac_enable_tx_lpi()
916 if (mtk_interface_mode_is_xgmii(eth, mac->interface)) in mtk_mac_enable_tx_lpi()
917 return -EOPNOTSUPP; in mtk_mac_enable_tx_lpi()
936 /* PHY Wake-up time, this field does not have a reset value, so use the in mtk_mac_enable_tx_lpi()
942 mtk_w32(eth, val, MTK_MAC_EEECR(mac->id)); in mtk_mac_enable_tx_lpi()
943 mtk_m32(eth, 0, MAC_MCR_EEE100M | MAC_MCR_EEE1G, MTK_MAC_MCR(mac->id)); in mtk_mac_enable_tx_lpi()
964 val = FIELD_PREP(PPSC_MDC_CFG, eth->mdc_divider); in mtk_mdio_config()
982 mii_np = of_get_available_child_by_name(eth->dev->of_node, "mdio-bus"); in mtk_mdio_init()
984 dev_err(eth->dev, "no %s child node found", "mdio-bus"); in mtk_mdio_init()
985 return -ENODEV; in mtk_mdio_init()
988 eth->mii_bus = devm_mdiobus_alloc(eth->dev); in mtk_mdio_init()
989 if (!eth->mii_bus) { in mtk_mdio_init()
990 ret = -ENOMEM; in mtk_mdio_init()
994 eth->mii_bus->name = "mdio"; in mtk_mdio_init()
995 eth->mii_bus->read = mtk_mdio_read_c22; in mtk_mdio_init()
996 eth->mii_bus->write = mtk_mdio_write_c22; in mtk_mdio_init()
997 eth->mii_bus->read_c45 = mtk_mdio_read_c45; in mtk_mdio_init()
998 eth->mii_bus->write_c45 = mtk_mdio_write_c45; in mtk_mdio_init()
999 eth->mii_bus->priv = eth; in mtk_mdio_init()
1000 eth->mii_bus->parent = eth->dev; in mtk_mdio_init()
1002 snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); in mtk_mdio_init()
1004 if (!of_property_read_u32(mii_np, "clock-frequency", &val)) { in mtk_mdio_init()
1006 dev_err(eth->dev, "MDIO clock frequency out of range"); in mtk_mdio_init()
1007 ret = -EINVAL; in mtk_mdio_init()
1012 eth->mdc_divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); in mtk_mdio_init()
1014 dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / eth->mdc_divider); in mtk_mdio_init()
1015 ret = of_mdiobus_register(eth->mii_bus, mii_np); in mtk_mdio_init()
1024 if (!eth->mii_bus) in mtk_mdio_cleanup()
1027 mdiobus_unregister(eth->mii_bus); in mtk_mdio_cleanup()
1035 spin_lock_irqsave(ð->tx_irq_lock, flags); in mtk_tx_irq_disable()
1036 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
1037 mtk_w32(eth, val & ~mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
1038 spin_unlock_irqrestore(ð->tx_irq_lock, flags); in mtk_tx_irq_disable()
1046 spin_lock_irqsave(ð->tx_irq_lock, flags); in mtk_tx_irq_enable()
1047 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
1048 mtk_w32(eth, val | mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
1049 spin_unlock_irqrestore(ð->tx_irq_lock, flags); in mtk_tx_irq_enable()
1057 spin_lock_irqsave(ð->rx_irq_lock, flags); in mtk_rx_irq_disable()
1058 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
1059 mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
1060 spin_unlock_irqrestore(ð->rx_irq_lock, flags); in mtk_rx_irq_disable()
1068 spin_lock_irqsave(ð->rx_irq_lock, flags); in mtk_rx_irq_enable()
1069 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
1070 mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
1071 spin_unlock_irqrestore(ð->rx_irq_lock, flags); in mtk_rx_irq_enable()
1078 struct mtk_eth *eth = mac->hw; in mtk_set_mac_address()
1079 const char *macaddr = dev->dev_addr; in mtk_set_mac_address()
1084 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_set_mac_address()
1085 return -EBUSY; in mtk_set_mac_address()
1087 spin_lock_bh(&mac->hw->page_lock); in mtk_set_mac_address()
1088 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_set_mac_address()
1089 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
1091 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
1095 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
1096 MTK_GDMA_MAC_ADRH(mac->id)); in mtk_set_mac_address()
1097 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
1099 MTK_GDMA_MAC_ADRL(mac->id)); in mtk_set_mac_address()
1101 spin_unlock_bh(&mac->hw->page_lock); in mtk_set_mac_address()
1108 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_stats_update_mac()
1109 struct mtk_eth *eth = mac->hw; in mtk_stats_update_mac()
1111 u64_stats_update_begin(&hw_stats->syncp); in mtk_stats_update_mac()
1113 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_stats_update_mac()
1114 hw_stats->tx_packets += mtk_r32(mac->hw, MT7628_SDM_TPCNT); in mtk_stats_update_mac()
1115 hw_stats->tx_bytes += mtk_r32(mac->hw, MT7628_SDM_TBCNT); in mtk_stats_update_mac()
1116 hw_stats->rx_packets += mtk_r32(mac->hw, MT7628_SDM_RPCNT); in mtk_stats_update_mac()
1117 hw_stats->rx_bytes += mtk_r32(mac->hw, MT7628_SDM_RBCNT); in mtk_stats_update_mac()
1118 hw_stats->rx_checksum_errors += in mtk_stats_update_mac()
1119 mtk_r32(mac->hw, MT7628_SDM_CS_ERR); in mtk_stats_update_mac()
1121 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_stats_update_mac()
1122 unsigned int offs = hw_stats->reg_offset; in mtk_stats_update_mac()
1125 hw_stats->rx_bytes += mtk_r32(mac->hw, reg_map->gdm1_cnt + offs); in mtk_stats_update_mac()
1126 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x4 + offs); in mtk_stats_update_mac()
1128 hw_stats->rx_bytes += (stats << 32); in mtk_stats_update_mac()
1129 hw_stats->rx_packets += in mtk_stats_update_mac()
1130 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x8 + offs); in mtk_stats_update_mac()
1131 hw_stats->rx_overflow += in mtk_stats_update_mac()
1132 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x10 + offs); in mtk_stats_update_mac()
1133 hw_stats->rx_fcs_errors += in mtk_stats_update_mac()
1134 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x14 + offs); in mtk_stats_update_mac()
1135 hw_stats->rx_short_errors += in mtk_stats_update_mac()
1136 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x18 + offs); in mtk_stats_update_mac()
1137 hw_stats->rx_long_errors += in mtk_stats_update_mac()
1138 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x1c + offs); in mtk_stats_update_mac()
1139 hw_stats->rx_checksum_errors += in mtk_stats_update_mac()
1140 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); in mtk_stats_update_mac()
1141 hw_stats->rx_flow_control_packets += in mtk_stats_update_mac()
1142 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); in mtk_stats_update_mac()
1145 hw_stats->tx_skip += in mtk_stats_update_mac()
1146 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x50 + offs); in mtk_stats_update_mac()
1147 hw_stats->tx_collisions += in mtk_stats_update_mac()
1148 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x54 + offs); in mtk_stats_update_mac()
1149 hw_stats->tx_bytes += in mtk_stats_update_mac()
1150 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x40 + offs); in mtk_stats_update_mac()
1151 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x44 + offs); in mtk_stats_update_mac()
1153 hw_stats->tx_bytes += (stats << 32); in mtk_stats_update_mac()
1154 hw_stats->tx_packets += in mtk_stats_update_mac()
1155 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x48 + offs); in mtk_stats_update_mac()
1157 hw_stats->tx_skip += in mtk_stats_update_mac()
1158 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x28 + offs); in mtk_stats_update_mac()
1159 hw_stats->tx_collisions += in mtk_stats_update_mac()
1160 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x2c + offs); in mtk_stats_update_mac()
1161 hw_stats->tx_bytes += in mtk_stats_update_mac()
1162 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x30 + offs); in mtk_stats_update_mac()
1163 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x34 + offs); in mtk_stats_update_mac()
1165 hw_stats->tx_bytes += (stats << 32); in mtk_stats_update_mac()
1166 hw_stats->tx_packets += in mtk_stats_update_mac()
1167 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); in mtk_stats_update_mac()
1171 u64_stats_update_end(&hw_stats->syncp); in mtk_stats_update_mac()
1179 if (!eth->mac[i] || !eth->mac[i]->hw_stats) in mtk_stats_update()
1181 if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { in mtk_stats_update()
1182 mtk_stats_update_mac(eth->mac[i]); in mtk_stats_update()
1183 spin_unlock(ð->mac[i]->hw_stats->stats_lock); in mtk_stats_update()
1192 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_get_stats64()
1196 if (spin_trylock_bh(&hw_stats->stats_lock)) { in mtk_get_stats64()
1198 spin_unlock_bh(&hw_stats->stats_lock); in mtk_get_stats64()
1203 start = u64_stats_fetch_begin(&hw_stats->syncp); in mtk_get_stats64()
1204 storage->rx_packets = hw_stats->rx_packets; in mtk_get_stats64()
1205 storage->tx_packets = hw_stats->tx_packets; in mtk_get_stats64()
1206 storage->rx_bytes = hw_stats->rx_bytes; in mtk_get_stats64()
1207 storage->tx_bytes = hw_stats->tx_bytes; in mtk_get_stats64()
1208 storage->collisions = hw_stats->tx_collisions; in mtk_get_stats64()
1209 storage->rx_length_errors = hw_stats->rx_short_errors + in mtk_get_stats64()
1210 hw_stats->rx_long_errors; in mtk_get_stats64()
1211 storage->rx_over_errors = hw_stats->rx_overflow; in mtk_get_stats64()
1212 storage->rx_crc_errors = hw_stats->rx_fcs_errors; in mtk_get_stats64()
1213 storage->rx_errors = hw_stats->rx_checksum_errors; in mtk_get_stats64()
1214 storage->tx_aborted_errors = hw_stats->tx_skip; in mtk_get_stats64()
1215 } while (u64_stats_fetch_retry(&hw_stats->syncp, start)); in mtk_get_stats64()
1217 storage->tx_errors = dev->stats.tx_errors; in mtk_get_stats64()
1218 storage->rx_dropped = dev->stats.rx_dropped; in mtk_get_stats64()
1219 storage->tx_dropped = dev->stats.tx_dropped; in mtk_get_stats64()
1226 mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; in mtk_max_frag_size()
1234 int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN - in mtk_max_buf_size()
1245 rxd->rxd2 = READ_ONCE(dma_rxd->rxd2); in mtk_rx_get_desc()
1246 if (!(rxd->rxd2 & RX_DMA_DONE)) in mtk_rx_get_desc()
1249 rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); in mtk_rx_get_desc()
1250 rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); in mtk_rx_get_desc()
1251 rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); in mtk_rx_get_desc()
1253 rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); in mtk_rx_get_desc()
1254 rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); in mtk_rx_get_desc()
1276 if (use_sram && eth->sram_pool) { in mtk_dma_ring_alloc()
1277 dma_ring = (void *)gen_pool_alloc(eth->sram_pool, size); in mtk_dma_ring_alloc()
1280 *dma_handle = gen_pool_virt_to_phys(eth->sram_pool, in mtk_dma_ring_alloc()
1283 dma_ring = dma_alloc_coherent(eth->dma_dev, size, dma_handle, in mtk_dma_ring_alloc()
1293 if (in_sram && eth->sram_pool) in mtk_dma_ring_free()
1294 gen_pool_free(eth->sram_pool, (unsigned long)dma_ring, size); in mtk_dma_ring_free()
1296 dma_free_coherent(eth->dma_dev, size, dma_ring, dma_handle); in mtk_dma_ring_free()
1302 const struct mtk_soc_data *soc = eth->soc; in mtk_init_fq_dma()
1304 int cnt = soc->tx.fq_dma_size; in mtk_init_fq_dma()
1308 eth->scratch_ring = mtk_dma_ring_alloc(eth, cnt * soc->tx.desc_size, in mtk_init_fq_dma()
1309 ð->phy_scratch_ring, true); in mtk_init_fq_dma()
1311 if (unlikely(!eth->scratch_ring)) in mtk_init_fq_dma()
1312 return -ENOMEM; in mtk_init_fq_dma()
1314 phy_ring_tail = eth->phy_scratch_ring + soc->tx.desc_size * (cnt - 1); in mtk_init_fq_dma()
1316 for (j = 0; j < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); j++) { in mtk_init_fq_dma()
1317 len = min_t(int, cnt - j * MTK_FQ_DMA_LENGTH, MTK_FQ_DMA_LENGTH); in mtk_init_fq_dma()
1318 eth->scratch_head[j] = kcalloc(len, MTK_QDMA_PAGE_SIZE, GFP_KERNEL); in mtk_init_fq_dma()
1320 if (unlikely(!eth->scratch_head[j])) in mtk_init_fq_dma()
1321 return -ENOMEM; in mtk_init_fq_dma()
1323 dma_addr = dma_map_single(eth->dma_dev, in mtk_init_fq_dma()
1324 eth->scratch_head[j], len * MTK_QDMA_PAGE_SIZE, in mtk_init_fq_dma()
1327 if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) in mtk_init_fq_dma()
1328 return -ENOMEM; in mtk_init_fq_dma()
1333 txd = eth->scratch_ring + (j * MTK_FQ_DMA_LENGTH + i) * soc->tx.desc_size; in mtk_init_fq_dma()
1334 txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE; in mtk_init_fq_dma()
1336 txd->txd2 = eth->phy_scratch_ring + in mtk_init_fq_dma()
1337 (j * MTK_FQ_DMA_LENGTH + i + 1) * soc->tx.desc_size; in mtk_init_fq_dma()
1339 txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); in mtk_init_fq_dma()
1340 if (MTK_HAS_CAPS(soc->caps, MTK_36BIT_DMA)) in mtk_init_fq_dma()
1341 txd->txd3 |= TX_DMA_PREP_ADDR64(dma_addr + i * MTK_QDMA_PAGE_SIZE); in mtk_init_fq_dma()
1343 txd->txd4 = 0; in mtk_init_fq_dma()
1345 txd->txd5 = 0; in mtk_init_fq_dma()
1346 txd->txd6 = 0; in mtk_init_fq_dma()
1347 txd->txd7 = 0; in mtk_init_fq_dma()
1348 txd->txd8 = 0; in mtk_init_fq_dma()
1353 mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head); in mtk_init_fq_dma()
1354 mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail); in mtk_init_fq_dma()
1355 mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count); in mtk_init_fq_dma()
1356 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen); in mtk_init_fq_dma()
1363 return ring->dma + (desc - ring->phys); in mtk_qdma_phys_to_virt()
1369 int idx = (txd - ring->dma) / txd_size; in mtk_desc_to_tx_buf()
1371 return &ring->buf[idx]; in mtk_desc_to_tx_buf()
1377 return ring->dma_pdma - (struct mtk_tx_dma *)ring->dma + dma; in qdma_to_pdma()
1382 return (dma - ring->dma) / txd_size; in txd_to_idx()
1388 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_tx_unmap()
1389 if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) { in mtk_tx_unmap()
1390 dma_unmap_single(eth->dma_dev, in mtk_tx_unmap()
1394 } else if (tx_buf->flags & MTK_TX_FLAGS_PAGE0) { in mtk_tx_unmap()
1395 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1402 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1409 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1416 if (tx_buf->data && tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_tx_unmap()
1417 if (tx_buf->type == MTK_TYPE_SKB) { in mtk_tx_unmap()
1418 struct sk_buff *skb = tx_buf->data; in mtk_tx_unmap()
1425 struct xdp_frame *xdpf = tx_buf->data; in mtk_tx_unmap()
1427 if (napi && tx_buf->type == MTK_TYPE_XDP_TX) in mtk_tx_unmap()
1435 tx_buf->flags = 0; in mtk_tx_unmap()
1436 tx_buf->data = NULL; in mtk_tx_unmap()
1443 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in setup_tx_buf()
1448 txd->txd3 = mapped_addr; in setup_tx_buf()
1449 txd->txd2 |= TX_DMA_PLEN1(size); in setup_tx_buf()
1453 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in setup_tx_buf()
1454 txd->txd1 = mapped_addr; in setup_tx_buf()
1455 txd->txd2 = TX_DMA_PLEN0(size); in setup_tx_buf()
1466 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc_v1()
1470 WRITE_ONCE(desc->txd1, info->addr); in mtk_tx_set_dma_desc_v1()
1472 data = TX_DMA_SWC | TX_DMA_PLEN0(info->size) | in mtk_tx_set_dma_desc_v1()
1473 FIELD_PREP(TX_DMA_PQID, info->qid); in mtk_tx_set_dma_desc_v1()
1474 if (info->last) in mtk_tx_set_dma_desc_v1()
1476 WRITE_ONCE(desc->txd3, data); in mtk_tx_set_dma_desc_v1()
1478 data = (mac->id + 1) << TX_DMA_FPORT_SHIFT; /* forward port */ in mtk_tx_set_dma_desc_v1()
1479 if (info->first) { in mtk_tx_set_dma_desc_v1()
1480 if (info->gso) in mtk_tx_set_dma_desc_v1()
1483 if (info->csum) in mtk_tx_set_dma_desc_v1()
1486 if (info->vlan) in mtk_tx_set_dma_desc_v1()
1487 data |= TX_DMA_INS_VLAN | info->vlan_tci; in mtk_tx_set_dma_desc_v1()
1489 WRITE_ONCE(desc->txd4, data); in mtk_tx_set_dma_desc_v1()
1497 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc_v2()
1500 WRITE_ONCE(desc->txd1, info->addr); in mtk_tx_set_dma_desc_v2()
1502 data = TX_DMA_PLEN0(info->size); in mtk_tx_set_dma_desc_v2()
1503 if (info->last) in mtk_tx_set_dma_desc_v2()
1506 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_tx_set_dma_desc_v2()
1507 data |= TX_DMA_PREP_ADDR64(info->addr); in mtk_tx_set_dma_desc_v2()
1509 WRITE_ONCE(desc->txd3, data); in mtk_tx_set_dma_desc_v2()
1512 switch (mac->id) { in mtk_tx_set_dma_desc_v2()
1524 data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); in mtk_tx_set_dma_desc_v2()
1525 WRITE_ONCE(desc->txd4, data); in mtk_tx_set_dma_desc_v2()
1528 if (info->first) { in mtk_tx_set_dma_desc_v2()
1529 if (info->gso) in mtk_tx_set_dma_desc_v2()
1532 if (info->csum) in mtk_tx_set_dma_desc_v2()
1537 WRITE_ONCE(desc->txd5, data); in mtk_tx_set_dma_desc_v2()
1540 if (info->first && info->vlan) in mtk_tx_set_dma_desc_v2()
1541 data |= TX_DMA_INS_VLAN_V2 | info->vlan_tci; in mtk_tx_set_dma_desc_v2()
1542 WRITE_ONCE(desc->txd6, data); in mtk_tx_set_dma_desc_v2()
1544 WRITE_ONCE(desc->txd7, 0); in mtk_tx_set_dma_desc_v2()
1545 WRITE_ONCE(desc->txd8, 0); in mtk_tx_set_dma_desc_v2()
1552 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc()
1566 .csum = skb->ip_summed == CHECKSUM_PARTIAL, in mtk_tx_map()
1575 struct mtk_eth *eth = mac->hw; in mtk_tx_map()
1576 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_map()
1585 itxd = ring->next_free; in mtk_tx_map()
1587 if (itxd == ring->last_free) in mtk_tx_map()
1588 return -ENOMEM; in mtk_tx_map()
1590 itx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size); in mtk_tx_map()
1593 txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size, in mtk_tx_map()
1595 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr))) in mtk_tx_map()
1596 return -ENOMEM; in mtk_tx_map()
1600 itx_buf->flags |= MTK_TX_FLAGS_SINGLE0; in mtk_tx_map()
1601 itx_buf->mac_id = mac->id; in mtk_tx_map()
1609 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in mtk_tx_map()
1610 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in mtk_tx_map()
1617 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) || in mtk_tx_map()
1619 txd = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_tx_map()
1621 if (txd == ring->last_free) in mtk_tx_map()
1631 soc->tx.dma_max_len); in mtk_tx_map()
1633 txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 && in mtk_tx_map()
1634 !(frag_size - txd_info.size); in mtk_tx_map()
1635 txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag, in mtk_tx_map()
1638 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr))) in mtk_tx_map()
1644 soc->tx.desc_size); in mtk_tx_map()
1647 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in mtk_tx_map()
1648 tx_buf->flags |= MTK_TX_FLAGS_PAGE0; in mtk_tx_map()
1649 tx_buf->mac_id = mac->id; in mtk_tx_map()
1654 frag_size -= txd_info.size; in mtk_tx_map()
1660 itx_buf->type = MTK_TYPE_SKB; in mtk_tx_map()
1661 itx_buf->data = skb; in mtk_tx_map()
1663 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_map()
1665 txd_pdma->txd2 |= TX_DMA_LS0; in mtk_tx_map()
1667 txd_pdma->txd2 |= TX_DMA_LS1; in mtk_tx_map()
1670 netdev_tx_sent_queue(txq, skb->len); in mtk_tx_map()
1673 ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_tx_map()
1674 atomic_sub(n_desc, &ring->free_count); in mtk_tx_map()
1681 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_map()
1683 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_tx_map()
1687 next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd, soc->tx.desc_size), in mtk_tx_map()
1688 ring->dma_size); in mtk_tx_map()
1696 tx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size); in mtk_tx_map()
1701 itxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_tx_map()
1702 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_tx_map()
1703 itxd_pdma->txd2 = TX_DMA_DESP2_DEF; in mtk_tx_map()
1705 itxd = mtk_qdma_phys_to_virt(ring, itxd->txd2); in mtk_tx_map()
1709 return -ENOMEM; in mtk_tx_map()
1718 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in mtk_cal_txd_req()
1719 frag = &skb_shinfo(skb)->frags[i]; in mtk_cal_txd_req()
1721 eth->soc->tx.dma_max_len); in mtk_cal_txd_req()
1724 nfrags += skb_shinfo(skb)->nr_frags; in mtk_cal_txd_req()
1735 if (!eth->netdev[i]) in mtk_queue_stopped()
1737 if (netif_queue_stopped(eth->netdev[i])) in mtk_queue_stopped()
1749 if (!eth->netdev[i]) in mtk_wake_queue()
1751 netif_tx_wake_all_queues(eth->netdev[i]); in mtk_wake_queue()
1758 struct mtk_eth *eth = mac->hw; in mtk_start_xmit()
1759 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_start_xmit()
1760 struct net_device_stats *stats = &dev->stats; in mtk_start_xmit()
1768 spin_lock(ð->page_lock); in mtk_start_xmit()
1770 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_start_xmit()
1774 if (unlikely(atomic_read(&ring->free_count) <= tx_num)) { in mtk_start_xmit()
1778 spin_unlock(ð->page_lock); in mtk_start_xmit()
1790 if (skb_shinfo(skb)->gso_type & in mtk_start_xmit()
1793 tcp_hdr(skb)->check = htons(skb_shinfo(skb)->gso_size); in mtk_start_xmit()
1800 if (unlikely(atomic_read(&ring->free_count) <= ring->thresh)) in mtk_start_xmit()
1803 spin_unlock(ð->page_lock); in mtk_start_xmit()
1808 spin_unlock(ð->page_lock); in mtk_start_xmit()
1809 stats->tx_dropped++; in mtk_start_xmit()
1820 if (!eth->hwlro) in mtk_get_rx_ring()
1821 return ð->rx_ring[0]; in mtk_get_rx_ring()
1826 ring = ð->rx_ring[i]; in mtk_get_rx_ring()
1827 idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size); in mtk_get_rx_ring()
1828 rxd = ring->dma + idx * eth->soc->rx.desc_size; in mtk_get_rx_ring()
1829 if (rxd->rxd2 & RX_DMA_DONE) { in mtk_get_rx_ring()
1830 ring->calc_idx_update = true; in mtk_get_rx_ring()
1843 if (!eth->hwlro) { in mtk_update_rx_cpu_idx()
1844 ring = ð->rx_ring[0]; in mtk_update_rx_cpu_idx()
1845 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1848 ring = ð->rx_ring[i]; in mtk_update_rx_cpu_idx()
1849 if (ring->calc_idx_update) { in mtk_update_rx_cpu_idx()
1850 ring->calc_idx_update = false; in mtk_update_rx_cpu_idx()
1851 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1871 .dev = eth->dma_dev, in mtk_create_page_pool()
1878 pp_params.dma_dir = rcu_access_pointer(eth->prog) ? DMA_BIDIRECTIONAL in mtk_create_page_pool()
1884 err = __xdp_rxq_info_reg(xdp_q, eth->dummy_dev, id, in mtk_create_page_pool()
1885 eth->rx_napi.napi_id, PAGE_SIZE); in mtk_create_page_pool()
1918 if (ring->page_pool) in mtk_rx_put_buff()
1919 page_pool_put_full_page(ring->page_pool, in mtk_rx_put_buff()
1930 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_xdp_frame_map()
1935 txd_info->addr = dma_map_single(eth->dma_dev, data, in mtk_xdp_frame_map()
1936 txd_info->size, DMA_TO_DEVICE); in mtk_xdp_frame_map()
1937 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info->addr))) in mtk_xdp_frame_map()
1938 return -ENOMEM; in mtk_xdp_frame_map()
1940 tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; in mtk_xdp_frame_map()
1944 txd_info->addr = page_pool_get_dma_addr(page) + in mtk_xdp_frame_map()
1946 dma_sync_single_for_device(eth->dma_dev, txd_info->addr, in mtk_xdp_frame_map()
1947 txd_info->size, DMA_BIDIRECTIONAL); in mtk_xdp_frame_map()
1951 tx_buf->mac_id = mac->id; in mtk_xdp_frame_map()
1952 tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX; in mtk_xdp_frame_map()
1953 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in mtk_xdp_frame_map()
1956 setup_tx_buf(eth, tx_buf, txd_pdma, txd_info->addr, txd_info->size, in mtk_xdp_frame_map()
1966 const struct mtk_soc_data *soc = eth->soc; in mtk_xdp_submit_frame()
1967 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_xdp_submit_frame()
1970 .size = xdpf->len, in mtk_xdp_submit_frame()
1973 .qid = mac->id, in mtk_xdp_submit_frame()
1978 void *data = xdpf->data; in mtk_xdp_submit_frame()
1980 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_xdp_submit_frame()
1981 return -EBUSY; in mtk_xdp_submit_frame()
1983 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0; in mtk_xdp_submit_frame()
1984 if (unlikely(atomic_read(&ring->free_count) <= 1 + nr_frags)) in mtk_xdp_submit_frame()
1985 return -EBUSY; in mtk_xdp_submit_frame()
1987 spin_lock(ð->page_lock); in mtk_xdp_submit_frame()
1989 txd = ring->next_free; in mtk_xdp_submit_frame()
1990 if (txd == ring->last_free) { in mtk_xdp_submit_frame()
1991 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1992 return -ENOMEM; in mtk_xdp_submit_frame()
1996 tx_buf = mtk_desc_to_tx_buf(ring, txd, soc->tx.desc_size); in mtk_xdp_submit_frame()
2002 data, xdpf->headroom, index, dma_map); in mtk_xdp_submit_frame()
2009 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) || (index & 0x1)) { in mtk_xdp_submit_frame()
2010 txd = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_xdp_submit_frame()
2011 if (txd == ring->last_free) in mtk_xdp_submit_frame()
2015 soc->tx.desc_size); in mtk_xdp_submit_frame()
2021 txd_info.size = skb_frag_size(&sinfo->frags[index]); in mtk_xdp_submit_frame()
2023 txd_info.qid = mac->id; in mtk_xdp_submit_frame()
2024 data = skb_frag_address(&sinfo->frags[index]); in mtk_xdp_submit_frame()
2029 htx_buf->data = xdpf; in mtk_xdp_submit_frame()
2031 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
2035 txd_pdma->txd2 |= TX_DMA_LS0; in mtk_xdp_submit_frame()
2037 txd_pdma->txd2 |= TX_DMA_LS1; in mtk_xdp_submit_frame()
2040 ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_xdp_submit_frame()
2041 atomic_sub(n_desc, &ring->free_count); in mtk_xdp_submit_frame()
2048 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
2049 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_xdp_submit_frame()
2053 idx = txd_to_idx(ring, txd, soc->tx.desc_size); in mtk_xdp_submit_frame()
2054 mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size), in mtk_xdp_submit_frame()
2058 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
2064 tx_buf = mtk_desc_to_tx_buf(ring, htxd, soc->tx.desc_size); in mtk_xdp_submit_frame()
2067 htxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_xdp_submit_frame()
2068 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
2071 txd_pdma->txd2 = TX_DMA_DESP2_DEF; in mtk_xdp_submit_frame()
2074 htxd = mtk_qdma_phys_to_virt(ring, htxd->txd2); in mtk_xdp_submit_frame()
2077 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
2086 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_xdp_xmit()
2087 struct mtk_eth *eth = mac->hw; in mtk_xdp_xmit()
2091 return -EINVAL; in mtk_xdp_xmit()
2099 u64_stats_update_begin(&hw_stats->syncp); in mtk_xdp_xmit()
2100 hw_stats->xdp_stats.tx_xdp_xmit += nxmit; in mtk_xdp_xmit()
2101 hw_stats->xdp_stats.tx_xdp_xmit_errors += num_frame - nxmit; in mtk_xdp_xmit()
2102 u64_stats_update_end(&hw_stats->syncp); in mtk_xdp_xmit()
2111 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_xdp_run()
2112 u64 *count = &hw_stats->xdp_stats.rx_xdp_drop; in mtk_xdp_run()
2118 prog = rcu_dereference(eth->prog); in mtk_xdp_run()
2125 count = &hw_stats->xdp_stats.rx_xdp_pass; in mtk_xdp_run()
2133 count = &hw_stats->xdp_stats.rx_xdp_redirect; in mtk_xdp_run()
2139 count = &hw_stats->xdp_stats.rx_xdp_tx_errors; in mtk_xdp_run()
2144 count = &hw_stats->xdp_stats.rx_xdp_tx; in mtk_xdp_run()
2157 page_pool_put_full_page(ring->page_pool, in mtk_xdp_run()
2158 virt_to_head_page(xdp->data), true); in mtk_xdp_run()
2161 u64_stats_update_begin(&hw_stats->syncp); in mtk_xdp_run()
2163 u64_stats_update_end(&hw_stats->syncp); in mtk_xdp_run()
2195 idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size); in mtk_poll_rx()
2196 rxd = ring->dma + idx * eth->soc->rx.desc_size; in mtk_poll_rx()
2197 data = ring->data[idx]; in mtk_poll_rx()
2209 mac = val - 1; in mtk_poll_rx()
2217 } else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && in mtk_poll_rx()
2219 mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; in mtk_poll_rx()
2223 !eth->netdev[mac])) in mtk_poll_rx()
2226 netdev = eth->netdev[mac]; in mtk_poll_rx()
2227 ppe_idx = eth->mac[mac]->ppe_idx; in mtk_poll_rx()
2229 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_poll_rx()
2235 if (ring->page_pool) { in mtk_poll_rx()
2240 new_data = mtk_page_pool_get_buff(ring->page_pool, in mtk_poll_rx()
2244 netdev->stats.rx_dropped++; in mtk_poll_rx()
2248 dma_sync_single_for_cpu(eth->dma_dev, in mtk_poll_rx()
2250 pktlen, page_pool_get_dma_dir(ring->page_pool)); in mtk_poll_rx()
2252 xdp_init_buff(&xdp, PAGE_SIZE, &ring->xdp_q); in mtk_poll_rx()
2266 page_pool_put_full_page(ring->page_pool, in mtk_poll_rx()
2268 netdev->stats.rx_dropped++; in mtk_poll_rx()
2272 skb_reserve(skb, xdp.data - xdp.data_hard_start); in mtk_poll_rx()
2273 skb_put(skb, xdp.data_end - xdp.data); in mtk_poll_rx()
2274 metasize = xdp.data - xdp.data_meta; in mtk_poll_rx()
2279 if (ring->frag_size <= PAGE_SIZE) in mtk_poll_rx()
2280 new_data = napi_alloc_frag(ring->frag_size); in mtk_poll_rx()
2285 netdev->stats.rx_dropped++; in mtk_poll_rx()
2289 dma_addr = dma_map_single(eth->dma_dev, in mtk_poll_rx()
2290 new_data + NET_SKB_PAD + eth->ip_align, in mtk_poll_rx()
2291 ring->buf_size, DMA_FROM_DEVICE); in mtk_poll_rx()
2292 if (unlikely(dma_mapping_error(eth->dma_dev, in mtk_poll_rx()
2295 netdev->stats.rx_dropped++; in mtk_poll_rx()
2299 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_poll_rx()
2302 dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64), in mtk_poll_rx()
2303 ring->buf_size, DMA_FROM_DEVICE); in mtk_poll_rx()
2305 skb = build_skb(data, ring->frag_size); in mtk_poll_rx()
2307 netdev->stats.rx_dropped++; in mtk_poll_rx()
2316 skb->dev = netdev; in mtk_poll_rx()
2317 bytes += skb->len; in mtk_poll_rx()
2335 if (*rxdcsum & eth->soc->rx.dma_l4_valid) in mtk_poll_rx()
2336 skb->ip_summed = CHECKSUM_UNNECESSARY; in mtk_poll_rx()
2339 skb->protocol = eth_type_trans(skb, netdev); in mtk_poll_rx()
2348 if (port < ARRAY_SIZE(eth->dsa_meta) && in mtk_poll_rx()
2349 eth->dsa_meta[port]) in mtk_poll_rx()
2350 skb_dst_set_noref(skb, ð->dsa_meta[port]->dst); in mtk_poll_rx()
2354 mtk_ppe_check_skb(eth->ppe[ppe_idx], skb, hash); in mtk_poll_rx()
2360 ring->data[idx] = new_data; in mtk_poll_rx()
2361 rxd->rxd1 = (unsigned int)dma_addr; in mtk_poll_rx()
2363 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { in mtk_poll_rx()
2366 rxd->rxd2); in mtk_poll_rx()
2371 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_poll_rx()
2372 rxd->rxd2 = RX_DMA_LSO; in mtk_poll_rx()
2374 rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size) | addr64; in mtk_poll_rx()
2376 ring->calc_idx = idx; in mtk_poll_rx()
2389 eth->rx_packets += done; in mtk_poll_rx()
2390 eth->rx_bytes += bytes; in mtk_poll_rx()
2391 dim_update_sample(eth->rx_events, eth->rx_packets, eth->rx_bytes, in mtk_poll_rx()
2393 net_dim(ð->rx_dim, &dim_sample); in mtk_poll_rx()
2414 unsigned int bytes = skb->len; in mtk_poll_tx_done()
2416 state->total++; in mtk_poll_tx_done()
2417 eth->tx_packets++; in mtk_poll_tx_done()
2418 eth->tx_bytes += bytes; in mtk_poll_tx_done()
2420 dev = eth->netdev[mac]; in mtk_poll_tx_done()
2425 if (state->txq == txq) { in mtk_poll_tx_done()
2426 state->done++; in mtk_poll_tx_done()
2427 state->bytes += bytes; in mtk_poll_tx_done()
2431 if (state->txq) in mtk_poll_tx_done()
2432 netdev_tx_completed_queue(state->txq, state->done, state->bytes); in mtk_poll_tx_done()
2434 state->txq = txq; in mtk_poll_tx_done()
2435 state->done = 1; in mtk_poll_tx_done()
2436 state->bytes = bytes; in mtk_poll_tx_done()
2442 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_poll_tx_qdma()
2443 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx_qdma()
2449 cpu = ring->last_free_ptr; in mtk_poll_tx_qdma()
2450 dma = mtk_r32(eth, reg_map->qdma.drx_ptr); in mtk_poll_tx_qdma()
2456 u32 next_cpu = desc->txd2; in mtk_poll_tx_qdma()
2458 desc = mtk_qdma_phys_to_virt(ring, desc->txd2); in mtk_poll_tx_qdma()
2459 if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) in mtk_poll_tx_qdma()
2463 eth->soc->tx.desc_size); in mtk_poll_tx_qdma()
2464 if (!tx_buf->data) in mtk_poll_tx_qdma()
2467 if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_poll_tx_qdma()
2468 if (tx_buf->type == MTK_TYPE_SKB) in mtk_poll_tx_qdma()
2469 mtk_poll_tx_done(eth, state, tx_buf->mac_id, in mtk_poll_tx_qdma()
2470 tx_buf->data); in mtk_poll_tx_qdma()
2472 budget--; in mtk_poll_tx_qdma()
2476 ring->last_free = desc; in mtk_poll_tx_qdma()
2477 atomic_inc(&ring->free_count); in mtk_poll_tx_qdma()
2483 ring->last_free_ptr = cpu; in mtk_poll_tx_qdma()
2484 mtk_w32(eth, cpu, reg_map->qdma.crx_ptr); in mtk_poll_tx_qdma()
2492 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx_pdma()
2498 cpu = ring->cpu_idx; in mtk_poll_tx_pdma()
2503 tx_buf = &ring->buf[cpu]; in mtk_poll_tx_pdma()
2504 if (!tx_buf->data) in mtk_poll_tx_pdma()
2507 if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_poll_tx_pdma()
2508 if (tx_buf->type == MTK_TYPE_SKB) in mtk_poll_tx_pdma()
2509 mtk_poll_tx_done(eth, state, 0, tx_buf->data); in mtk_poll_tx_pdma()
2510 budget--; in mtk_poll_tx_pdma()
2514 desc = ring->dma + cpu * eth->soc->tx.desc_size; in mtk_poll_tx_pdma()
2515 ring->last_free = desc; in mtk_poll_tx_pdma()
2516 atomic_inc(&ring->free_count); in mtk_poll_tx_pdma()
2518 cpu = NEXT_DESP_IDX(cpu, ring->dma_size); in mtk_poll_tx_pdma()
2522 ring->cpu_idx = cpu; in mtk_poll_tx_pdma()
2529 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx()
2533 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_poll_tx()
2541 dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes, in mtk_poll_tx()
2543 net_dim(ð->tx_dim, &dim_sample); in mtk_poll_tx()
2546 (atomic_read(&ring->free_count) > ring->thresh)) in mtk_poll_tx()
2566 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_tx()
2569 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_napi_tx()
2571 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->tx_irq_status); in mtk_napi_tx()
2575 dev_info(eth->dev, in mtk_napi_tx()
2577 mtk_r32(eth, reg_map->tx_irq_status), in mtk_napi_tx()
2578 mtk_r32(eth, reg_map->tx_irq_mask)); in mtk_napi_tx()
2584 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_napi_tx()
2596 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_rx()
2604 mtk_w32(eth, eth->soc->rx.irq_done_mask, in mtk_napi_rx()
2605 reg_map->pdma.irq_status); in mtk_napi_rx()
2606 rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth); in mtk_napi_rx()
2610 dev_info(eth->dev, in mtk_napi_rx()
2612 mtk_r32(eth, reg_map->pdma.irq_status), in mtk_napi_rx()
2613 mtk_r32(eth, reg_map->pdma.irq_mask)); in mtk_napi_rx()
2619 } while (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_napi_rx()
2620 eth->soc->rx.irq_done_mask); in mtk_napi_rx()
2623 mtk_rx_irq_enable(eth, eth->soc->rx.irq_done_mask); in mtk_napi_rx()
2630 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_alloc()
2631 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_tx_alloc()
2632 int i, sz = soc->tx.desc_size; in mtk_tx_alloc()
2637 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_tx_alloc()
2640 ring_size = soc->tx.dma_size; in mtk_tx_alloc()
2642 ring->buf = kcalloc(ring_size, sizeof(*ring->buf), in mtk_tx_alloc()
2644 if (!ring->buf) in mtk_tx_alloc()
2647 ring->dma = mtk_dma_ring_alloc(eth, ring_size * sz, &ring->phys, true); in mtk_tx_alloc()
2648 if (!ring->dma) in mtk_tx_alloc()
2653 u32 next_ptr = ring->phys + next * sz; in mtk_tx_alloc()
2655 txd = ring->dma + i * sz; in mtk_tx_alloc()
2656 txd->txd2 = next_ptr; in mtk_tx_alloc()
2657 txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_tx_alloc()
2658 txd->txd4 = 0; in mtk_tx_alloc()
2660 txd->txd5 = 0; in mtk_tx_alloc()
2661 txd->txd6 = 0; in mtk_tx_alloc()
2662 txd->txd7 = 0; in mtk_tx_alloc()
2663 txd->txd8 = 0; in mtk_tx_alloc()
2667 /* On MT7688 (PDMA only) this driver uses the ring->dma structs in mtk_tx_alloc()
2669 * descriptors in ring->dma_pdma. in mtk_tx_alloc()
2671 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_alloc()
2672 ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, in mtk_tx_alloc()
2673 &ring->phys_pdma, GFP_KERNEL); in mtk_tx_alloc()
2674 if (!ring->dma_pdma) in mtk_tx_alloc()
2678 ring->dma_pdma[i].txd2 = TX_DMA_DESP2_DEF; in mtk_tx_alloc()
2679 ring->dma_pdma[i].txd4 = 0; in mtk_tx_alloc()
2683 ring->dma_size = ring_size; in mtk_tx_alloc()
2684 atomic_set(&ring->free_count, ring_size - 2); in mtk_tx_alloc()
2685 ring->next_free = ring->dma; in mtk_tx_alloc()
2686 ring->last_free = (void *)txd; in mtk_tx_alloc()
2687 ring->last_free_ptr = (u32)(ring->phys + ((ring_size - 1) * sz)); in mtk_tx_alloc()
2688 ring->thresh = MAX_SKB_FRAGS; in mtk_tx_alloc()
2695 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_alloc()
2696 mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr); in mtk_tx_alloc()
2697 mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr); in mtk_tx_alloc()
2699 ring->phys + ((ring_size - 1) * sz), in mtk_tx_alloc()
2700 soc->reg_map->qdma.crx_ptr); in mtk_tx_alloc()
2701 mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr); in mtk_tx_alloc()
2705 mtk_w32(eth, val, soc->reg_map->qdma.qtx_cfg + ofs); in mtk_tx_alloc()
2714 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_tx_alloc()
2718 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate); in mtk_tx_alloc()
2720 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4); in mtk_tx_alloc()
2722 mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0); in mtk_tx_alloc()
2725 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx); in mtk_tx_alloc()
2731 return -ENOMEM; in mtk_tx_alloc()
2736 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_clean()
2737 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_tx_clean()
2740 if (ring->buf) { in mtk_tx_clean()
2741 for (i = 0; i < ring->dma_size; i++) in mtk_tx_clean()
2742 mtk_tx_unmap(eth, &ring->buf[i], NULL, false); in mtk_tx_clean()
2743 kfree(ring->buf); in mtk_tx_clean()
2744 ring->buf = NULL; in mtk_tx_clean()
2747 if (ring->dma) { in mtk_tx_clean()
2748 mtk_dma_ring_free(eth, ring->dma_size * soc->tx.desc_size, in mtk_tx_clean()
2749 ring->dma, ring->phys, true); in mtk_tx_clean()
2750 ring->dma = NULL; in mtk_tx_clean()
2753 if (ring->dma_pdma) { in mtk_tx_clean()
2754 dma_free_coherent(eth->dma_dev, in mtk_tx_clean()
2755 ring->dma_size * soc->tx.desc_size, in mtk_tx_clean()
2756 ring->dma_pdma, ring->phys_pdma); in mtk_tx_clean()
2757 ring->dma_pdma = NULL; in mtk_tx_clean()
2763 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_rx_alloc()
2764 const struct mtk_soc_data *soc = eth->soc; in mtk_rx_alloc()
2771 return -EINVAL; in mtk_rx_alloc()
2772 ring = ð->rx_ring_qdma; in mtk_rx_alloc()
2774 ring = ð->rx_ring[ring_no]; in mtk_rx_alloc()
2782 rx_dma_size = soc->rx.dma_size; in mtk_rx_alloc()
2785 ring->frag_size = mtk_max_frag_size(rx_data_len); in mtk_rx_alloc()
2786 ring->buf_size = mtk_max_buf_size(ring->frag_size); in mtk_rx_alloc()
2787 ring->data = kcalloc(rx_dma_size, sizeof(*ring->data), in mtk_rx_alloc()
2789 if (!ring->data) in mtk_rx_alloc()
2790 return -ENOMEM; in mtk_rx_alloc()
2795 pp = mtk_create_page_pool(eth, &ring->xdp_q, ring_no, in mtk_rx_alloc()
2800 ring->page_pool = pp; in mtk_rx_alloc()
2803 ring->dma = mtk_dma_ring_alloc(eth, in mtk_rx_alloc()
2804 rx_dma_size * eth->soc->rx.desc_size, in mtk_rx_alloc()
2805 &ring->phys, in mtk_rx_alloc()
2807 if (!ring->dma) in mtk_rx_alloc()
2808 return -ENOMEM; in mtk_rx_alloc()
2815 rxd = ring->dma + i * eth->soc->rx.desc_size; in mtk_rx_alloc()
2816 if (ring->page_pool) { in mtk_rx_alloc()
2817 data = mtk_page_pool_get_buff(ring->page_pool, in mtk_rx_alloc()
2820 return -ENOMEM; in mtk_rx_alloc()
2822 if (ring->frag_size <= PAGE_SIZE) in mtk_rx_alloc()
2823 data = netdev_alloc_frag(ring->frag_size); in mtk_rx_alloc()
2828 return -ENOMEM; in mtk_rx_alloc()
2830 dma_addr = dma_map_single(eth->dma_dev, in mtk_rx_alloc()
2831 data + NET_SKB_PAD + eth->ip_align, in mtk_rx_alloc()
2832 ring->buf_size, DMA_FROM_DEVICE); in mtk_rx_alloc()
2833 if (unlikely(dma_mapping_error(eth->dma_dev, in mtk_rx_alloc()
2836 return -ENOMEM; in mtk_rx_alloc()
2839 rxd->rxd1 = (unsigned int)dma_addr; in mtk_rx_alloc()
2840 ring->data[i] = data; in mtk_rx_alloc()
2842 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_rx_alloc()
2843 rxd->rxd2 = RX_DMA_LSO; in mtk_rx_alloc()
2845 rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); in mtk_rx_alloc()
2847 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_rx_alloc()
2848 rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); in mtk_rx_alloc()
2850 rxd->rxd3 = 0; in mtk_rx_alloc()
2851 rxd->rxd4 = 0; in mtk_rx_alloc()
2853 rxd->rxd5 = 0; in mtk_rx_alloc()
2854 rxd->rxd6 = 0; in mtk_rx_alloc()
2855 rxd->rxd7 = 0; in mtk_rx_alloc()
2856 rxd->rxd8 = 0; in mtk_rx_alloc()
2860 ring->dma_size = rx_dma_size; in mtk_rx_alloc()
2861 ring->calc_idx_update = false; in mtk_rx_alloc()
2862 ring->calc_idx = rx_dma_size - 1; in mtk_rx_alloc()
2864 ring->crx_idx_reg = reg_map->qdma.qcrx_ptr + in mtk_rx_alloc()
2867 ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + in mtk_rx_alloc()
2875 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2876 reg_map->qdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2878 reg_map->qdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2880 reg_map->qdma.rst_idx); in mtk_rx_alloc()
2882 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2883 reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2885 reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2887 reg_map->pdma.rst_idx); in mtk_rx_alloc()
2889 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_rx_alloc()
2899 if (ring->data && ring->dma) { in mtk_rx_clean()
2900 for (i = 0; i < ring->dma_size; i++) { in mtk_rx_clean()
2903 if (!ring->data[i]) in mtk_rx_clean()
2906 rxd = ring->dma + i * eth->soc->rx.desc_size; in mtk_rx_clean()
2907 if (!rxd->rxd1) in mtk_rx_clean()
2910 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_rx_clean()
2911 addr64 = RX_DMA_GET_ADDR64(rxd->rxd2); in mtk_rx_clean()
2913 dma_unmap_single(eth->dma_dev, ((u64)rxd->rxd1 | addr64), in mtk_rx_clean()
2914 ring->buf_size, DMA_FROM_DEVICE); in mtk_rx_clean()
2915 mtk_rx_put_buff(ring, ring->data[i], false); in mtk_rx_clean()
2917 kfree(ring->data); in mtk_rx_clean()
2918 ring->data = NULL; in mtk_rx_clean()
2921 if (ring->dma) { in mtk_rx_clean()
2922 mtk_dma_ring_free(eth, ring->dma_size * eth->soc->rx.desc_size, in mtk_rx_clean()
2923 ring->dma, ring->phys, in_sram); in mtk_rx_clean()
2924 ring->dma = NULL; in mtk_rx_clean()
2927 if (ring->page_pool) { in mtk_rx_clean()
2928 if (xdp_rxq_info_is_reg(&ring->xdp_q)) in mtk_rx_clean()
2929 xdp_rxq_info_unreg(&ring->xdp_q); in mtk_rx_clean()
2930 page_pool_destroy(ring->page_pool); in mtk_rx_clean()
2931 ring->page_pool = NULL; in mtk_rx_clean()
2941 /* set LRO rings to auto-learn modes */ in mtk_hwlro_rx_init()
2973 /* auto-learn score delta setting */ in mtk_hwlro_rx_init()
3054 if (mac->hwlro_ip[i]) in mtk_hwlro_get_ip_cnt()
3065 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_add_ipaddr()
3067 struct mtk_eth *eth = mac->hw; in mtk_hwlro_add_ipaddr()
3070 if ((fsp->flow_type != TCP_V4_FLOW) || in mtk_hwlro_add_ipaddr()
3071 (!fsp->h_u.tcp_ip4_spec.ip4dst) || in mtk_hwlro_add_ipaddr()
3072 (fsp->location > 1)) in mtk_hwlro_add_ipaddr()
3073 return -EINVAL; in mtk_hwlro_add_ipaddr()
3075 mac->hwlro_ip[fsp->location] = htonl(fsp->h_u.tcp_ip4_spec.ip4dst); in mtk_hwlro_add_ipaddr()
3076 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + fsp->location; in mtk_hwlro_add_ipaddr()
3078 mac->hwlro_ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_hwlro_add_ipaddr()
3080 mtk_hwlro_val_ipaddr(eth, hwlro_idx, mac->hwlro_ip[fsp->location]); in mtk_hwlro_add_ipaddr()
3089 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_del_ipaddr()
3091 struct mtk_eth *eth = mac->hw; in mtk_hwlro_del_ipaddr()
3094 if (fsp->location > 1) in mtk_hwlro_del_ipaddr()
3095 return -EINVAL; in mtk_hwlro_del_ipaddr()
3097 mac->hwlro_ip[fsp->location] = 0; in mtk_hwlro_del_ipaddr()
3098 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + fsp->location; in mtk_hwlro_del_ipaddr()
3100 mac->hwlro_ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_hwlro_del_ipaddr()
3110 struct mtk_eth *eth = mac->hw; in mtk_hwlro_netdev_disable()
3114 mac->hwlro_ip[i] = 0; in mtk_hwlro_netdev_disable()
3115 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + i; in mtk_hwlro_netdev_disable()
3120 mac->hwlro_ip_cnt = 0; in mtk_hwlro_netdev_disable()
3128 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_get_fdir_entry()
3130 if (fsp->location >= ARRAY_SIZE(mac->hwlro_ip)) in mtk_hwlro_get_fdir_entry()
3131 return -EINVAL; in mtk_hwlro_get_fdir_entry()
3134 fsp->flow_type = TCP_V4_FLOW; in mtk_hwlro_get_fdir_entry()
3135 fsp->h_u.tcp_ip4_spec.ip4dst = ntohl(mac->hwlro_ip[fsp->location]); in mtk_hwlro_get_fdir_entry()
3136 fsp->m_u.tcp_ip4_spec.ip4dst = 0; in mtk_hwlro_get_fdir_entry()
3138 fsp->h_u.tcp_ip4_spec.ip4src = 0; in mtk_hwlro_get_fdir_entry()
3139 fsp->m_u.tcp_ip4_spec.ip4src = 0xffffffff; in mtk_hwlro_get_fdir_entry()
3140 fsp->h_u.tcp_ip4_spec.psrc = 0; in mtk_hwlro_get_fdir_entry()
3141 fsp->m_u.tcp_ip4_spec.psrc = 0xffff; in mtk_hwlro_get_fdir_entry()
3142 fsp->h_u.tcp_ip4_spec.pdst = 0; in mtk_hwlro_get_fdir_entry()
3143 fsp->m_u.tcp_ip4_spec.pdst = 0xffff; in mtk_hwlro_get_fdir_entry()
3144 fsp->h_u.tcp_ip4_spec.tos = 0; in mtk_hwlro_get_fdir_entry()
3145 fsp->m_u.tcp_ip4_spec.tos = 0xff; in mtk_hwlro_get_fdir_entry()
3159 if (cnt == cmd->rule_cnt) in mtk_hwlro_get_fdir_all()
3160 return -EMSGSIZE; in mtk_hwlro_get_fdir_all()
3162 if (mac->hwlro_ip[i]) { in mtk_hwlro_get_fdir_all()
3168 cmd->rule_cnt = cnt; in mtk_hwlro_get_fdir_all()
3192 netdev_features_t diff = dev->features ^ features; in mtk_set_features()
3207 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dma_busy_wait()
3208 reg = eth->soc->reg_map->qdma.glo_cfg; in mtk_dma_busy_wait()
3210 reg = eth->soc->reg_map->pdma.glo_cfg; in mtk_dma_busy_wait()
3212 ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val, in mtk_dma_busy_wait()
3216 dev_err(eth->dev, "DMA init timeout\n"); in mtk_dma_busy_wait()
3227 return -EBUSY; in mtk_dma_init()
3229 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3242 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3252 if (eth->hwlro) { in mtk_dma_init()
3263 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3268 FC_THRES_MIN, eth->soc->reg_map->qdma.fc_th); in mtk_dma_init()
3269 mtk_w32(eth, 0x0, eth->soc->reg_map->qdma.hred); in mtk_dma_init()
3277 const struct mtk_soc_data *soc = eth->soc; in mtk_dma_free()
3280 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dma_free()
3284 if (!eth->netdev[i]) in mtk_dma_free()
3288 netdev_tx_reset_subqueue(eth->netdev[i], j); in mtk_dma_free()
3291 if (eth->scratch_ring) { in mtk_dma_free()
3292 mtk_dma_ring_free(eth, soc->tx.fq_dma_size * soc->tx.desc_size, in mtk_dma_free()
3293 eth->scratch_ring, eth->phy_scratch_ring, in mtk_dma_free()
3295 eth->scratch_ring = NULL; in mtk_dma_free()
3296 eth->phy_scratch_ring = 0; in mtk_dma_free()
3300 mtk_rx_clean(eth, ð->rx_ring[0], true); in mtk_dma_free()
3301 mtk_rx_clean(eth, ð->rx_ring_qdma, false); in mtk_dma_free()
3303 if (eth->hwlro) { in mtk_dma_free()
3306 mtk_rx_clean(eth, ð->rx_ring[i], false); in mtk_dma_free()
3309 for (i = 0; i < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); i++) { in mtk_dma_free()
3310 kfree(eth->scratch_head[i]); in mtk_dma_free()
3311 eth->scratch_head[i] = NULL; in mtk_dma_free()
3327 struct mtk_eth *eth = mac->hw; in mtk_tx_timeout()
3329 if (test_bit(MTK_RESETTING, ð->state)) in mtk_tx_timeout()
3335 eth->netdev[mac->id]->stats.tx_errors++; in mtk_tx_timeout()
3338 schedule_work(ð->pending_work); in mtk_tx_timeout()
3346 eth->irq[MTK_FE_IRQ_TX] = platform_get_irq_byname_optional(pdev, "fe1"); in mtk_get_irqs()
3347 eth->irq[MTK_FE_IRQ_RX] = platform_get_irq_byname_optional(pdev, "fe2"); in mtk_get_irqs()
3348 if (eth->irq[MTK_FE_IRQ_TX] >= 0 && eth->irq[MTK_FE_IRQ_RX] >= 0) in mtk_get_irqs()
3351 /* only use legacy mode if platform_get_irq_byname_optional returned -ENXIO */ in mtk_get_irqs()
3352 if (eth->irq[MTK_FE_IRQ_TX] != -ENXIO) in mtk_get_irqs()
3353 return dev_err_probe(&pdev->dev, eth->irq[MTK_FE_IRQ_TX], in mtk_get_irqs()
3356 if (eth->irq[MTK_FE_IRQ_RX] != -ENXIO) in mtk_get_irqs()
3357 return dev_err_probe(&pdev->dev, eth->irq[MTK_FE_IRQ_RX], in mtk_get_irqs()
3360 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) in mtk_get_irqs()
3361 dev_warn(&pdev->dev, "legacy DT: missing interrupt-names."); in mtk_get_irqs()
3365 * from devicetree and used for both RX and TX - it is shared. in mtk_get_irqs()
3366 * On SoCs with non-shared IRQs the first entry is not used, in mtk_get_irqs()
3370 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) { in mtk_get_irqs()
3372 eth->irq[MTK_FE_IRQ_SHARED] = platform_get_irq(pdev, i); in mtk_get_irqs()
3374 eth->irq[i] = eth->irq[MTK_FE_IRQ_SHARED]; in mtk_get_irqs()
3376 eth->irq[i] = platform_get_irq(pdev, i + 1); in mtk_get_irqs()
3379 if (eth->irq[i] < 0) { in mtk_get_irqs()
3380 dev_err(&pdev->dev, "no IRQ%d resource found\n", i); in mtk_get_irqs()
3381 return -ENXIO; in mtk_get_irqs()
3392 eth->rx_events++; in mtk_handle_irq_rx()
3393 if (likely(napi_schedule_prep(ð->rx_napi))) { in mtk_handle_irq_rx()
3394 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_handle_irq_rx()
3395 __napi_schedule(ð->rx_napi); in mtk_handle_irq_rx()
3405 eth->tx_events++; in mtk_handle_irq_tx()
3406 if (likely(napi_schedule_prep(ð->tx_napi))) { in mtk_handle_irq_tx()
3408 __napi_schedule(ð->tx_napi); in mtk_handle_irq_tx()
3417 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_handle_irq()
3419 if (mtk_r32(eth, reg_map->pdma.irq_mask) & in mtk_handle_irq()
3420 eth->soc->rx.irq_done_mask) { in mtk_handle_irq()
3421 if (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_handle_irq()
3422 eth->soc->rx.irq_done_mask) in mtk_handle_irq()
3425 if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) { in mtk_handle_irq()
3426 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_handle_irq()
3437 struct mtk_eth *eth = mac->hw; in mtk_poll_controller()
3440 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_poll_controller()
3441 mtk_handle_irq_rx(eth->irq[MTK_FE_IRQ_RX], dev); in mtk_poll_controller()
3443 mtk_rx_irq_enable(eth, eth->soc->rx.irq_done_mask); in mtk_poll_controller()
3450 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_start_dma()
3459 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_start_dma()
3460 val = mtk_r32(eth, reg_map->qdma.glo_cfg); in mtk_start_dma()
3471 mtk_w32(eth, val, reg_map->qdma.glo_cfg); in mtk_start_dma()
3476 reg_map->pdma.glo_cfg); in mtk_start_dma()
3480 reg_map->pdma.glo_cfg); in mtk_start_dma()
3490 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_gdm_config()
3503 if (eth->netdev[id] && netdev_uses_dsa(eth->netdev[id])) in mtk_gdm_config()
3514 dev->dsa_ptr->tag_ops->proto == DSA_TAG_PROTO_MTK; in mtk_uses_dsa()
3523 struct mtk_eth *eth = mac->hw; in mtk_device_event()
3547 if (s.base.speed == 0 || s.base.speed == ((__u32)-1)) in mtk_device_event()
3551 if (dp->index >= MTK_QDMA_NUM_QUEUES) in mtk_device_event()
3554 if (mac->speed > 0 && mac->speed <= s.base.speed) in mtk_device_event()
3557 mtk_set_queue_speed(eth, dp->index + 3, s.base.speed); in mtk_device_event()
3565 struct mtk_eth *eth = mac->hw; in mtk_open()
3569 ppe_num = eth->soc->ppe_num; in mtk_open()
3571 err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0); in mtk_open()
3579 if (!refcount_read(ð->dma_refcnt)) { in mtk_open()
3580 const struct mtk_soc_data *soc = eth->soc; in mtk_open()
3586 phylink_disconnect_phy(mac->phylink); in mtk_open()
3590 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_open()
3591 mtk_ppe_start(eth->ppe[i]); in mtk_open()
3594 if (!eth->netdev[i]) in mtk_open()
3597 target_mac = netdev_priv(eth->netdev[i]); in mtk_open()
3598 if (!soc->offload_version) { in mtk_open()
3599 target_mac->ppe_idx = 0; in mtk_open()
3601 } else if (ppe_num >= 3 && target_mac->id == 2) { in mtk_open()
3602 target_mac->ppe_idx = 2; in mtk_open()
3603 gdm_config = soc->reg_map->gdma_to_ppe[2]; in mtk_open()
3604 } else if (ppe_num >= 2 && target_mac->id == 1) { in mtk_open()
3605 target_mac->ppe_idx = 1; in mtk_open()
3606 gdm_config = soc->reg_map->gdma_to_ppe[1]; in mtk_open()
3608 target_mac->ppe_idx = 0; in mtk_open()
3609 gdm_config = soc->reg_map->gdma_to_ppe[0]; in mtk_open()
3611 mtk_gdm_config(eth, target_mac->id, gdm_config); in mtk_open()
3614 napi_enable(ð->tx_napi); in mtk_open()
3615 napi_enable(ð->rx_napi); in mtk_open()
3617 mtk_rx_irq_enable(eth, soc->rx.irq_done_mask); in mtk_open()
3618 refcount_set(ð->dma_refcnt, 1); in mtk_open()
3620 refcount_inc(ð->dma_refcnt); in mtk_open()
3623 phylink_start(mac->phylink); in mtk_open()
3629 if (mtk_uses_dsa(dev) && !eth->prog) { in mtk_open()
3630 for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) { in mtk_open()
3631 struct metadata_dst *md_dst = eth->dsa_meta[i]; in mtk_open()
3639 return -ENOMEM; in mtk_open()
3641 md_dst->u.port_info.port_id = i; in mtk_open()
3642 eth->dsa_meta[i] = md_dst; in mtk_open()
3665 spin_lock_bh(ð->page_lock); in mtk_stop_dma()
3669 spin_unlock_bh(ð->page_lock); in mtk_stop_dma()
3685 struct mtk_eth *eth = mac->hw; in mtk_stop()
3688 phylink_stop(mac->phylink); in mtk_stop()
3692 phylink_disconnect_phy(mac->phylink); in mtk_stop()
3695 if (!refcount_dec_and_test(ð->dma_refcnt)) in mtk_stop()
3702 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_stop()
3703 napi_disable(ð->tx_napi); in mtk_stop()
3704 napi_disable(ð->rx_napi); in mtk_stop()
3706 cancel_work_sync(ð->rx_dim.work); in mtk_stop()
3707 cancel_work_sync(ð->tx_dim.work); in mtk_stop()
3709 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_stop()
3710 mtk_stop_dma(eth, eth->soc->reg_map->qdma.glo_cfg); in mtk_stop()
3711 mtk_stop_dma(eth, eth->soc->reg_map->pdma.glo_cfg); in mtk_stop()
3715 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_stop()
3716 mtk_ppe_stop(eth->ppe[i]); in mtk_stop()
3725 struct mtk_eth *eth = mac->hw; in mtk_xdp_setup()
3729 if (eth->hwlro) { in mtk_xdp_setup()
3731 return -EOPNOTSUPP; in mtk_xdp_setup()
3734 if (dev->mtu > MTK_PP_MAX_BUF_SIZE) { in mtk_xdp_setup()
3736 return -EOPNOTSUPP; in mtk_xdp_setup()
3739 need_update = !!eth->prog != !!prog; in mtk_xdp_setup()
3743 old_prog = rcu_replace_pointer(eth->prog, prog, lockdep_rtnl_is_held()); in mtk_xdp_setup()
3755 switch (xdp->command) { in mtk_xdp()
3757 return mtk_xdp_setup(dev, xdp->prog, xdp->extack); in mtk_xdp()
3759 return -EINVAL; in mtk_xdp()
3765 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3770 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3780 for (clk = MTK_CLK_MAX - 1; clk >= 0; clk--) in mtk_clk_disable()
3781 clk_disable_unprepare(eth->clks[clk]); in mtk_clk_disable()
3789 ret = clk_prepare_enable(eth->clks[clk]); in mtk_clk_enable()
3797 while (--clk >= 0) in mtk_clk_enable()
3798 clk_disable_unprepare(eth->clks[clk]); in mtk_clk_enable()
3807 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_rx()
3811 cur_profile = net_dim_get_rx_moderation(eth->rx_dim.mode, in mtk_dim_rx()
3812 dim->profile_ix); in mtk_dim_rx()
3813 spin_lock_bh(ð->dim_lock); in mtk_dim_rx()
3815 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_rx()
3825 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_rx()
3826 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dim_rx()
3827 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_rx()
3829 spin_unlock_bh(ð->dim_lock); in mtk_dim_rx()
3831 dim->state = DIM_START_MEASURE; in mtk_dim_rx()
3838 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_tx()
3842 cur_profile = net_dim_get_tx_moderation(eth->tx_dim.mode, in mtk_dim_tx()
3843 dim->profile_ix); in mtk_dim_tx()
3844 spin_lock_bh(ð->dim_lock); in mtk_dim_tx()
3846 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_tx()
3856 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_tx()
3857 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dim_tx()
3858 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_tx()
3860 spin_unlock_bh(ð->dim_lock); in mtk_dim_tx()
3862 dim->state = DIM_START_MEASURE; in mtk_dim_tx()
3867 struct mtk_eth *eth = mac->hw; in mtk_set_mcr_max_rx()
3870 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_set_mcr_max_rx()
3873 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3886 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3894 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); in mtk_hw_reset()
3899 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_reset()
3902 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_hw_reset()
3909 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_reset()
3918 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, in mtk_hw_reset()
3921 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, in mtk_hw_reset()
3929 regmap_read(eth->ethsys, ETHSYS_RSTCTRL, &val); in mtk_hw_reset_read()
3937 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, RSTCTRL_FE, in mtk_hw_warm_reset()
3941 dev_err(eth->dev, "warm reset failed\n"); in mtk_hw_warm_reset()
3948 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_warm_reset()
3950 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_hw_warm_reset()
3956 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_warm_reset()
3962 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask); in mtk_hw_warm_reset()
3967 dev_err(eth->dev, "warm reset stage0 failed %08x (%08x)\n", in mtk_hw_warm_reset()
3971 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, ~rst_mask); in mtk_hw_warm_reset()
3976 dev_err(eth->dev, "warm reset stage1 failed %08x (%08x)\n", in mtk_hw_warm_reset()
3982 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_check_dma_hang()
3990 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_hw_check_dma_hang()
3994 wdidx = mtk_r32(eth, reg_map->wdma_base[0] + 0xc); in mtk_hw_check_dma_hang()
3996 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x204); in mtk_hw_check_dma_hang()
3999 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x230); in mtk_hw_check_dma_hang()
4002 oq_free = (!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(24, 16)) && in mtk_hw_check_dma_hang()
4003 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x4) & GENMASK(8, 0)) && in mtk_hw_check_dma_hang()
4004 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x10) & GENMASK(24, 16))); in mtk_hw_check_dma_hang()
4006 if (wdidx == eth->reset.wdidx && wtx_busy && cdm_full && oq_free) { in mtk_hw_check_dma_hang()
4007 if (++eth->reset.wdma_hang_count > 2) { in mtk_hw_check_dma_hang()
4008 eth->reset.wdma_hang_count = 0; in mtk_hw_check_dma_hang()
4015 qfsm_hang = !!mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x234); in mtk_hw_check_dma_hang()
4016 qfwd_hang = !mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x308); in mtk_hw_check_dma_hang()
4022 gdm1_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x24); in mtk_hw_check_dma_hang()
4023 gdm2_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x64); in mtk_hw_check_dma_hang()
4028 if (++eth->reset.qdma_hang_count > 2) { in mtk_hw_check_dma_hang()
4029 eth->reset.qdma_hang_count = 0; in mtk_hw_check_dma_hang()
4036 oq_hang = !!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(8, 0)); in mtk_hw_check_dma_hang()
4038 adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && in mtk_hw_check_dma_hang()
4039 !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); in mtk_hw_check_dma_hang()
4042 if (++eth->reset.adma_hang_count > 2) { in mtk_hw_check_dma_hang()
4043 eth->reset.adma_hang_count = 0; in mtk_hw_check_dma_hang()
4049 eth->reset.wdma_hang_count = 0; in mtk_hw_check_dma_hang()
4050 eth->reset.qdma_hang_count = 0; in mtk_hw_check_dma_hang()
4051 eth->reset.adma_hang_count = 0; in mtk_hw_check_dma_hang()
4053 eth->reset.wdidx = wdidx; in mtk_hw_check_dma_hang()
4064 if (test_bit(MTK_RESETTING, ð->state)) in mtk_hw_reset_monitor_work()
4069 schedule_work(ð->pending_work); in mtk_hw_reset_monitor_work()
4072 schedule_delayed_work(ð->reset.monitor_work, in mtk_hw_reset_monitor_work()
4080 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_init()
4083 if (!reset && test_and_set_bit(MTK_HW_INIT, ð->state)) in mtk_hw_init()
4087 pm_runtime_enable(eth->dev); in mtk_hw_init()
4088 pm_runtime_get_sync(eth->dev); in mtk_hw_init()
4095 if (eth->ethsys) in mtk_hw_init()
4096 regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, dma_mask, in mtk_hw_init()
4097 of_dma_is_coherent(eth->dma_dev->of_node) * dma_mask); in mtk_hw_init()
4099 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_hw_init()
4100 ret = device_reset(eth->dev); in mtk_hw_init()
4102 dev_err(eth->dev, "MAC reset failed!\n"); in mtk_hw_init()
4107 mtk_dim_rx(ð->rx_dim.work); in mtk_hw_init()
4108 mtk_dim_tx(ð->tx_dim.work); in mtk_hw_init()
4125 if (reset && !MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_hw_init()
4134 if (eth->pctl) { in mtk_hw_init()
4136 regmap_write(eth->pctl, GPIO_DRV_SEL10, 0xa00); in mtk_hw_init()
4139 regmap_write(eth->pctl, GPIO_OD33_CTRL8, 0x5); in mtk_hw_init()
4142 regmap_write(eth->pctl, GPIO_BIAS_CTRL, 0x0); in mtk_hw_init()
4150 struct net_device *dev = eth->netdev[i]; in mtk_hw_init()
4157 dev->mtu + MTK_RX_ETH_HLEN); in mtk_hw_init()
4173 mtk_dim_rx(ð->rx_dim.work); in mtk_hw_init()
4174 mtk_dim_tx(ð->tx_dim.work); in mtk_hw_init()
4181 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp); in mtk_hw_init()
4182 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->pdma.int_grp + 4); in mtk_hw_init()
4183 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp); in mtk_hw_init()
4184 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->qdma.int_grp + 4); in mtk_hw_init()
4219 mtk_r32(eth, reg_map->gdm1_cnt + 0x100 + i); in mtk_hw_init()
4263 pm_runtime_put_sync(eth->dev); in mtk_hw_init()
4264 pm_runtime_disable(eth->dev); in mtk_hw_init()
4272 if (!test_and_clear_bit(MTK_HW_INIT, ð->state)) in mtk_hw_deinit()
4277 pm_runtime_put_sync(eth->dev); in mtk_hw_deinit()
4278 pm_runtime_disable(eth->dev); in mtk_hw_deinit()
4286 struct mtk_eth *eth = mac->hw; in mtk_uninit()
4288 phylink_disconnect_phy(mac->phylink); in mtk_uninit()
4297 struct mtk_eth *eth = mac->hw; in mtk_change_mtu()
4299 if (rcu_access_pointer(eth->prog) && in mtk_change_mtu()
4302 return -EINVAL; in mtk_change_mtu()
4306 WRITE_ONCE(dev->mtu, new_mtu); in mtk_change_mtu()
4319 return phylink_mii_ioctl(mac->phylink, ifr, cmd); in mtk_do_ioctl()
4324 return -EOPNOTSUPP; in mtk_do_ioctl()
4337 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_prepare_for_reset()
4339 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_prepare_for_reset()
4345 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_prepare_for_reset()
4346 mtk_ppe_prepare_reset(eth->ppe[i]); in mtk_prepare_for_reset()
4366 set_bit(MTK_RESETTING, ð->state); in mtk_pending_work()
4377 if (!eth->netdev[i] || !netif_running(eth->netdev[i])) in mtk_pending_work()
4380 mtk_stop(eth->netdev[i]); in mtk_pending_work()
4386 if (eth->dev->pins) in mtk_pending_work()
4387 pinctrl_select_state(eth->dev->pins->p, in mtk_pending_work()
4388 eth->dev->pins->default_state); in mtk_pending_work()
4393 if (!eth->netdev[i] || !test_bit(i, &restart)) in mtk_pending_work()
4396 if (mtk_open(eth->netdev[i])) { in mtk_pending_work()
4397 netif_alert(eth, ifup, eth->netdev[i], in mtk_pending_work()
4399 dev_close(eth->netdev[i]); in mtk_pending_work()
4408 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_pending_work()
4410 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_pending_work()
4416 clear_bit(MTK_RESETTING, ð->state); in mtk_pending_work()
4428 if (!eth->netdev[i]) in mtk_free_dev()
4430 free_netdev(eth->netdev[i]); in mtk_free_dev()
4433 for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) { in mtk_free_dev()
4434 if (!eth->dsa_meta[i]) in mtk_free_dev()
4436 metadata_dst_free(eth->dsa_meta[i]); in mtk_free_dev()
4448 if (!eth->netdev[i]) in mtk_unreg_dev()
4450 mac = netdev_priv(eth->netdev[i]); in mtk_unreg_dev()
4451 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_unreg_dev()
4452 unregister_netdevice_notifier(&mac->device_notifier); in mtk_unreg_dev()
4453 unregister_netdev(eth->netdev[i]); in mtk_unreg_dev()
4464 mtk_pcs_lynxi_destroy(eth->sgmii_pcs[i]); in mtk_sgmii_destroy()
4472 cancel_work_sync(ð->pending_work); in mtk_cleanup()
4473 cancel_delayed_work_sync(ð->reset.monitor_work); in mtk_cleanup()
4483 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_get_link_ksettings()
4484 return -EBUSY; in mtk_get_link_ksettings()
4486 return phylink_ethtool_ksettings_get(mac->phylink, cmd); in mtk_get_link_ksettings()
4494 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_set_link_ksettings()
4495 return -EBUSY; in mtk_set_link_ksettings()
4497 return phylink_ethtool_ksettings_set(mac->phylink, cmd); in mtk_set_link_ksettings()
4505 strscpy(info->driver, mac->hw->dev->driver->name, sizeof(info->driver)); in mtk_get_drvinfo()
4506 strscpy(info->bus_info, dev_name(mac->hw->dev), sizeof(info->bus_info)); in mtk_get_drvinfo()
4507 info->n_stats = ARRAY_SIZE(mtk_ethtool_stats); in mtk_get_drvinfo()
4514 return mac->hw->msg_enable; in mtk_get_msglevel()
4521 mac->hw->msg_enable = value; in mtk_set_msglevel()
4528 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_nway_reset()
4529 return -EBUSY; in mtk_nway_reset()
4531 if (!mac->phylink) in mtk_nway_reset()
4532 return -ENOTSUPP; in mtk_nway_reset()
4534 return phylink_ethtool_nway_reset(mac->phylink); in mtk_nway_reset()
4547 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_strings()
4563 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_sset_count()
4568 return -EOPNOTSUPP; in mtk_get_sset_count()
4577 for (i = 0; i < ARRAY_SIZE(eth->rx_ring); i++) { in mtk_ethtool_pp_stats()
4578 struct mtk_rx_ring *ring = ð->rx_ring[i]; in mtk_ethtool_pp_stats()
4580 if (!ring->page_pool) in mtk_ethtool_pp_stats()
4583 page_pool_get_stats(ring->page_pool, &stats); in mtk_ethtool_pp_stats()
4592 struct mtk_hw_stats *hwstats = mac->hw_stats; in mtk_get_ethtool_stats()
4597 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_get_ethtool_stats()
4601 if (spin_trylock_bh(&hwstats->stats_lock)) { in mtk_get_ethtool_stats()
4603 spin_unlock_bh(&hwstats->stats_lock); in mtk_get_ethtool_stats()
4611 start = u64_stats_fetch_begin(&hwstats->syncp); in mtk_get_ethtool_stats()
4615 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_ethtool_stats()
4616 mtk_ethtool_pp_stats(mac->hw, data_dst); in mtk_get_ethtool_stats()
4617 } while (u64_stats_fetch_retry(&hwstats->syncp, start)); in mtk_get_ethtool_stats()
4623 int ret = -EOPNOTSUPP; in mtk_get_rxnfc()
4625 switch (cmd->cmd) { in mtk_get_rxnfc()
4627 if (dev->hw_features & NETIF_F_LRO) { in mtk_get_rxnfc()
4628 cmd->data = MTK_MAX_RX_RING_NUM; in mtk_get_rxnfc()
4633 if (dev->hw_features & NETIF_F_LRO) { in mtk_get_rxnfc()
4636 cmd->rule_cnt = mac->hwlro_ip_cnt; in mtk_get_rxnfc()
4641 if (dev->hw_features & NETIF_F_LRO) in mtk_get_rxnfc()
4645 if (dev->hw_features & NETIF_F_LRO) in mtk_get_rxnfc()
4658 int ret = -EOPNOTSUPP; in mtk_set_rxnfc()
4660 switch (cmd->cmd) { in mtk_set_rxnfc()
4662 if (dev->hw_features & NETIF_F_LRO) in mtk_set_rxnfc()
4666 if (dev->hw_features & NETIF_F_LRO) in mtk_set_rxnfc()
4680 phylink_ethtool_get_pauseparam(mac->phylink, pause); in mtk_get_pauseparam()
4687 return phylink_ethtool_set_pauseparam(mac->phylink, pause); in mtk_set_pauseparam()
4694 return phylink_ethtool_get_eee(mac->phylink, eee); in mtk_get_eee()
4701 return phylink_ethtool_set_eee(mac->phylink, eee); in mtk_set_eee()
4713 queue = mac->id; in mtk_select_queue()
4715 if (queue >= dev->num_tx_queues) in mtk_select_queue()
4773 dev_err(eth->dev, "missing mac id\n"); in mtk_add_mac()
4774 return -EINVAL; in mtk_add_mac()
4779 dev_err(eth->dev, "%d is not a valid mac id\n", id); in mtk_add_mac()
4780 return -EINVAL; in mtk_add_mac()
4783 if (eth->netdev[id]) { in mtk_add_mac()
4784 dev_err(eth->dev, "duplicate mac id found: %d\n", id); in mtk_add_mac()
4785 return -EINVAL; in mtk_add_mac()
4788 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_add_mac()
4791 eth->netdev[id] = alloc_etherdev_mqs(sizeof(*mac), txqs, 1); in mtk_add_mac()
4792 if (!eth->netdev[id]) { in mtk_add_mac()
4793 dev_err(eth->dev, "alloc_etherdev failed\n"); in mtk_add_mac()
4794 return -ENOMEM; in mtk_add_mac()
4796 mac = netdev_priv(eth->netdev[id]); in mtk_add_mac()
4797 eth->mac[id] = mac; in mtk_add_mac()
4798 mac->id = id; in mtk_add_mac()
4799 mac->hw = eth; in mtk_add_mac()
4800 mac->of_node = np; in mtk_add_mac()
4802 err = of_get_ethdev_address(mac->of_node, eth->netdev[id]); in mtk_add_mac()
4803 if (err == -EPROBE_DEFER) in mtk_add_mac()
4808 eth_hw_addr_random(eth->netdev[id]); in mtk_add_mac()
4809 dev_err(eth->dev, "generated random MAC address %pM\n", in mtk_add_mac()
4810 eth->netdev[id]->dev_addr); in mtk_add_mac()
4813 memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip)); in mtk_add_mac()
4814 mac->hwlro_ip_cnt = 0; in mtk_add_mac()
4816 mac->hw_stats = devm_kzalloc(eth->dev, in mtk_add_mac()
4817 sizeof(*mac->hw_stats), in mtk_add_mac()
4819 if (!mac->hw_stats) { in mtk_add_mac()
4820 dev_err(eth->dev, "failed to allocate counter memory\n"); in mtk_add_mac()
4821 err = -ENOMEM; in mtk_add_mac()
4824 spin_lock_init(&mac->hw_stats->stats_lock); in mtk_add_mac()
4825 u64_stats_init(&mac->hw_stats->syncp); in mtk_add_mac()
4828 mac->hw_stats->reg_offset = id * 0x80; in mtk_add_mac()
4830 mac->hw_stats->reg_offset = id * 0x40; in mtk_add_mac()
4835 dev_err(eth->dev, "incorrect phy-mode\n"); in mtk_add_mac()
4840 mac->interface = PHY_INTERFACE_MODE_NA; in mtk_add_mac()
4841 mac->speed = SPEED_UNKNOWN; in mtk_add_mac()
4843 mac->phylink_config.dev = ð->netdev[id]->dev; in mtk_add_mac()
4844 mac->phylink_config.type = PHYLINK_NETDEV; in mtk_add_mac()
4845 mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | in mtk_add_mac()
4847 mac->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD | in mtk_add_mac()
4849 mac->phylink_config.lpi_timer_default = 1000; in mtk_add_mac()
4851 /* MT7623 gmac0 is now missing its speed-specific PLL configuration in mtk_add_mac()
4852 * in its .mac_config method (since state->speed is not valid there. in mtk_add_mac()
4855 if (!mac->hw->soc->disable_pll_modes || mac->id != 0) { in mtk_add_mac()
4857 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4859 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4861 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) in mtk_add_mac()
4862 phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); in mtk_add_mac()
4865 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id) in mtk_add_mac()
4867 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4870 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) && in mtk_add_mac()
4871 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII_MT7621_CLK)) { in mtk_add_mac()
4872 regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val); in mtk_add_mac()
4875 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4878 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) { in mtk_add_mac()
4880 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4882 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4884 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4887 if (mtk_is_netsys_v3_or_greater(mac->hw) && in mtk_add_mac()
4888 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_ESW) && in mtk_add_mac()
4890 mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | in mtk_add_mac()
4893 phy_interface_zero(mac->phylink_config.supported_interfaces); in mtk_add_mac()
4895 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4898 phylink = phylink_create(&mac->phylink_config, in mtk_add_mac()
4899 of_fwnode_handle(mac->of_node), in mtk_add_mac()
4906 mac->phylink = phylink; in mtk_add_mac()
4908 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_2P5GPHY) && in mtk_add_mac()
4911 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4913 SET_NETDEV_DEV(eth->netdev[id], eth->dev); in mtk_add_mac()
4914 eth->netdev[id]->watchdog_timeo = 5 * HZ; in mtk_add_mac()
4915 eth->netdev[id]->netdev_ops = &mtk_netdev_ops; in mtk_add_mac()
4916 eth->netdev[id]->base_addr = (unsigned long)eth->base; in mtk_add_mac()
4918 eth->netdev[id]->hw_features = eth->soc->hw_features; in mtk_add_mac()
4919 if (eth->hwlro) in mtk_add_mac()
4920 eth->netdev[id]->hw_features |= NETIF_F_LRO; in mtk_add_mac()
4922 eth->netdev[id]->vlan_features = eth->soc->hw_features & in mtk_add_mac()
4924 eth->netdev[id]->features |= eth->soc->hw_features; in mtk_add_mac()
4925 eth->netdev[id]->ethtool_ops = &mtk_ethtool_ops; in mtk_add_mac()
4927 eth->netdev[id]->irq = eth->irq[MTK_FE_IRQ_SHARED]; in mtk_add_mac()
4928 eth->netdev[id]->dev.of_node = np; in mtk_add_mac()
4930 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_add_mac()
4931 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN; in mtk_add_mac()
4933 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; in mtk_add_mac()
4935 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_add_mac()
4936 mac->device_notifier.notifier_call = mtk_device_event; in mtk_add_mac()
4937 register_netdevice_notifier(&mac->device_notifier); in mtk_add_mac()
4941 eth->netdev[id]->xdp_features = NETDEV_XDP_ACT_BASIC | in mtk_add_mac()
4949 free_netdev(eth->netdev[id]); in mtk_add_mac()
4962 dev = eth->netdev[i]; in mtk_eth_set_dma_device()
4964 if (!dev || !(dev->flags & IFF_UP)) in mtk_eth_set_dma_device()
4967 list_add_tail(&dev->close_list, &dev_list); in mtk_eth_set_dma_device()
4972 eth->dma_dev = dma_dev; in mtk_eth_set_dma_device()
4975 list_del_init(&dev->close_list); in mtk_eth_set_dma_device()
4990 np = of_parse_phandle(eth->dev->of_node, "mediatek,sgmiisys", i); in mtk_sgmii_init()
5004 eth->sgmii_pcs[i] = mtk_pcs_lynxi_create(eth->dev, regmap, in mtk_sgmii_init()
5005 eth->soc->ana_rgc3, in mtk_sgmii_init()
5014 dev_warn(eth->dev, "legacy DT: using hard-coded SRAM offset.\n"); in mtk_setup_legacy_sram()
5016 if (res->start + MTK_ETH_SRAM_OFFSET + MTK_ETH_NETSYS_V2_SRAM_SIZE - 1 > in mtk_setup_legacy_sram()
5017 res->end) in mtk_setup_legacy_sram()
5018 return -EINVAL; in mtk_setup_legacy_sram()
5020 eth->sram_pool = devm_gen_pool_create(eth->dev, in mtk_setup_legacy_sram()
5022 NUMA_NO_NODE, dev_name(eth->dev)); in mtk_setup_legacy_sram()
5024 if (IS_ERR(eth->sram_pool)) in mtk_setup_legacy_sram()
5025 return PTR_ERR(eth->sram_pool); in mtk_setup_legacy_sram()
5027 return gen_pool_add_virt(eth->sram_pool, in mtk_setup_legacy_sram()
5028 (unsigned long)eth->base + MTK_ETH_SRAM_OFFSET, in mtk_setup_legacy_sram()
5029 res->start + MTK_ETH_SRAM_OFFSET, in mtk_setup_legacy_sram()
5040 eth = devm_kzalloc(&pdev->dev, sizeof(*eth), GFP_KERNEL); in mtk_probe()
5042 return -ENOMEM; in mtk_probe()
5044 eth->soc = of_device_get_match_data(&pdev->dev); in mtk_probe()
5046 eth->dev = &pdev->dev; in mtk_probe()
5047 eth->dma_dev = &pdev->dev; in mtk_probe()
5048 eth->base = devm_platform_ioremap_resource(pdev, 0); in mtk_probe()
5049 if (IS_ERR(eth->base)) in mtk_probe()
5050 return PTR_ERR(eth->base); in mtk_probe()
5052 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_probe()
5053 eth->ip_align = NET_IP_ALIGN; in mtk_probe()
5055 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { in mtk_probe()
5056 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(36)); in mtk_probe()
5058 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); in mtk_probe()
5061 dev_err(&pdev->dev, "Wrong DMA config\n"); in mtk_probe()
5062 return -EINVAL; in mtk_probe()
5066 spin_lock_init(ð->page_lock); in mtk_probe()
5067 spin_lock_init(ð->tx_irq_lock); in mtk_probe()
5068 spin_lock_init(ð->rx_irq_lock); in mtk_probe()
5069 spin_lock_init(ð->dim_lock); in mtk_probe()
5071 eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in mtk_probe()
5072 INIT_WORK(ð->rx_dim.work, mtk_dim_rx); in mtk_probe()
5073 INIT_DELAYED_WORK(ð->reset.monitor_work, mtk_hw_reset_monitor_work); in mtk_probe()
5075 eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in mtk_probe()
5076 INIT_WORK(ð->tx_dim.work, mtk_dim_tx); in mtk_probe()
5078 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_probe()
5079 eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
5081 if (IS_ERR(eth->ethsys)) { in mtk_probe()
5082 dev_err(&pdev->dev, "no ethsys regmap found\n"); in mtk_probe()
5083 return PTR_ERR(eth->ethsys); in mtk_probe()
5087 if (MTK_HAS_CAPS(eth->soc->caps, MTK_INFRA)) { in mtk_probe()
5088 eth->infra = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
5090 if (IS_ERR(eth->infra)) { in mtk_probe()
5091 dev_err(&pdev->dev, "no infracfg regmap found\n"); in mtk_probe()
5092 return PTR_ERR(eth->infra); in mtk_probe()
5096 if (of_dma_is_coherent(pdev->dev.of_node)) { in mtk_probe()
5099 cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
5100 "cci-control-port"); in mtk_probe()
5106 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { in mtk_probe()
5113 if (eth->soc->required_pctl) { in mtk_probe()
5114 eth->pctl = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
5116 if (IS_ERR(eth->pctl)) { in mtk_probe()
5117 dev_err(&pdev->dev, "no pctl regmap found\n"); in mtk_probe()
5118 err = PTR_ERR(eth->pctl); in mtk_probe()
5126 err = -EINVAL; in mtk_probe()
5130 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { in mtk_probe()
5131 eth->sram_pool = of_gen_pool_get(pdev->dev.of_node, in mtk_probe()
5133 if (!eth->sram_pool) { in mtk_probe()
5139 dev_err(&pdev->dev, in mtk_probe()
5141 err = -EINVAL; in mtk_probe()
5148 if (eth->soc->offload_version) { in mtk_probe()
5154 if (i >= ARRAY_SIZE(eth->soc->reg_map->wdma_base)) in mtk_probe()
5157 np = of_parse_phandle(pdev->dev.of_node, in mtk_probe()
5162 wdma_base = eth->soc->reg_map->wdma_base[i]; in mtk_probe()
5163 wdma_phy = res ? res->start + wdma_base : 0; in mtk_probe()
5164 mtk_wed_add_hw(np, eth, eth->base + wdma_base, in mtk_probe()
5173 for (i = 0; i < ARRAY_SIZE(eth->clks); i++) { in mtk_probe()
5174 eth->clks[i] = devm_clk_get(eth->dev, in mtk_probe()
5176 if (IS_ERR(eth->clks[i])) { in mtk_probe()
5177 if (PTR_ERR(eth->clks[i]) == -EPROBE_DEFER) { in mtk_probe()
5178 err = -EPROBE_DEFER; in mtk_probe()
5181 if (eth->soc->required_clks & BIT(i)) { in mtk_probe()
5182 dev_err(&pdev->dev, "clock %s not found\n", in mtk_probe()
5184 err = -EINVAL; in mtk_probe()
5187 eth->clks[i] = NULL; in mtk_probe()
5191 eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE); in mtk_probe()
5192 INIT_WORK(ð->pending_work, mtk_pending_work); in mtk_probe()
5198 eth->hwlro = MTK_HAS_CAPS(eth->soc->caps, MTK_HWLRO); in mtk_probe()
5200 for_each_child_of_node(pdev->dev.of_node, mac_np) { in mtk_probe()
5202 "mediatek,eth-mac")) in mtk_probe()
5215 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) { in mtk_probe()
5216 err = devm_request_irq(eth->dev, eth->irq[MTK_FE_IRQ_SHARED], in mtk_probe()
5218 dev_name(eth->dev), eth); in mtk_probe()
5220 err = devm_request_irq(eth->dev, eth->irq[MTK_FE_IRQ_TX], in mtk_probe()
5222 dev_name(eth->dev), eth); in mtk_probe()
5226 err = devm_request_irq(eth->dev, eth->irq[MTK_FE_IRQ_RX], in mtk_probe()
5228 dev_name(eth->dev), eth); in mtk_probe()
5234 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_probe()
5240 if (eth->soc->offload_version) { in mtk_probe()
5241 u8 ppe_num = eth->soc->ppe_num; in mtk_probe()
5243 ppe_num = min_t(u8, ARRAY_SIZE(eth->ppe), ppe_num); in mtk_probe()
5245 u32 ppe_addr = eth->soc->reg_map->ppe_base; in mtk_probe()
5248 eth->ppe[i] = mtk_ppe_init(eth, eth->base + ppe_addr, i); in mtk_probe()
5250 if (!eth->ppe[i]) { in mtk_probe()
5251 err = -ENOMEM; in mtk_probe()
5262 if (!eth->netdev[i]) in mtk_probe()
5265 err = register_netdev(eth->netdev[i]); in mtk_probe()
5267 dev_err(eth->dev, "error bringing up device\n"); in mtk_probe()
5270 netif_info(eth, probe, eth->netdev[i], in mtk_probe()
5272 eth->netdev[i]->base_addr, eth->irq[MTK_FE_IRQ_SHARED]); in mtk_probe()
5278 eth->dummy_dev = alloc_netdev_dummy(0); in mtk_probe()
5279 if (!eth->dummy_dev) { in mtk_probe()
5280 err = -ENOMEM; in mtk_probe()
5281 dev_err(eth->dev, "failed to allocated dummy device\n"); in mtk_probe()
5284 netif_napi_add(eth->dummy_dev, ð->tx_napi, mtk_napi_tx); in mtk_probe()
5285 netif_napi_add(eth->dummy_dev, ð->rx_napi, mtk_napi_rx); in mtk_probe()
5288 schedule_delayed_work(ð->reset.monitor_work, in mtk_probe()
5318 if (!eth->netdev[i]) in mtk_remove()
5320 mtk_stop(eth->netdev[i]); in mtk_remove()
5321 mac = netdev_priv(eth->netdev[i]); in mtk_remove()
5322 phylink_disconnect_phy(mac->phylink); in mtk_remove()
5328 netif_napi_del(ð->tx_napi); in mtk_remove()
5329 netif_napi_del(ð->rx_napi); in mtk_remove()
5331 free_netdev(eth->dummy_dev); in mtk_remove()
5586 { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data },
5587 { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data },
5588 { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data },
5589 { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data },
5590 { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data },
5591 { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data },
5592 { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data },
5593 { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data },
5594 { .compatible = "ralink,rt5350-eth", .data = &rt5350_data },