Lines Matching +full:mt7986 +full:- +full:wed
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2009-2016 John Crispin <blogic@openwrt.org>
5 * Copyright (C) 2009-2016 Felix Fietkau <nbd@openwrt.org>
6 * Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
24 #include <linux/pcs/pcs-mtk-lynxi.h>
34 static int mtk_msg_level = -1;
36 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
294 __raw_writel(val, eth->base + reg); in mtk_w32()
299 return __raw_readl(eth->base + reg); in mtk_r32()
325 dev_err(eth->dev, "mdio: MDIO timeout\n"); in mtk_mdio_busy_wait()
326 return -ETIMEDOUT; in mtk_mdio_busy_wait()
449 struct mtk_eth *eth = bus->priv; in mtk_mdio_write_c22()
457 struct mtk_eth *eth = bus->priv; in mtk_mdio_write_c45()
464 struct mtk_eth *eth = bus->priv; in mtk_mdio_read_c22()
472 struct mtk_eth *eth = bus->priv; in mtk_mdio_read_c45()
485 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mt7621_gmac0_rgmii_adjust()
498 ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 500000000); in mtk_gmac0_rgmii_adjust()
500 dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret); in mtk_gmac0_rgmii_adjust()
504 dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); in mtk_gmac0_rgmii_adjust()
525 struct mtk_eth *eth = mac->hw; in mtk_mac_select_pcs()
530 sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? in mtk_mac_select_pcs()
531 0 : mac->id; in mtk_mac_select_pcs()
533 return eth->sgmii_pcs[sid]; in mtk_mac_select_pcs()
544 struct mtk_eth *eth = mac->hw; in mtk_mac_config()
549 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && in mtk_mac_config()
550 mac->interface != state->interface) { in mtk_mac_config()
552 switch (state->interface) { in mtk_mac_config()
559 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RGMII)) { in mtk_mac_config()
560 err = mtk_gmac_rgmii_path_setup(eth, mac->id); in mtk_mac_config()
568 err = mtk_gmac_sgmii_path_setup(eth, mac->id); in mtk_mac_config()
573 if (MTK_HAS_CAPS(eth->soc->caps, MTK_GEPHY)) { in mtk_mac_config()
574 err = mtk_gmac_gephy_path_setup(eth, mac->id); in mtk_mac_config()
586 if (!mac->id && state->interface != PHY_INTERFACE_MODE_SGMII && in mtk_mac_config()
587 !phy_interface_mode_is_8023z(state->interface) && in mtk_mac_config()
588 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII)) { in mtk_mac_config()
589 if (MTK_HAS_CAPS(mac->hw->soc->caps, in mtk_mac_config()
591 if (mt7621_gmac0_rgmii_adjust(mac->hw, in mtk_mac_config()
592 state->interface)) in mtk_mac_config()
595 mtk_gmac0_rgmii_adjust(mac->hw, in mtk_mac_config()
596 state->interface); in mtk_mac_config()
600 mtk_w32(mac->hw, in mtk_mac_config()
605 mtk_m32(mac->hw, 0, RXC_RST | RXC_DQSISEL, in mtk_mac_config()
607 mtk_m32(mac->hw, RXC_RST, 0, TRGMII_RCK_CTRL); in mtk_mac_config()
611 switch (state->interface) { in mtk_mac_config()
622 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
623 val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id); in mtk_mac_config()
624 val |= SYSCFG0_GE_MODE(ge_mode, mac->id); in mtk_mac_config()
625 regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); in mtk_mac_config()
627 mac->interface = state->interface; in mtk_mac_config()
631 if (state->interface == PHY_INTERFACE_MODE_SGMII || in mtk_mac_config()
632 phy_interface_mode_is_8023z(state->interface)) { in mtk_mac_config()
636 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
638 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
643 mac->syscfg0 = val; in mtk_mac_config()
645 dev_err(eth->dev, in mtk_mac_config()
646 "In-band mode not supported in non SGMII mode!\n"); in mtk_mac_config()
652 mac->interface == PHY_INTERFACE_MODE_INTERNAL) { in mtk_mac_config()
653 mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); in mtk_mac_config()
654 mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); in mtk_mac_config()
662 dev_err(eth->dev, "%s: GMAC%d mode %s not supported!\n", __func__, in mtk_mac_config()
663 mac->id, phy_modes(state->interface)); in mtk_mac_config()
667 dev_err(eth->dev, "%s: GMAC%d mode %s err: %d!\n", __func__, in mtk_mac_config()
668 mac->id, phy_modes(state->interface), err); in mtk_mac_config()
676 struct mtk_eth *eth = mac->hw; in mtk_mac_finish()
682 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_finish()
683 SYSCFG0_SGMII_MASK, mac->syscfg0); in mtk_mac_finish()
686 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
693 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
703 u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
706 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
712 const struct mtk_soc_data *soc = eth->soc; in mtk_set_queue_speed()
715 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_set_queue_speed()
775 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_set_queue_speed()
787 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_link_up()
793 mac->speed = speed; in mtk_mac_link_up()
808 /* Configure pause modes - phylink will avoid these for half duplex */ in mtk_mac_link_up()
815 mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); in mtk_mac_link_up()
822 struct mtk_eth *eth = mac->hw; in mtk_mac_disable_tx_lpi()
824 mtk_m32(eth, MAC_MCR_EEE100M | MAC_MCR_EEE1G, 0, MTK_MAC_MCR(mac->id)); in mtk_mac_disable_tx_lpi()
832 struct mtk_eth *eth = mac->hw; in mtk_mac_enable_tx_lpi()
852 /* PHY Wake-up time, this field does not have a reset value, so use the in mtk_mac_enable_tx_lpi()
858 mtk_w32(eth, val, MTK_MAC_EEECR(mac->id)); in mtk_mac_enable_tx_lpi()
859 mtk_m32(eth, 0, MAC_MCR_EEE100M | MAC_MCR_EEE1G, MTK_MAC_MCR(mac->id)); in mtk_mac_enable_tx_lpi()
881 mii_np = of_get_available_child_by_name(eth->dev->of_node, "mdio-bus"); in mtk_mdio_init()
883 dev_err(eth->dev, "no %s child node found", "mdio-bus"); in mtk_mdio_init()
884 return -ENODEV; in mtk_mdio_init()
887 eth->mii_bus = devm_mdiobus_alloc(eth->dev); in mtk_mdio_init()
888 if (!eth->mii_bus) { in mtk_mdio_init()
889 ret = -ENOMEM; in mtk_mdio_init()
893 eth->mii_bus->name = "mdio"; in mtk_mdio_init()
894 eth->mii_bus->read = mtk_mdio_read_c22; in mtk_mdio_init()
895 eth->mii_bus->write = mtk_mdio_write_c22; in mtk_mdio_init()
896 eth->mii_bus->read_c45 = mtk_mdio_read_c45; in mtk_mdio_init()
897 eth->mii_bus->write_c45 = mtk_mdio_write_c45; in mtk_mdio_init()
898 eth->mii_bus->priv = eth; in mtk_mdio_init()
899 eth->mii_bus->parent = eth->dev; in mtk_mdio_init()
901 snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%pOFn", mii_np); in mtk_mdio_init()
903 if (!of_property_read_u32(mii_np, "clock-frequency", &val)) { in mtk_mdio_init()
905 dev_err(eth->dev, "MDIO clock frequency out of range"); in mtk_mdio_init()
906 ret = -EINVAL; in mtk_mdio_init()
923 dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider); in mtk_mdio_init()
925 ret = of_mdiobus_register(eth->mii_bus, mii_np); in mtk_mdio_init()
934 if (!eth->mii_bus) in mtk_mdio_cleanup()
937 mdiobus_unregister(eth->mii_bus); in mtk_mdio_cleanup()
945 spin_lock_irqsave(ð->tx_irq_lock, flags); in mtk_tx_irq_disable()
946 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
947 mtk_w32(eth, val & ~mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
948 spin_unlock_irqrestore(ð->tx_irq_lock, flags); in mtk_tx_irq_disable()
956 spin_lock_irqsave(ð->tx_irq_lock, flags); in mtk_tx_irq_enable()
957 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
958 mtk_w32(eth, val | mask, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
959 spin_unlock_irqrestore(ð->tx_irq_lock, flags); in mtk_tx_irq_enable()
967 spin_lock_irqsave(ð->rx_irq_lock, flags); in mtk_rx_irq_disable()
968 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
969 mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
970 spin_unlock_irqrestore(ð->rx_irq_lock, flags); in mtk_rx_irq_disable()
978 spin_lock_irqsave(ð->rx_irq_lock, flags); in mtk_rx_irq_enable()
979 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
980 mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
981 spin_unlock_irqrestore(ð->rx_irq_lock, flags); in mtk_rx_irq_enable()
988 struct mtk_eth *eth = mac->hw; in mtk_set_mac_address()
989 const char *macaddr = dev->dev_addr; in mtk_set_mac_address()
994 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_set_mac_address()
995 return -EBUSY; in mtk_set_mac_address()
997 spin_lock_bh(&mac->hw->page_lock); in mtk_set_mac_address()
998 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_set_mac_address()
999 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
1001 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
1005 mtk_w32(mac->hw, (macaddr[0] << 8) | macaddr[1], in mtk_set_mac_address()
1006 MTK_GDMA_MAC_ADRH(mac->id)); in mtk_set_mac_address()
1007 mtk_w32(mac->hw, (macaddr[2] << 24) | (macaddr[3] << 16) | in mtk_set_mac_address()
1009 MTK_GDMA_MAC_ADRL(mac->id)); in mtk_set_mac_address()
1011 spin_unlock_bh(&mac->hw->page_lock); in mtk_set_mac_address()
1018 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_stats_update_mac()
1019 struct mtk_eth *eth = mac->hw; in mtk_stats_update_mac()
1021 u64_stats_update_begin(&hw_stats->syncp); in mtk_stats_update_mac()
1023 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_stats_update_mac()
1024 hw_stats->tx_packets += mtk_r32(mac->hw, MT7628_SDM_TPCNT); in mtk_stats_update_mac()
1025 hw_stats->tx_bytes += mtk_r32(mac->hw, MT7628_SDM_TBCNT); in mtk_stats_update_mac()
1026 hw_stats->rx_packets += mtk_r32(mac->hw, MT7628_SDM_RPCNT); in mtk_stats_update_mac()
1027 hw_stats->rx_bytes += mtk_r32(mac->hw, MT7628_SDM_RBCNT); in mtk_stats_update_mac()
1028 hw_stats->rx_checksum_errors += in mtk_stats_update_mac()
1029 mtk_r32(mac->hw, MT7628_SDM_CS_ERR); in mtk_stats_update_mac()
1031 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_stats_update_mac()
1032 unsigned int offs = hw_stats->reg_offset; in mtk_stats_update_mac()
1035 hw_stats->rx_bytes += mtk_r32(mac->hw, reg_map->gdm1_cnt + offs); in mtk_stats_update_mac()
1036 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x4 + offs); in mtk_stats_update_mac()
1038 hw_stats->rx_bytes += (stats << 32); in mtk_stats_update_mac()
1039 hw_stats->rx_packets += in mtk_stats_update_mac()
1040 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x8 + offs); in mtk_stats_update_mac()
1041 hw_stats->rx_overflow += in mtk_stats_update_mac()
1042 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x10 + offs); in mtk_stats_update_mac()
1043 hw_stats->rx_fcs_errors += in mtk_stats_update_mac()
1044 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x14 + offs); in mtk_stats_update_mac()
1045 hw_stats->rx_short_errors += in mtk_stats_update_mac()
1046 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x18 + offs); in mtk_stats_update_mac()
1047 hw_stats->rx_long_errors += in mtk_stats_update_mac()
1048 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x1c + offs); in mtk_stats_update_mac()
1049 hw_stats->rx_checksum_errors += in mtk_stats_update_mac()
1050 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); in mtk_stats_update_mac()
1051 hw_stats->rx_flow_control_packets += in mtk_stats_update_mac()
1052 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); in mtk_stats_update_mac()
1055 hw_stats->tx_skip += in mtk_stats_update_mac()
1056 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x50 + offs); in mtk_stats_update_mac()
1057 hw_stats->tx_collisions += in mtk_stats_update_mac()
1058 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x54 + offs); in mtk_stats_update_mac()
1059 hw_stats->tx_bytes += in mtk_stats_update_mac()
1060 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x40 + offs); in mtk_stats_update_mac()
1061 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x44 + offs); in mtk_stats_update_mac()
1063 hw_stats->tx_bytes += (stats << 32); in mtk_stats_update_mac()
1064 hw_stats->tx_packets += in mtk_stats_update_mac()
1065 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x48 + offs); in mtk_stats_update_mac()
1067 hw_stats->tx_skip += in mtk_stats_update_mac()
1068 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x28 + offs); in mtk_stats_update_mac()
1069 hw_stats->tx_collisions += in mtk_stats_update_mac()
1070 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x2c + offs); in mtk_stats_update_mac()
1071 hw_stats->tx_bytes += in mtk_stats_update_mac()
1072 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x30 + offs); in mtk_stats_update_mac()
1073 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x34 + offs); in mtk_stats_update_mac()
1075 hw_stats->tx_bytes += (stats << 32); in mtk_stats_update_mac()
1076 hw_stats->tx_packets += in mtk_stats_update_mac()
1077 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); in mtk_stats_update_mac()
1081 u64_stats_update_end(&hw_stats->syncp); in mtk_stats_update_mac()
1089 if (!eth->mac[i] || !eth->mac[i]->hw_stats) in mtk_stats_update()
1091 if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { in mtk_stats_update()
1092 mtk_stats_update_mac(eth->mac[i]); in mtk_stats_update()
1093 spin_unlock(ð->mac[i]->hw_stats->stats_lock); in mtk_stats_update()
1102 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_get_stats64()
1106 if (spin_trylock_bh(&hw_stats->stats_lock)) { in mtk_get_stats64()
1108 spin_unlock_bh(&hw_stats->stats_lock); in mtk_get_stats64()
1113 start = u64_stats_fetch_begin(&hw_stats->syncp); in mtk_get_stats64()
1114 storage->rx_packets = hw_stats->rx_packets; in mtk_get_stats64()
1115 storage->tx_packets = hw_stats->tx_packets; in mtk_get_stats64()
1116 storage->rx_bytes = hw_stats->rx_bytes; in mtk_get_stats64()
1117 storage->tx_bytes = hw_stats->tx_bytes; in mtk_get_stats64()
1118 storage->collisions = hw_stats->tx_collisions; in mtk_get_stats64()
1119 storage->rx_length_errors = hw_stats->rx_short_errors + in mtk_get_stats64()
1120 hw_stats->rx_long_errors; in mtk_get_stats64()
1121 storage->rx_over_errors = hw_stats->rx_overflow; in mtk_get_stats64()
1122 storage->rx_crc_errors = hw_stats->rx_fcs_errors; in mtk_get_stats64()
1123 storage->rx_errors = hw_stats->rx_checksum_errors; in mtk_get_stats64()
1124 storage->tx_aborted_errors = hw_stats->tx_skip; in mtk_get_stats64()
1125 } while (u64_stats_fetch_retry(&hw_stats->syncp, start)); in mtk_get_stats64()
1127 storage->tx_errors = dev->stats.tx_errors; in mtk_get_stats64()
1128 storage->rx_dropped = dev->stats.rx_dropped; in mtk_get_stats64()
1129 storage->tx_dropped = dev->stats.tx_dropped; in mtk_get_stats64()
1136 mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; in mtk_max_frag_size()
1144 int buf_size = frag_size - NET_SKB_PAD - NET_IP_ALIGN - in mtk_max_buf_size()
1155 rxd->rxd2 = READ_ONCE(dma_rxd->rxd2); in mtk_rx_get_desc()
1156 if (!(rxd->rxd2 & RX_DMA_DONE)) in mtk_rx_get_desc()
1159 rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); in mtk_rx_get_desc()
1160 rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); in mtk_rx_get_desc()
1161 rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); in mtk_rx_get_desc()
1163 rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); in mtk_rx_get_desc()
1164 rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); in mtk_rx_get_desc()
1184 const struct mtk_soc_data *soc = eth->soc; in mtk_init_fq_dma()
1186 int cnt = soc->tx.fq_dma_size; in mtk_init_fq_dma()
1190 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) in mtk_init_fq_dma()
1191 eth->scratch_ring = eth->sram_base; in mtk_init_fq_dma()
1193 eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, in mtk_init_fq_dma()
1194 cnt * soc->tx.desc_size, in mtk_init_fq_dma()
1195 ð->phy_scratch_ring, in mtk_init_fq_dma()
1198 if (unlikely(!eth->scratch_ring)) in mtk_init_fq_dma()
1199 return -ENOMEM; in mtk_init_fq_dma()
1201 phy_ring_tail = eth->phy_scratch_ring + soc->tx.desc_size * (cnt - 1); in mtk_init_fq_dma()
1203 for (j = 0; j < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); j++) { in mtk_init_fq_dma()
1204 len = min_t(int, cnt - j * MTK_FQ_DMA_LENGTH, MTK_FQ_DMA_LENGTH); in mtk_init_fq_dma()
1205 eth->scratch_head[j] = kcalloc(len, MTK_QDMA_PAGE_SIZE, GFP_KERNEL); in mtk_init_fq_dma()
1207 if (unlikely(!eth->scratch_head[j])) in mtk_init_fq_dma()
1208 return -ENOMEM; in mtk_init_fq_dma()
1210 dma_addr = dma_map_single(eth->dma_dev, in mtk_init_fq_dma()
1211 eth->scratch_head[j], len * MTK_QDMA_PAGE_SIZE, in mtk_init_fq_dma()
1214 if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr))) in mtk_init_fq_dma()
1215 return -ENOMEM; in mtk_init_fq_dma()
1220 txd = eth->scratch_ring + (j * MTK_FQ_DMA_LENGTH + i) * soc->tx.desc_size; in mtk_init_fq_dma()
1221 txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE; in mtk_init_fq_dma()
1223 txd->txd2 = eth->phy_scratch_ring + in mtk_init_fq_dma()
1224 (j * MTK_FQ_DMA_LENGTH + i + 1) * soc->tx.desc_size; in mtk_init_fq_dma()
1226 txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); in mtk_init_fq_dma()
1227 if (MTK_HAS_CAPS(soc->caps, MTK_36BIT_DMA)) in mtk_init_fq_dma()
1228 txd->txd3 |= TX_DMA_PREP_ADDR64(dma_addr + i * MTK_QDMA_PAGE_SIZE); in mtk_init_fq_dma()
1230 txd->txd4 = 0; in mtk_init_fq_dma()
1232 txd->txd5 = 0; in mtk_init_fq_dma()
1233 txd->txd6 = 0; in mtk_init_fq_dma()
1234 txd->txd7 = 0; in mtk_init_fq_dma()
1235 txd->txd8 = 0; in mtk_init_fq_dma()
1240 mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head); in mtk_init_fq_dma()
1241 mtk_w32(eth, phy_ring_tail, soc->reg_map->qdma.fq_tail); in mtk_init_fq_dma()
1242 mtk_w32(eth, (cnt << 16) | cnt, soc->reg_map->qdma.fq_count); in mtk_init_fq_dma()
1243 mtk_w32(eth, MTK_QDMA_PAGE_SIZE << 16, soc->reg_map->qdma.fq_blen); in mtk_init_fq_dma()
1250 return ring->dma + (desc - ring->phys); in mtk_qdma_phys_to_virt()
1256 int idx = (txd - ring->dma) / txd_size; in mtk_desc_to_tx_buf()
1258 return &ring->buf[idx]; in mtk_desc_to_tx_buf()
1264 return ring->dma_pdma - (struct mtk_tx_dma *)ring->dma + dma; in qdma_to_pdma()
1269 return (dma - ring->dma) / txd_size; in txd_to_idx()
1275 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_tx_unmap()
1276 if (tx_buf->flags & MTK_TX_FLAGS_SINGLE0) { in mtk_tx_unmap()
1277 dma_unmap_single(eth->dma_dev, in mtk_tx_unmap()
1281 } else if (tx_buf->flags & MTK_TX_FLAGS_PAGE0) { in mtk_tx_unmap()
1282 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1289 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1296 dma_unmap_page(eth->dma_dev, in mtk_tx_unmap()
1303 if (tx_buf->data && tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_tx_unmap()
1304 if (tx_buf->type == MTK_TYPE_SKB) { in mtk_tx_unmap()
1305 struct sk_buff *skb = tx_buf->data; in mtk_tx_unmap()
1312 struct xdp_frame *xdpf = tx_buf->data; in mtk_tx_unmap()
1314 if (napi && tx_buf->type == MTK_TYPE_XDP_TX) in mtk_tx_unmap()
1322 tx_buf->flags = 0; in mtk_tx_unmap()
1323 tx_buf->data = NULL; in mtk_tx_unmap()
1330 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in setup_tx_buf()
1335 txd->txd3 = mapped_addr; in setup_tx_buf()
1336 txd->txd2 |= TX_DMA_PLEN1(size); in setup_tx_buf()
1340 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in setup_tx_buf()
1341 txd->txd1 = mapped_addr; in setup_tx_buf()
1342 txd->txd2 = TX_DMA_PLEN0(size); in setup_tx_buf()
1353 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc_v1()
1357 WRITE_ONCE(desc->txd1, info->addr); in mtk_tx_set_dma_desc_v1()
1359 data = TX_DMA_SWC | TX_DMA_PLEN0(info->size) | in mtk_tx_set_dma_desc_v1()
1360 FIELD_PREP(TX_DMA_PQID, info->qid); in mtk_tx_set_dma_desc_v1()
1361 if (info->last) in mtk_tx_set_dma_desc_v1()
1363 WRITE_ONCE(desc->txd3, data); in mtk_tx_set_dma_desc_v1()
1365 data = (mac->id + 1) << TX_DMA_FPORT_SHIFT; /* forward port */ in mtk_tx_set_dma_desc_v1()
1366 if (info->first) { in mtk_tx_set_dma_desc_v1()
1367 if (info->gso) in mtk_tx_set_dma_desc_v1()
1370 if (info->csum) in mtk_tx_set_dma_desc_v1()
1373 if (info->vlan) in mtk_tx_set_dma_desc_v1()
1374 data |= TX_DMA_INS_VLAN | info->vlan_tci; in mtk_tx_set_dma_desc_v1()
1376 WRITE_ONCE(desc->txd4, data); in mtk_tx_set_dma_desc_v1()
1384 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc_v2()
1387 WRITE_ONCE(desc->txd1, info->addr); in mtk_tx_set_dma_desc_v2()
1389 data = TX_DMA_PLEN0(info->size); in mtk_tx_set_dma_desc_v2()
1390 if (info->last) in mtk_tx_set_dma_desc_v2()
1393 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_tx_set_dma_desc_v2()
1394 data |= TX_DMA_PREP_ADDR64(info->addr); in mtk_tx_set_dma_desc_v2()
1396 WRITE_ONCE(desc->txd3, data); in mtk_tx_set_dma_desc_v2()
1399 switch (mac->id) { in mtk_tx_set_dma_desc_v2()
1411 data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); in mtk_tx_set_dma_desc_v2()
1412 WRITE_ONCE(desc->txd4, data); in mtk_tx_set_dma_desc_v2()
1415 if (info->first) { in mtk_tx_set_dma_desc_v2()
1416 if (info->gso) in mtk_tx_set_dma_desc_v2()
1419 if (info->csum) in mtk_tx_set_dma_desc_v2()
1424 WRITE_ONCE(desc->txd5, data); in mtk_tx_set_dma_desc_v2()
1427 if (info->first && info->vlan) in mtk_tx_set_dma_desc_v2()
1428 data |= TX_DMA_INS_VLAN_V2 | info->vlan_tci; in mtk_tx_set_dma_desc_v2()
1429 WRITE_ONCE(desc->txd6, data); in mtk_tx_set_dma_desc_v2()
1431 WRITE_ONCE(desc->txd7, 0); in mtk_tx_set_dma_desc_v2()
1432 WRITE_ONCE(desc->txd8, 0); in mtk_tx_set_dma_desc_v2()
1439 struct mtk_eth *eth = mac->hw; in mtk_tx_set_dma_desc()
1453 .csum = skb->ip_summed == CHECKSUM_PARTIAL, in mtk_tx_map()
1462 struct mtk_eth *eth = mac->hw; in mtk_tx_map()
1463 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_map()
1472 itxd = ring->next_free; in mtk_tx_map()
1474 if (itxd == ring->last_free) in mtk_tx_map()
1475 return -ENOMEM; in mtk_tx_map()
1477 itx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size); in mtk_tx_map()
1480 txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size, in mtk_tx_map()
1482 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr))) in mtk_tx_map()
1483 return -ENOMEM; in mtk_tx_map()
1487 itx_buf->flags |= MTK_TX_FLAGS_SINGLE0; in mtk_tx_map()
1488 itx_buf->mac_id = mac->id; in mtk_tx_map()
1496 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in mtk_tx_map()
1497 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in mtk_tx_map()
1504 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) || in mtk_tx_map()
1506 txd = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_tx_map()
1508 if (txd == ring->last_free) in mtk_tx_map()
1518 soc->tx.dma_max_len); in mtk_tx_map()
1520 txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 && in mtk_tx_map()
1521 !(frag_size - txd_info.size); in mtk_tx_map()
1522 txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag, in mtk_tx_map()
1525 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr))) in mtk_tx_map()
1531 soc->tx.desc_size); in mtk_tx_map()
1534 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in mtk_tx_map()
1535 tx_buf->flags |= MTK_TX_FLAGS_PAGE0; in mtk_tx_map()
1536 tx_buf->mac_id = mac->id; in mtk_tx_map()
1541 frag_size -= txd_info.size; in mtk_tx_map()
1547 itx_buf->type = MTK_TYPE_SKB; in mtk_tx_map()
1548 itx_buf->data = skb; in mtk_tx_map()
1550 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_map()
1552 txd_pdma->txd2 |= TX_DMA_LS0; in mtk_tx_map()
1554 txd_pdma->txd2 |= TX_DMA_LS1; in mtk_tx_map()
1557 netdev_tx_sent_queue(txq, skb->len); in mtk_tx_map()
1560 ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_tx_map()
1561 atomic_sub(n_desc, &ring->free_count); in mtk_tx_map()
1568 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_map()
1570 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_tx_map()
1574 next_idx = NEXT_DESP_IDX(txd_to_idx(ring, txd, soc->tx.desc_size), in mtk_tx_map()
1575 ring->dma_size); in mtk_tx_map()
1583 tx_buf = mtk_desc_to_tx_buf(ring, itxd, soc->tx.desc_size); in mtk_tx_map()
1588 itxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_tx_map()
1589 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_tx_map()
1590 itxd_pdma->txd2 = TX_DMA_DESP2_DEF; in mtk_tx_map()
1592 itxd = mtk_qdma_phys_to_virt(ring, itxd->txd2); in mtk_tx_map()
1596 return -ENOMEM; in mtk_tx_map()
1605 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in mtk_cal_txd_req()
1606 frag = &skb_shinfo(skb)->frags[i]; in mtk_cal_txd_req()
1608 eth->soc->tx.dma_max_len); in mtk_cal_txd_req()
1611 nfrags += skb_shinfo(skb)->nr_frags; in mtk_cal_txd_req()
1622 if (!eth->netdev[i]) in mtk_queue_stopped()
1624 if (netif_queue_stopped(eth->netdev[i])) in mtk_queue_stopped()
1636 if (!eth->netdev[i]) in mtk_wake_queue()
1638 netif_tx_wake_all_queues(eth->netdev[i]); in mtk_wake_queue()
1645 struct mtk_eth *eth = mac->hw; in mtk_start_xmit()
1646 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_start_xmit()
1647 struct net_device_stats *stats = &dev->stats; in mtk_start_xmit()
1655 spin_lock(ð->page_lock); in mtk_start_xmit()
1657 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_start_xmit()
1661 if (unlikely(atomic_read(&ring->free_count) <= tx_num)) { in mtk_start_xmit()
1665 spin_unlock(ð->page_lock); in mtk_start_xmit()
1677 if (skb_shinfo(skb)->gso_type & in mtk_start_xmit()
1680 tcp_hdr(skb)->check = htons(skb_shinfo(skb)->gso_size); in mtk_start_xmit()
1687 if (unlikely(atomic_read(&ring->free_count) <= ring->thresh)) in mtk_start_xmit()
1690 spin_unlock(ð->page_lock); in mtk_start_xmit()
1695 spin_unlock(ð->page_lock); in mtk_start_xmit()
1696 stats->tx_dropped++; in mtk_start_xmit()
1707 if (!eth->hwlro) in mtk_get_rx_ring()
1708 return ð->rx_ring[0]; in mtk_get_rx_ring()
1713 ring = ð->rx_ring[i]; in mtk_get_rx_ring()
1714 idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size); in mtk_get_rx_ring()
1715 rxd = ring->dma + idx * eth->soc->rx.desc_size; in mtk_get_rx_ring()
1716 if (rxd->rxd2 & RX_DMA_DONE) { in mtk_get_rx_ring()
1717 ring->calc_idx_update = true; in mtk_get_rx_ring()
1730 if (!eth->hwlro) { in mtk_update_rx_cpu_idx()
1731 ring = ð->rx_ring[0]; in mtk_update_rx_cpu_idx()
1732 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1735 ring = ð->rx_ring[i]; in mtk_update_rx_cpu_idx()
1736 if (ring->calc_idx_update) { in mtk_update_rx_cpu_idx()
1737 ring->calc_idx_update = false; in mtk_update_rx_cpu_idx()
1738 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_update_rx_cpu_idx()
1758 .dev = eth->dma_dev, in mtk_create_page_pool()
1765 pp_params.dma_dir = rcu_access_pointer(eth->prog) ? DMA_BIDIRECTIONAL in mtk_create_page_pool()
1771 err = __xdp_rxq_info_reg(xdp_q, eth->dummy_dev, id, in mtk_create_page_pool()
1772 eth->rx_napi.napi_id, PAGE_SIZE); in mtk_create_page_pool()
1805 if (ring->page_pool) in mtk_rx_put_buff()
1806 page_pool_put_full_page(ring->page_pool, in mtk_rx_put_buff()
1817 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_xdp_frame_map()
1822 txd_info->addr = dma_map_single(eth->dma_dev, data, in mtk_xdp_frame_map()
1823 txd_info->size, DMA_TO_DEVICE); in mtk_xdp_frame_map()
1824 if (unlikely(dma_mapping_error(eth->dma_dev, txd_info->addr))) in mtk_xdp_frame_map()
1825 return -ENOMEM; in mtk_xdp_frame_map()
1827 tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; in mtk_xdp_frame_map()
1831 txd_info->addr = page_pool_get_dma_addr(page) + in mtk_xdp_frame_map()
1833 dma_sync_single_for_device(eth->dma_dev, txd_info->addr, in mtk_xdp_frame_map()
1834 txd_info->size, DMA_BIDIRECTIONAL); in mtk_xdp_frame_map()
1838 tx_buf->mac_id = mac->id; in mtk_xdp_frame_map()
1839 tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX; in mtk_xdp_frame_map()
1840 tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; in mtk_xdp_frame_map()
1843 setup_tx_buf(eth, tx_buf, txd_pdma, txd_info->addr, txd_info->size, in mtk_xdp_frame_map()
1853 const struct mtk_soc_data *soc = eth->soc; in mtk_xdp_submit_frame()
1854 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_xdp_submit_frame()
1857 .size = xdpf->len, in mtk_xdp_submit_frame()
1860 .qid = mac->id, in mtk_xdp_submit_frame()
1865 void *data = xdpf->data; in mtk_xdp_submit_frame()
1867 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_xdp_submit_frame()
1868 return -EBUSY; in mtk_xdp_submit_frame()
1870 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0; in mtk_xdp_submit_frame()
1871 if (unlikely(atomic_read(&ring->free_count) <= 1 + nr_frags)) in mtk_xdp_submit_frame()
1872 return -EBUSY; in mtk_xdp_submit_frame()
1874 spin_lock(ð->page_lock); in mtk_xdp_submit_frame()
1876 txd = ring->next_free; in mtk_xdp_submit_frame()
1877 if (txd == ring->last_free) { in mtk_xdp_submit_frame()
1878 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1879 return -ENOMEM; in mtk_xdp_submit_frame()
1883 tx_buf = mtk_desc_to_tx_buf(ring, txd, soc->tx.desc_size); in mtk_xdp_submit_frame()
1889 data, xdpf->headroom, index, dma_map); in mtk_xdp_submit_frame()
1896 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA) || (index & 0x1)) { in mtk_xdp_submit_frame()
1897 txd = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_xdp_submit_frame()
1898 if (txd == ring->last_free) in mtk_xdp_submit_frame()
1902 soc->tx.desc_size); in mtk_xdp_submit_frame()
1908 txd_info.size = skb_frag_size(&sinfo->frags[index]); in mtk_xdp_submit_frame()
1910 txd_info.qid = mac->id; in mtk_xdp_submit_frame()
1911 data = skb_frag_address(&sinfo->frags[index]); in mtk_xdp_submit_frame()
1916 htx_buf->data = xdpf; in mtk_xdp_submit_frame()
1918 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
1922 txd_pdma->txd2 |= TX_DMA_LS0; in mtk_xdp_submit_frame()
1924 txd_pdma->txd2 |= TX_DMA_LS1; in mtk_xdp_submit_frame()
1927 ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); in mtk_xdp_submit_frame()
1928 atomic_sub(n_desc, &ring->free_count); in mtk_xdp_submit_frame()
1935 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
1936 mtk_w32(eth, txd->txd2, soc->reg_map->qdma.ctx_ptr); in mtk_xdp_submit_frame()
1940 idx = txd_to_idx(ring, txd, soc->tx.desc_size); in mtk_xdp_submit_frame()
1941 mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size), in mtk_xdp_submit_frame()
1945 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1951 tx_buf = mtk_desc_to_tx_buf(ring, htxd, soc->tx.desc_size); in mtk_xdp_submit_frame()
1954 htxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_xdp_submit_frame()
1955 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_xdp_submit_frame()
1958 txd_pdma->txd2 = TX_DMA_DESP2_DEF; in mtk_xdp_submit_frame()
1961 htxd = mtk_qdma_phys_to_virt(ring, htxd->txd2); in mtk_xdp_submit_frame()
1964 spin_unlock(ð->page_lock); in mtk_xdp_submit_frame()
1973 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_xdp_xmit()
1974 struct mtk_eth *eth = mac->hw; in mtk_xdp_xmit()
1978 return -EINVAL; in mtk_xdp_xmit()
1986 u64_stats_update_begin(&hw_stats->syncp); in mtk_xdp_xmit()
1987 hw_stats->xdp_stats.tx_xdp_xmit += nxmit; in mtk_xdp_xmit()
1988 hw_stats->xdp_stats.tx_xdp_xmit_errors += num_frame - nxmit; in mtk_xdp_xmit()
1989 u64_stats_update_end(&hw_stats->syncp); in mtk_xdp_xmit()
1998 struct mtk_hw_stats *hw_stats = mac->hw_stats; in mtk_xdp_run()
1999 u64 *count = &hw_stats->xdp_stats.rx_xdp_drop; in mtk_xdp_run()
2005 prog = rcu_dereference(eth->prog); in mtk_xdp_run()
2012 count = &hw_stats->xdp_stats.rx_xdp_pass; in mtk_xdp_run()
2020 count = &hw_stats->xdp_stats.rx_xdp_redirect; in mtk_xdp_run()
2026 count = &hw_stats->xdp_stats.rx_xdp_tx_errors; in mtk_xdp_run()
2031 count = &hw_stats->xdp_stats.rx_xdp_tx; in mtk_xdp_run()
2044 page_pool_put_full_page(ring->page_pool, in mtk_xdp_run()
2045 virt_to_head_page(xdp->data), true); in mtk_xdp_run()
2048 u64_stats_update_begin(&hw_stats->syncp); in mtk_xdp_run()
2050 u64_stats_update_end(&hw_stats->syncp); in mtk_xdp_run()
2082 idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size); in mtk_poll_rx()
2083 rxd = ring->dma + idx * eth->soc->rx.desc_size; in mtk_poll_rx()
2084 data = ring->data[idx]; in mtk_poll_rx()
2096 mac = val - 1; in mtk_poll_rx()
2104 } else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && in mtk_poll_rx()
2106 mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; in mtk_poll_rx()
2110 !eth->netdev[mac])) in mtk_poll_rx()
2113 netdev = eth->netdev[mac]; in mtk_poll_rx()
2114 ppe_idx = eth->mac[mac]->ppe_idx; in mtk_poll_rx()
2116 if (unlikely(test_bit(MTK_RESETTING, ð->state))) in mtk_poll_rx()
2122 if (ring->page_pool) { in mtk_poll_rx()
2127 new_data = mtk_page_pool_get_buff(ring->page_pool, in mtk_poll_rx()
2131 netdev->stats.rx_dropped++; in mtk_poll_rx()
2135 dma_sync_single_for_cpu(eth->dma_dev, in mtk_poll_rx()
2137 pktlen, page_pool_get_dma_dir(ring->page_pool)); in mtk_poll_rx()
2139 xdp_init_buff(&xdp, PAGE_SIZE, &ring->xdp_q); in mtk_poll_rx()
2153 page_pool_put_full_page(ring->page_pool, in mtk_poll_rx()
2155 netdev->stats.rx_dropped++; in mtk_poll_rx()
2159 skb_reserve(skb, xdp.data - xdp.data_hard_start); in mtk_poll_rx()
2160 skb_put(skb, xdp.data_end - xdp.data); in mtk_poll_rx()
2161 metasize = xdp.data - xdp.data_meta; in mtk_poll_rx()
2166 if (ring->frag_size <= PAGE_SIZE) in mtk_poll_rx()
2167 new_data = napi_alloc_frag(ring->frag_size); in mtk_poll_rx()
2172 netdev->stats.rx_dropped++; in mtk_poll_rx()
2176 dma_addr = dma_map_single(eth->dma_dev, in mtk_poll_rx()
2177 new_data + NET_SKB_PAD + eth->ip_align, in mtk_poll_rx()
2178 ring->buf_size, DMA_FROM_DEVICE); in mtk_poll_rx()
2179 if (unlikely(dma_mapping_error(eth->dma_dev, in mtk_poll_rx()
2182 netdev->stats.rx_dropped++; in mtk_poll_rx()
2186 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_poll_rx()
2189 dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64), in mtk_poll_rx()
2190 ring->buf_size, DMA_FROM_DEVICE); in mtk_poll_rx()
2192 skb = build_skb(data, ring->frag_size); in mtk_poll_rx()
2194 netdev->stats.rx_dropped++; in mtk_poll_rx()
2203 skb->dev = netdev; in mtk_poll_rx()
2204 bytes += skb->len; in mtk_poll_rx()
2222 if (*rxdcsum & eth->soc->rx.dma_l4_valid) in mtk_poll_rx()
2223 skb->ip_summed = CHECKSUM_UNNECESSARY; in mtk_poll_rx()
2226 skb->protocol = eth_type_trans(skb, netdev); in mtk_poll_rx()
2235 if (port < ARRAY_SIZE(eth->dsa_meta) && in mtk_poll_rx()
2236 eth->dsa_meta[port]) in mtk_poll_rx()
2237 skb_dst_set_noref(skb, ð->dsa_meta[port]->dst); in mtk_poll_rx()
2241 mtk_ppe_check_skb(eth->ppe[ppe_idx], skb, hash); in mtk_poll_rx()
2247 ring->data[idx] = new_data; in mtk_poll_rx()
2248 rxd->rxd1 = (unsigned int)dma_addr; in mtk_poll_rx()
2250 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_poll_rx()
2251 rxd->rxd2 = RX_DMA_LSO; in mtk_poll_rx()
2253 rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); in mtk_poll_rx()
2255 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA) && in mtk_poll_rx()
2257 rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); in mtk_poll_rx()
2259 ring->calc_idx = idx; in mtk_poll_rx()
2272 eth->rx_packets += done; in mtk_poll_rx()
2273 eth->rx_bytes += bytes; in mtk_poll_rx()
2274 dim_update_sample(eth->rx_events, eth->rx_packets, eth->rx_bytes, in mtk_poll_rx()
2276 net_dim(ð->rx_dim, &dim_sample); in mtk_poll_rx()
2297 unsigned int bytes = skb->len; in mtk_poll_tx_done()
2299 state->total++; in mtk_poll_tx_done()
2300 eth->tx_packets++; in mtk_poll_tx_done()
2301 eth->tx_bytes += bytes; in mtk_poll_tx_done()
2303 dev = eth->netdev[mac]; in mtk_poll_tx_done()
2308 if (state->txq == txq) { in mtk_poll_tx_done()
2309 state->done++; in mtk_poll_tx_done()
2310 state->bytes += bytes; in mtk_poll_tx_done()
2314 if (state->txq) in mtk_poll_tx_done()
2315 netdev_tx_completed_queue(state->txq, state->done, state->bytes); in mtk_poll_tx_done()
2317 state->txq = txq; in mtk_poll_tx_done()
2318 state->done = 1; in mtk_poll_tx_done()
2319 state->bytes = bytes; in mtk_poll_tx_done()
2325 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_poll_tx_qdma()
2326 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx_qdma()
2332 cpu = ring->last_free_ptr; in mtk_poll_tx_qdma()
2333 dma = mtk_r32(eth, reg_map->qdma.drx_ptr); in mtk_poll_tx_qdma()
2339 u32 next_cpu = desc->txd2; in mtk_poll_tx_qdma()
2341 desc = mtk_qdma_phys_to_virt(ring, desc->txd2); in mtk_poll_tx_qdma()
2342 if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) in mtk_poll_tx_qdma()
2346 eth->soc->tx.desc_size); in mtk_poll_tx_qdma()
2347 if (!tx_buf->data) in mtk_poll_tx_qdma()
2350 if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_poll_tx_qdma()
2351 if (tx_buf->type == MTK_TYPE_SKB) in mtk_poll_tx_qdma()
2352 mtk_poll_tx_done(eth, state, tx_buf->mac_id, in mtk_poll_tx_qdma()
2353 tx_buf->data); in mtk_poll_tx_qdma()
2355 budget--; in mtk_poll_tx_qdma()
2359 ring->last_free = desc; in mtk_poll_tx_qdma()
2360 atomic_inc(&ring->free_count); in mtk_poll_tx_qdma()
2366 ring->last_free_ptr = cpu; in mtk_poll_tx_qdma()
2367 mtk_w32(eth, cpu, reg_map->qdma.crx_ptr); in mtk_poll_tx_qdma()
2375 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx_pdma()
2381 cpu = ring->cpu_idx; in mtk_poll_tx_pdma()
2386 tx_buf = &ring->buf[cpu]; in mtk_poll_tx_pdma()
2387 if (!tx_buf->data) in mtk_poll_tx_pdma()
2390 if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { in mtk_poll_tx_pdma()
2391 if (tx_buf->type == MTK_TYPE_SKB) in mtk_poll_tx_pdma()
2392 mtk_poll_tx_done(eth, state, 0, tx_buf->data); in mtk_poll_tx_pdma()
2393 budget--; in mtk_poll_tx_pdma()
2397 desc = ring->dma + cpu * eth->soc->tx.desc_size; in mtk_poll_tx_pdma()
2398 ring->last_free = desc; in mtk_poll_tx_pdma()
2399 atomic_inc(&ring->free_count); in mtk_poll_tx_pdma()
2401 cpu = NEXT_DESP_IDX(cpu, ring->dma_size); in mtk_poll_tx_pdma()
2405 ring->cpu_idx = cpu; in mtk_poll_tx_pdma()
2412 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_poll_tx()
2416 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_poll_tx()
2424 dim_update_sample(eth->tx_events, eth->tx_packets, eth->tx_bytes, in mtk_poll_tx()
2426 net_dim(ð->tx_dim, &dim_sample); in mtk_poll_tx()
2429 (atomic_read(&ring->free_count) > ring->thresh)) in mtk_poll_tx()
2449 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_tx()
2452 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_napi_tx()
2454 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->tx_irq_status); in mtk_napi_tx()
2458 dev_info(eth->dev, in mtk_napi_tx()
2460 mtk_r32(eth, reg_map->tx_irq_status), in mtk_napi_tx()
2461 mtk_r32(eth, reg_map->tx_irq_mask)); in mtk_napi_tx()
2467 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_napi_tx()
2479 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_napi_rx()
2487 mtk_w32(eth, eth->soc->rx.irq_done_mask, in mtk_napi_rx()
2488 reg_map->pdma.irq_status); in mtk_napi_rx()
2489 rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth); in mtk_napi_rx()
2493 dev_info(eth->dev, in mtk_napi_rx()
2495 mtk_r32(eth, reg_map->pdma.irq_status), in mtk_napi_rx()
2496 mtk_r32(eth, reg_map->pdma.irq_mask)); in mtk_napi_rx()
2502 } while (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_napi_rx()
2503 eth->soc->rx.irq_done_mask); in mtk_napi_rx()
2506 mtk_rx_irq_enable(eth, eth->soc->rx.irq_done_mask); in mtk_napi_rx()
2513 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_alloc()
2514 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_tx_alloc()
2515 int i, sz = soc->tx.desc_size; in mtk_tx_alloc()
2520 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) in mtk_tx_alloc()
2523 ring_size = soc->tx.dma_size; in mtk_tx_alloc()
2525 ring->buf = kcalloc(ring_size, sizeof(*ring->buf), in mtk_tx_alloc()
2527 if (!ring->buf) in mtk_tx_alloc()
2530 if (MTK_HAS_CAPS(soc->caps, MTK_SRAM)) { in mtk_tx_alloc()
2531 ring->dma = eth->sram_base + soc->tx.fq_dma_size * sz; in mtk_tx_alloc()
2532 ring->phys = eth->phy_scratch_ring + soc->tx.fq_dma_size * (dma_addr_t)sz; in mtk_tx_alloc()
2534 ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, in mtk_tx_alloc()
2535 &ring->phys, GFP_KERNEL); in mtk_tx_alloc()
2538 if (!ring->dma) in mtk_tx_alloc()
2543 u32 next_ptr = ring->phys + next * sz; in mtk_tx_alloc()
2545 txd = ring->dma + i * sz; in mtk_tx_alloc()
2546 txd->txd2 = next_ptr; in mtk_tx_alloc()
2547 txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; in mtk_tx_alloc()
2548 txd->txd4 = 0; in mtk_tx_alloc()
2550 txd->txd5 = 0; in mtk_tx_alloc()
2551 txd->txd6 = 0; in mtk_tx_alloc()
2552 txd->txd7 = 0; in mtk_tx_alloc()
2553 txd->txd8 = 0; in mtk_tx_alloc()
2557 /* On MT7688 (PDMA only) this driver uses the ring->dma structs in mtk_tx_alloc()
2559 * descriptors in ring->dma_pdma. in mtk_tx_alloc()
2561 if (!MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_alloc()
2562 ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, in mtk_tx_alloc()
2563 &ring->phys_pdma, GFP_KERNEL); in mtk_tx_alloc()
2564 if (!ring->dma_pdma) in mtk_tx_alloc()
2568 ring->dma_pdma[i].txd2 = TX_DMA_DESP2_DEF; in mtk_tx_alloc()
2569 ring->dma_pdma[i].txd4 = 0; in mtk_tx_alloc()
2573 ring->dma_size = ring_size; in mtk_tx_alloc()
2574 atomic_set(&ring->free_count, ring_size - 2); in mtk_tx_alloc()
2575 ring->next_free = ring->dma; in mtk_tx_alloc()
2576 ring->last_free = (void *)txd; in mtk_tx_alloc()
2577 ring->last_free_ptr = (u32)(ring->phys + ((ring_size - 1) * sz)); in mtk_tx_alloc()
2578 ring->thresh = MAX_SKB_FRAGS; in mtk_tx_alloc()
2585 if (MTK_HAS_CAPS(soc->caps, MTK_QDMA)) { in mtk_tx_alloc()
2586 mtk_w32(eth, ring->phys, soc->reg_map->qdma.ctx_ptr); in mtk_tx_alloc()
2587 mtk_w32(eth, ring->phys, soc->reg_map->qdma.dtx_ptr); in mtk_tx_alloc()
2589 ring->phys + ((ring_size - 1) * sz), in mtk_tx_alloc()
2590 soc->reg_map->qdma.crx_ptr); in mtk_tx_alloc()
2591 mtk_w32(eth, ring->last_free_ptr, soc->reg_map->qdma.drx_ptr); in mtk_tx_alloc()
2595 mtk_w32(eth, val, soc->reg_map->qdma.qtx_cfg + ofs); in mtk_tx_alloc()
2604 mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); in mtk_tx_alloc()
2608 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate); in mtk_tx_alloc()
2610 mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4); in mtk_tx_alloc()
2612 mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0); in mtk_tx_alloc()
2615 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx); in mtk_tx_alloc()
2621 return -ENOMEM; in mtk_tx_alloc()
2626 const struct mtk_soc_data *soc = eth->soc; in mtk_tx_clean()
2627 struct mtk_tx_ring *ring = ð->tx_ring; in mtk_tx_clean()
2630 if (ring->buf) { in mtk_tx_clean()
2631 for (i = 0; i < ring->dma_size; i++) in mtk_tx_clean()
2632 mtk_tx_unmap(eth, &ring->buf[i], NULL, false); in mtk_tx_clean()
2633 kfree(ring->buf); in mtk_tx_clean()
2634 ring->buf = NULL; in mtk_tx_clean()
2636 if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && ring->dma) { in mtk_tx_clean()
2637 dma_free_coherent(eth->dma_dev, in mtk_tx_clean()
2638 ring->dma_size * soc->tx.desc_size, in mtk_tx_clean()
2639 ring->dma, ring->phys); in mtk_tx_clean()
2640 ring->dma = NULL; in mtk_tx_clean()
2643 if (ring->dma_pdma) { in mtk_tx_clean()
2644 dma_free_coherent(eth->dma_dev, in mtk_tx_clean()
2645 ring->dma_size * soc->tx.desc_size, in mtk_tx_clean()
2646 ring->dma_pdma, ring->phys_pdma); in mtk_tx_clean()
2647 ring->dma_pdma = NULL; in mtk_tx_clean()
2653 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_rx_alloc()
2654 const struct mtk_soc_data *soc = eth->soc; in mtk_rx_alloc()
2659 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_rx_alloc()
2662 tx_ring_size = soc->tx.dma_size; in mtk_rx_alloc()
2666 return -EINVAL; in mtk_rx_alloc()
2667 ring = ð->rx_ring_qdma; in mtk_rx_alloc()
2669 ring = ð->rx_ring[ring_no]; in mtk_rx_alloc()
2677 rx_dma_size = soc->rx.dma_size; in mtk_rx_alloc()
2680 ring->frag_size = mtk_max_frag_size(rx_data_len); in mtk_rx_alloc()
2681 ring->buf_size = mtk_max_buf_size(ring->frag_size); in mtk_rx_alloc()
2682 ring->data = kcalloc(rx_dma_size, sizeof(*ring->data), in mtk_rx_alloc()
2684 if (!ring->data) in mtk_rx_alloc()
2685 return -ENOMEM; in mtk_rx_alloc()
2690 pp = mtk_create_page_pool(eth, &ring->xdp_q, ring_no, in mtk_rx_alloc()
2695 ring->page_pool = pp; in mtk_rx_alloc()
2698 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM) || in mtk_rx_alloc()
2700 ring->dma = dma_alloc_coherent(eth->dma_dev, in mtk_rx_alloc()
2701 rx_dma_size * eth->soc->rx.desc_size, in mtk_rx_alloc()
2702 &ring->phys, GFP_KERNEL); in mtk_rx_alloc()
2704 struct mtk_tx_ring *tx_ring = ð->tx_ring; in mtk_rx_alloc()
2706 ring->dma = tx_ring->dma + tx_ring_size * in mtk_rx_alloc()
2707 eth->soc->tx.desc_size * (ring_no + 1); in mtk_rx_alloc()
2708 ring->phys = tx_ring->phys + tx_ring_size * in mtk_rx_alloc()
2709 eth->soc->tx.desc_size * (ring_no + 1); in mtk_rx_alloc()
2712 if (!ring->dma) in mtk_rx_alloc()
2713 return -ENOMEM; in mtk_rx_alloc()
2720 rxd = ring->dma + i * eth->soc->rx.desc_size; in mtk_rx_alloc()
2721 if (ring->page_pool) { in mtk_rx_alloc()
2722 data = mtk_page_pool_get_buff(ring->page_pool, in mtk_rx_alloc()
2725 return -ENOMEM; in mtk_rx_alloc()
2727 if (ring->frag_size <= PAGE_SIZE) in mtk_rx_alloc()
2728 data = netdev_alloc_frag(ring->frag_size); in mtk_rx_alloc()
2733 return -ENOMEM; in mtk_rx_alloc()
2735 dma_addr = dma_map_single(eth->dma_dev, in mtk_rx_alloc()
2736 data + NET_SKB_PAD + eth->ip_align, in mtk_rx_alloc()
2737 ring->buf_size, DMA_FROM_DEVICE); in mtk_rx_alloc()
2738 if (unlikely(dma_mapping_error(eth->dma_dev, in mtk_rx_alloc()
2741 return -ENOMEM; in mtk_rx_alloc()
2744 rxd->rxd1 = (unsigned int)dma_addr; in mtk_rx_alloc()
2745 ring->data[i] = data; in mtk_rx_alloc()
2747 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_rx_alloc()
2748 rxd->rxd2 = RX_DMA_LSO; in mtk_rx_alloc()
2750 rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); in mtk_rx_alloc()
2752 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_rx_alloc()
2753 rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); in mtk_rx_alloc()
2755 rxd->rxd3 = 0; in mtk_rx_alloc()
2756 rxd->rxd4 = 0; in mtk_rx_alloc()
2758 rxd->rxd5 = 0; in mtk_rx_alloc()
2759 rxd->rxd6 = 0; in mtk_rx_alloc()
2760 rxd->rxd7 = 0; in mtk_rx_alloc()
2761 rxd->rxd8 = 0; in mtk_rx_alloc()
2765 ring->dma_size = rx_dma_size; in mtk_rx_alloc()
2766 ring->calc_idx_update = false; in mtk_rx_alloc()
2767 ring->calc_idx = rx_dma_size - 1; in mtk_rx_alloc()
2769 ring->crx_idx_reg = reg_map->qdma.qcrx_ptr + in mtk_rx_alloc()
2772 ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + in mtk_rx_alloc()
2780 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2781 reg_map->qdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2783 reg_map->qdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2785 reg_map->qdma.rst_idx); in mtk_rx_alloc()
2787 mtk_w32(eth, ring->phys, in mtk_rx_alloc()
2788 reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2790 reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2792 reg_map->pdma.rst_idx); in mtk_rx_alloc()
2794 mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); in mtk_rx_alloc()
2804 if (ring->data && ring->dma) { in mtk_rx_clean()
2805 for (i = 0; i < ring->dma_size; i++) { in mtk_rx_clean()
2808 if (!ring->data[i]) in mtk_rx_clean()
2811 rxd = ring->dma + i * eth->soc->rx.desc_size; in mtk_rx_clean()
2812 if (!rxd->rxd1) in mtk_rx_clean()
2815 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) in mtk_rx_clean()
2816 addr64 = RX_DMA_GET_ADDR64(rxd->rxd2); in mtk_rx_clean()
2818 dma_unmap_single(eth->dma_dev, ((u64)rxd->rxd1 | addr64), in mtk_rx_clean()
2819 ring->buf_size, DMA_FROM_DEVICE); in mtk_rx_clean()
2820 mtk_rx_put_buff(ring, ring->data[i], false); in mtk_rx_clean()
2822 kfree(ring->data); in mtk_rx_clean()
2823 ring->data = NULL; in mtk_rx_clean()
2826 if (!in_sram && ring->dma) { in mtk_rx_clean()
2827 dma_free_coherent(eth->dma_dev, in mtk_rx_clean()
2828 ring->dma_size * eth->soc->rx.desc_size, in mtk_rx_clean()
2829 ring->dma, ring->phys); in mtk_rx_clean()
2830 ring->dma = NULL; in mtk_rx_clean()
2833 if (ring->page_pool) { in mtk_rx_clean()
2834 if (xdp_rxq_info_is_reg(&ring->xdp_q)) in mtk_rx_clean()
2835 xdp_rxq_info_unreg(&ring->xdp_q); in mtk_rx_clean()
2836 page_pool_destroy(ring->page_pool); in mtk_rx_clean()
2837 ring->page_pool = NULL; in mtk_rx_clean()
2847 /* set LRO rings to auto-learn modes */ in mtk_hwlro_rx_init()
2879 /* auto-learn score delta setting */ in mtk_hwlro_rx_init()
2960 if (mac->hwlro_ip[i]) in mtk_hwlro_get_ip_cnt()
2971 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_add_ipaddr()
2973 struct mtk_eth *eth = mac->hw; in mtk_hwlro_add_ipaddr()
2976 if ((fsp->flow_type != TCP_V4_FLOW) || in mtk_hwlro_add_ipaddr()
2977 (!fsp->h_u.tcp_ip4_spec.ip4dst) || in mtk_hwlro_add_ipaddr()
2978 (fsp->location > 1)) in mtk_hwlro_add_ipaddr()
2979 return -EINVAL; in mtk_hwlro_add_ipaddr()
2981 mac->hwlro_ip[fsp->location] = htonl(fsp->h_u.tcp_ip4_spec.ip4dst); in mtk_hwlro_add_ipaddr()
2982 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + fsp->location; in mtk_hwlro_add_ipaddr()
2984 mac->hwlro_ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_hwlro_add_ipaddr()
2986 mtk_hwlro_val_ipaddr(eth, hwlro_idx, mac->hwlro_ip[fsp->location]); in mtk_hwlro_add_ipaddr()
2995 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_del_ipaddr()
2997 struct mtk_eth *eth = mac->hw; in mtk_hwlro_del_ipaddr()
3000 if (fsp->location > 1) in mtk_hwlro_del_ipaddr()
3001 return -EINVAL; in mtk_hwlro_del_ipaddr()
3003 mac->hwlro_ip[fsp->location] = 0; in mtk_hwlro_del_ipaddr()
3004 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + fsp->location; in mtk_hwlro_del_ipaddr()
3006 mac->hwlro_ip_cnt = mtk_hwlro_get_ip_cnt(mac); in mtk_hwlro_del_ipaddr()
3016 struct mtk_eth *eth = mac->hw; in mtk_hwlro_netdev_disable()
3020 mac->hwlro_ip[i] = 0; in mtk_hwlro_netdev_disable()
3021 hwlro_idx = (mac->id * MTK_MAX_LRO_IP_CNT) + i; in mtk_hwlro_netdev_disable()
3026 mac->hwlro_ip_cnt = 0; in mtk_hwlro_netdev_disable()
3034 (struct ethtool_rx_flow_spec *)&cmd->fs; in mtk_hwlro_get_fdir_entry()
3036 if (fsp->location >= ARRAY_SIZE(mac->hwlro_ip)) in mtk_hwlro_get_fdir_entry()
3037 return -EINVAL; in mtk_hwlro_get_fdir_entry()
3040 fsp->flow_type = TCP_V4_FLOW; in mtk_hwlro_get_fdir_entry()
3041 fsp->h_u.tcp_ip4_spec.ip4dst = ntohl(mac->hwlro_ip[fsp->location]); in mtk_hwlro_get_fdir_entry()
3042 fsp->m_u.tcp_ip4_spec.ip4dst = 0; in mtk_hwlro_get_fdir_entry()
3044 fsp->h_u.tcp_ip4_spec.ip4src = 0; in mtk_hwlro_get_fdir_entry()
3045 fsp->m_u.tcp_ip4_spec.ip4src = 0xffffffff; in mtk_hwlro_get_fdir_entry()
3046 fsp->h_u.tcp_ip4_spec.psrc = 0; in mtk_hwlro_get_fdir_entry()
3047 fsp->m_u.tcp_ip4_spec.psrc = 0xffff; in mtk_hwlro_get_fdir_entry()
3048 fsp->h_u.tcp_ip4_spec.pdst = 0; in mtk_hwlro_get_fdir_entry()
3049 fsp->m_u.tcp_ip4_spec.pdst = 0xffff; in mtk_hwlro_get_fdir_entry()
3050 fsp->h_u.tcp_ip4_spec.tos = 0; in mtk_hwlro_get_fdir_entry()
3051 fsp->m_u.tcp_ip4_spec.tos = 0xff; in mtk_hwlro_get_fdir_entry()
3065 if (cnt == cmd->rule_cnt) in mtk_hwlro_get_fdir_all()
3066 return -EMSGSIZE; in mtk_hwlro_get_fdir_all()
3068 if (mac->hwlro_ip[i]) { in mtk_hwlro_get_fdir_all()
3074 cmd->rule_cnt = cnt; in mtk_hwlro_get_fdir_all()
3098 netdev_features_t diff = dev->features ^ features; in mtk_set_features()
3113 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dma_busy_wait()
3114 reg = eth->soc->reg_map->qdma.glo_cfg; in mtk_dma_busy_wait()
3116 reg = eth->soc->reg_map->pdma.glo_cfg; in mtk_dma_busy_wait()
3118 ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val, in mtk_dma_busy_wait()
3122 dev_err(eth->dev, "DMA init timeout\n"); in mtk_dma_busy_wait()
3133 return -EBUSY; in mtk_dma_init()
3135 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3148 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3158 if (eth->hwlro) { in mtk_dma_init()
3169 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_dma_init()
3174 FC_THRES_MIN, eth->soc->reg_map->qdma.fc_th); in mtk_dma_init()
3175 mtk_w32(eth, 0x0, eth->soc->reg_map->qdma.hred); in mtk_dma_init()
3183 const struct mtk_soc_data *soc = eth->soc; in mtk_dma_free()
3187 if (eth->netdev[i]) in mtk_dma_free()
3188 netdev_reset_queue(eth->netdev[i]); in mtk_dma_free()
3189 if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && eth->scratch_ring) { in mtk_dma_free()
3190 dma_free_coherent(eth->dma_dev, in mtk_dma_free()
3191 MTK_QDMA_RING_SIZE * soc->tx.desc_size, in mtk_dma_free()
3192 eth->scratch_ring, eth->phy_scratch_ring); in mtk_dma_free()
3193 eth->scratch_ring = NULL; in mtk_dma_free()
3194 eth->phy_scratch_ring = 0; in mtk_dma_free()
3197 mtk_rx_clean(eth, ð->rx_ring[0], MTK_HAS_CAPS(soc->caps, MTK_SRAM)); in mtk_dma_free()
3198 mtk_rx_clean(eth, ð->rx_ring_qdma, false); in mtk_dma_free()
3200 if (eth->hwlro) { in mtk_dma_free()
3203 mtk_rx_clean(eth, ð->rx_ring[i], false); in mtk_dma_free()
3206 for (i = 0; i < DIV_ROUND_UP(soc->tx.fq_dma_size, MTK_FQ_DMA_LENGTH); i++) { in mtk_dma_free()
3207 kfree(eth->scratch_head[i]); in mtk_dma_free()
3208 eth->scratch_head[i] = NULL; in mtk_dma_free()
3224 struct mtk_eth *eth = mac->hw; in mtk_tx_timeout()
3226 if (test_bit(MTK_RESETTING, ð->state)) in mtk_tx_timeout()
3232 eth->netdev[mac->id]->stats.tx_errors++; in mtk_tx_timeout()
3235 schedule_work(ð->pending_work); in mtk_tx_timeout()
3242 eth->rx_events++; in mtk_handle_irq_rx()
3243 if (likely(napi_schedule_prep(ð->rx_napi))) { in mtk_handle_irq_rx()
3244 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_handle_irq_rx()
3245 __napi_schedule(ð->rx_napi); in mtk_handle_irq_rx()
3255 eth->tx_events++; in mtk_handle_irq_tx()
3256 if (likely(napi_schedule_prep(ð->tx_napi))) { in mtk_handle_irq_tx()
3258 __napi_schedule(ð->tx_napi); in mtk_handle_irq_tx()
3267 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_handle_irq()
3269 if (mtk_r32(eth, reg_map->pdma.irq_mask) & in mtk_handle_irq()
3270 eth->soc->rx.irq_done_mask) { in mtk_handle_irq()
3271 if (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_handle_irq()
3272 eth->soc->rx.irq_done_mask) in mtk_handle_irq()
3275 if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) { in mtk_handle_irq()
3276 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_handle_irq()
3287 struct mtk_eth *eth = mac->hw; in mtk_poll_controller()
3290 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_poll_controller()
3291 mtk_handle_irq_rx(eth->irq[2], dev); in mtk_poll_controller()
3293 mtk_rx_irq_enable(eth, eth->soc->rx.irq_done_mask); in mtk_poll_controller()
3300 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_start_dma()
3309 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_start_dma()
3310 val = mtk_r32(eth, reg_map->qdma.glo_cfg); in mtk_start_dma()
3321 mtk_w32(eth, val, reg_map->qdma.glo_cfg); in mtk_start_dma()
3326 reg_map->pdma.glo_cfg); in mtk_start_dma()
3330 reg_map->pdma.glo_cfg); in mtk_start_dma()
3340 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_gdm_config()
3353 if (eth->netdev[id] && netdev_uses_dsa(eth->netdev[id])) in mtk_gdm_config()
3364 dev->dsa_ptr->tag_ops->proto == DSA_TAG_PROTO_MTK; in mtk_uses_dsa()
3373 struct mtk_eth *eth = mac->hw; in mtk_device_event()
3397 if (s.base.speed == 0 || s.base.speed == ((__u32)-1)) in mtk_device_event()
3401 if (dp->index >= MTK_QDMA_NUM_QUEUES) in mtk_device_event()
3404 if (mac->speed > 0 && mac->speed <= s.base.speed) in mtk_device_event()
3407 mtk_set_queue_speed(eth, dp->index + 3, s.base.speed); in mtk_device_event()
3415 struct mtk_eth *eth = mac->hw; in mtk_open()
3419 ppe_num = eth->soc->ppe_num; in mtk_open()
3421 err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0); in mtk_open()
3429 if (!refcount_read(ð->dma_refcnt)) { in mtk_open()
3430 const struct mtk_soc_data *soc = eth->soc; in mtk_open()
3436 phylink_disconnect_phy(mac->phylink); in mtk_open()
3440 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_open()
3441 mtk_ppe_start(eth->ppe[i]); in mtk_open()
3444 if (!eth->netdev[i]) in mtk_open()
3447 target_mac = netdev_priv(eth->netdev[i]); in mtk_open()
3448 if (!soc->offload_version) { in mtk_open()
3449 target_mac->ppe_idx = 0; in mtk_open()
3451 } else if (ppe_num >= 3 && target_mac->id == 2) { in mtk_open()
3452 target_mac->ppe_idx = 2; in mtk_open()
3453 gdm_config = soc->reg_map->gdma_to_ppe[2]; in mtk_open()
3454 } else if (ppe_num >= 2 && target_mac->id == 1) { in mtk_open()
3455 target_mac->ppe_idx = 1; in mtk_open()
3456 gdm_config = soc->reg_map->gdma_to_ppe[1]; in mtk_open()
3458 target_mac->ppe_idx = 0; in mtk_open()
3459 gdm_config = soc->reg_map->gdma_to_ppe[0]; in mtk_open()
3461 mtk_gdm_config(eth, target_mac->id, gdm_config); in mtk_open()
3467 napi_enable(ð->tx_napi); in mtk_open()
3468 napi_enable(ð->rx_napi); in mtk_open()
3470 mtk_rx_irq_enable(eth, soc->rx.irq_done_mask); in mtk_open()
3471 refcount_set(ð->dma_refcnt, 1); in mtk_open()
3473 refcount_inc(ð->dma_refcnt); in mtk_open()
3476 phylink_start(mac->phylink); in mtk_open()
3482 if (mtk_uses_dsa(dev) && !eth->prog) { in mtk_open()
3483 for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) { in mtk_open()
3484 struct metadata_dst *md_dst = eth->dsa_meta[i]; in mtk_open()
3492 return -ENOMEM; in mtk_open()
3494 md_dst->u.port_info.port_id = i; in mtk_open()
3495 eth->dsa_meta[i] = md_dst; in mtk_open()
3518 spin_lock_bh(ð->page_lock); in mtk_stop_dma()
3522 spin_unlock_bh(ð->page_lock); in mtk_stop_dma()
3538 struct mtk_eth *eth = mac->hw; in mtk_stop()
3541 phylink_stop(mac->phylink); in mtk_stop()
3545 phylink_disconnect_phy(mac->phylink); in mtk_stop()
3548 if (!refcount_dec_and_test(ð->dma_refcnt)) in mtk_stop()
3555 mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask); in mtk_stop()
3556 napi_disable(ð->tx_napi); in mtk_stop()
3557 napi_disable(ð->rx_napi); in mtk_stop()
3559 cancel_work_sync(ð->rx_dim.work); in mtk_stop()
3560 cancel_work_sync(ð->tx_dim.work); in mtk_stop()
3562 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_stop()
3563 mtk_stop_dma(eth, eth->soc->reg_map->qdma.glo_cfg); in mtk_stop()
3564 mtk_stop_dma(eth, eth->soc->reg_map->pdma.glo_cfg); in mtk_stop()
3568 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_stop()
3569 mtk_ppe_stop(eth->ppe[i]); in mtk_stop()
3578 struct mtk_eth *eth = mac->hw; in mtk_xdp_setup()
3582 if (eth->hwlro) { in mtk_xdp_setup()
3584 return -EOPNOTSUPP; in mtk_xdp_setup()
3587 if (dev->mtu > MTK_PP_MAX_BUF_SIZE) { in mtk_xdp_setup()
3589 return -EOPNOTSUPP; in mtk_xdp_setup()
3592 need_update = !!eth->prog != !!prog; in mtk_xdp_setup()
3596 old_prog = rcu_replace_pointer(eth->prog, prog, lockdep_rtnl_is_held()); in mtk_xdp_setup()
3608 switch (xdp->command) { in mtk_xdp()
3610 return mtk_xdp_setup(dev, xdp->prog, xdp->extack); in mtk_xdp()
3612 return -EINVAL; in mtk_xdp()
3618 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3623 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
3633 for (clk = MTK_CLK_MAX - 1; clk >= 0; clk--) in mtk_clk_disable()
3634 clk_disable_unprepare(eth->clks[clk]); in mtk_clk_disable()
3642 ret = clk_prepare_enable(eth->clks[clk]); in mtk_clk_enable()
3650 while (--clk >= 0) in mtk_clk_enable()
3651 clk_disable_unprepare(eth->clks[clk]); in mtk_clk_enable()
3660 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_rx()
3664 cur_profile = net_dim_get_rx_moderation(eth->rx_dim.mode, in mtk_dim_rx()
3665 dim->profile_ix); in mtk_dim_rx()
3666 spin_lock_bh(ð->dim_lock); in mtk_dim_rx()
3668 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_rx()
3678 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_rx()
3679 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dim_rx()
3680 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_rx()
3682 spin_unlock_bh(ð->dim_lock); in mtk_dim_rx()
3684 dim->state = DIM_START_MEASURE; in mtk_dim_rx()
3691 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_dim_tx()
3695 cur_profile = net_dim_get_tx_moderation(eth->tx_dim.mode, in mtk_dim_tx()
3696 dim->profile_ix); in mtk_dim_tx()
3697 spin_lock_bh(ð->dim_lock); in mtk_dim_tx()
3699 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_tx()
3709 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_tx()
3710 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_dim_tx()
3711 mtk_w32(eth, val, reg_map->qdma.delay_irq); in mtk_dim_tx()
3713 spin_unlock_bh(ð->dim_lock); in mtk_dim_tx()
3715 dim->state = DIM_START_MEASURE; in mtk_dim_tx()
3720 struct mtk_eth *eth = mac->hw; in mtk_set_mcr_max_rx()
3723 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_set_mcr_max_rx()
3726 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3739 mtk_w32(mac->hw, mcr_new, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3747 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); in mtk_hw_reset()
3752 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_reset()
3755 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_hw_reset()
3762 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_reset()
3771 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, in mtk_hw_reset()
3774 regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, in mtk_hw_reset()
3782 regmap_read(eth->ethsys, ETHSYS_RSTCTRL, &val); in mtk_hw_reset_read()
3790 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, RSTCTRL_FE, in mtk_hw_warm_reset()
3794 dev_err(eth->dev, "warm reset failed\n"); in mtk_hw_warm_reset()
3801 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_warm_reset()
3803 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_hw_warm_reset()
3809 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_hw_warm_reset()
3815 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask); in mtk_hw_warm_reset()
3820 dev_err(eth->dev, "warm reset stage0 failed %08x (%08x)\n", in mtk_hw_warm_reset()
3824 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, ~rst_mask); in mtk_hw_warm_reset()
3829 dev_err(eth->dev, "warm reset stage1 failed %08x (%08x)\n", in mtk_hw_warm_reset()
3835 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_check_dma_hang()
3843 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_hw_check_dma_hang()
3847 wdidx = mtk_r32(eth, reg_map->wdma_base[0] + 0xc); in mtk_hw_check_dma_hang()
3849 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x204); in mtk_hw_check_dma_hang()
3852 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x230); in mtk_hw_check_dma_hang()
3855 oq_free = (!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(24, 16)) && in mtk_hw_check_dma_hang()
3856 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x4) & GENMASK(8, 0)) && in mtk_hw_check_dma_hang()
3857 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x10) & GENMASK(24, 16))); in mtk_hw_check_dma_hang()
3859 if (wdidx == eth->reset.wdidx && wtx_busy && cdm_full && oq_free) { in mtk_hw_check_dma_hang()
3860 if (++eth->reset.wdma_hang_count > 2) { in mtk_hw_check_dma_hang()
3861 eth->reset.wdma_hang_count = 0; in mtk_hw_check_dma_hang()
3868 qfsm_hang = !!mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x234); in mtk_hw_check_dma_hang()
3869 qfwd_hang = !mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x308); in mtk_hw_check_dma_hang()
3875 gdm1_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x24); in mtk_hw_check_dma_hang()
3876 gdm2_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x64); in mtk_hw_check_dma_hang()
3881 if (++eth->reset.qdma_hang_count > 2) { in mtk_hw_check_dma_hang()
3882 eth->reset.qdma_hang_count = 0; in mtk_hw_check_dma_hang()
3889 oq_hang = !!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(8, 0)); in mtk_hw_check_dma_hang()
3891 adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && in mtk_hw_check_dma_hang()
3892 !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); in mtk_hw_check_dma_hang()
3895 if (++eth->reset.adma_hang_count > 2) { in mtk_hw_check_dma_hang()
3896 eth->reset.adma_hang_count = 0; in mtk_hw_check_dma_hang()
3902 eth->reset.wdma_hang_count = 0; in mtk_hw_check_dma_hang()
3903 eth->reset.qdma_hang_count = 0; in mtk_hw_check_dma_hang()
3904 eth->reset.adma_hang_count = 0; in mtk_hw_check_dma_hang()
3906 eth->reset.wdidx = wdidx; in mtk_hw_check_dma_hang()
3917 if (test_bit(MTK_RESETTING, ð->state)) in mtk_hw_reset_monitor_work()
3922 schedule_work(ð->pending_work); in mtk_hw_reset_monitor_work()
3925 schedule_delayed_work(ð->reset.monitor_work, in mtk_hw_reset_monitor_work()
3933 const struct mtk_reg_map *reg_map = eth->soc->reg_map; in mtk_hw_init()
3936 if (!reset && test_and_set_bit(MTK_HW_INIT, ð->state)) in mtk_hw_init()
3940 pm_runtime_enable(eth->dev); in mtk_hw_init()
3941 pm_runtime_get_sync(eth->dev); in mtk_hw_init()
3948 if (eth->ethsys) in mtk_hw_init()
3949 regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, dma_mask, in mtk_hw_init()
3950 of_dma_is_coherent(eth->dma_dev->of_node) * dma_mask); in mtk_hw_init()
3952 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_hw_init()
3953 ret = device_reset(eth->dev); in mtk_hw_init()
3955 dev_err(eth->dev, "MAC reset failed!\n"); in mtk_hw_init()
3960 mtk_dim_rx(ð->rx_dim.work); in mtk_hw_init()
3961 mtk_dim_tx(ð->tx_dim.work); in mtk_hw_init()
3983 if (eth->pctl) { in mtk_hw_init()
3985 regmap_write(eth->pctl, GPIO_DRV_SEL10, 0xa00); in mtk_hw_init()
3988 regmap_write(eth->pctl, GPIO_OD33_CTRL8, 0x5); in mtk_hw_init()
3991 regmap_write(eth->pctl, GPIO_BIAS_CTRL, 0x0); in mtk_hw_init()
3999 struct net_device *dev = eth->netdev[i]; in mtk_hw_init()
4006 dev->mtu + MTK_RX_ETH_HLEN); in mtk_hw_init()
4022 mtk_dim_rx(ð->rx_dim.work); in mtk_hw_init()
4023 mtk_dim_tx(ð->tx_dim.work); in mtk_hw_init()
4030 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp); in mtk_hw_init()
4031 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->pdma.int_grp + 4); in mtk_hw_init()
4032 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->qdma.int_grp); in mtk_hw_init()
4033 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->qdma.int_grp + 4); in mtk_hw_init()
4052 mtk_r32(eth, reg_map->gdm1_cnt + 0x100 + i); in mtk_hw_init()
4096 pm_runtime_put_sync(eth->dev); in mtk_hw_init()
4097 pm_runtime_disable(eth->dev); in mtk_hw_init()
4105 if (!test_and_clear_bit(MTK_HW_INIT, ð->state)) in mtk_hw_deinit()
4110 pm_runtime_put_sync(eth->dev); in mtk_hw_deinit()
4111 pm_runtime_disable(eth->dev); in mtk_hw_deinit()
4119 struct mtk_eth *eth = mac->hw; in mtk_uninit()
4121 phylink_disconnect_phy(mac->phylink); in mtk_uninit()
4130 struct mtk_eth *eth = mac->hw; in mtk_change_mtu()
4132 if (rcu_access_pointer(eth->prog) && in mtk_change_mtu()
4135 return -EINVAL; in mtk_change_mtu()
4139 WRITE_ONCE(dev->mtu, new_mtu); in mtk_change_mtu()
4152 return phylink_mii_ioctl(mac->phylink, ifr, cmd); in mtk_do_ioctl()
4157 return -EOPNOTSUPP; in mtk_do_ioctl()
4170 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_prepare_for_reset()
4172 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_prepare_for_reset()
4178 for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) in mtk_prepare_for_reset()
4179 mtk_ppe_prepare_reset(eth->ppe[i]); in mtk_prepare_for_reset()
4199 set_bit(MTK_RESETTING, ð->state); in mtk_pending_work()
4210 if (!eth->netdev[i] || !netif_running(eth->netdev[i])) in mtk_pending_work()
4213 mtk_stop(eth->netdev[i]); in mtk_pending_work()
4219 if (eth->dev->pins) in mtk_pending_work()
4220 pinctrl_select_state(eth->dev->pins->p, in mtk_pending_work()
4221 eth->dev->pins->default_state); in mtk_pending_work()
4226 if (!eth->netdev[i] || !test_bit(i, &restart)) in mtk_pending_work()
4229 if (mtk_open(eth->netdev[i])) { in mtk_pending_work()
4230 netif_alert(eth, ifup, eth->netdev[i], in mtk_pending_work()
4232 dev_close(eth->netdev[i]); in mtk_pending_work()
4241 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) in mtk_pending_work()
4243 if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) in mtk_pending_work()
4249 clear_bit(MTK_RESETTING, ð->state); in mtk_pending_work()
4261 if (!eth->netdev[i]) in mtk_free_dev()
4263 free_netdev(eth->netdev[i]); in mtk_free_dev()
4266 for (i = 0; i < ARRAY_SIZE(eth->dsa_meta); i++) { in mtk_free_dev()
4267 if (!eth->dsa_meta[i]) in mtk_free_dev()
4269 metadata_dst_free(eth->dsa_meta[i]); in mtk_free_dev()
4281 if (!eth->netdev[i]) in mtk_unreg_dev()
4283 mac = netdev_priv(eth->netdev[i]); in mtk_unreg_dev()
4284 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_unreg_dev()
4285 unregister_netdevice_notifier(&mac->device_notifier); in mtk_unreg_dev()
4286 unregister_netdev(eth->netdev[i]); in mtk_unreg_dev()
4297 mtk_pcs_lynxi_destroy(eth->sgmii_pcs[i]); in mtk_sgmii_destroy()
4305 cancel_work_sync(ð->pending_work); in mtk_cleanup()
4306 cancel_delayed_work_sync(ð->reset.monitor_work); in mtk_cleanup()
4316 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_get_link_ksettings()
4317 return -EBUSY; in mtk_get_link_ksettings()
4319 return phylink_ethtool_ksettings_get(mac->phylink, cmd); in mtk_get_link_ksettings()
4327 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_set_link_ksettings()
4328 return -EBUSY; in mtk_set_link_ksettings()
4330 return phylink_ethtool_ksettings_set(mac->phylink, cmd); in mtk_set_link_ksettings()
4338 strscpy(info->driver, mac->hw->dev->driver->name, sizeof(info->driver)); in mtk_get_drvinfo()
4339 strscpy(info->bus_info, dev_name(mac->hw->dev), sizeof(info->bus_info)); in mtk_get_drvinfo()
4340 info->n_stats = ARRAY_SIZE(mtk_ethtool_stats); in mtk_get_drvinfo()
4347 return mac->hw->msg_enable; in mtk_get_msglevel()
4354 mac->hw->msg_enable = value; in mtk_set_msglevel()
4361 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_nway_reset()
4362 return -EBUSY; in mtk_nway_reset()
4364 if (!mac->phylink) in mtk_nway_reset()
4365 return -ENOTSUPP; in mtk_nway_reset()
4367 return phylink_ethtool_nway_reset(mac->phylink); in mtk_nway_reset()
4380 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_strings()
4396 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_sset_count()
4401 return -EOPNOTSUPP; in mtk_get_sset_count()
4410 for (i = 0; i < ARRAY_SIZE(eth->rx_ring); i++) { in mtk_ethtool_pp_stats()
4411 struct mtk_rx_ring *ring = ð->rx_ring[i]; in mtk_ethtool_pp_stats()
4413 if (!ring->page_pool) in mtk_ethtool_pp_stats()
4416 page_pool_get_stats(ring->page_pool, &stats); in mtk_ethtool_pp_stats()
4425 struct mtk_hw_stats *hwstats = mac->hw_stats; in mtk_get_ethtool_stats()
4430 if (unlikely(test_bit(MTK_RESETTING, &mac->hw->state))) in mtk_get_ethtool_stats()
4434 if (spin_trylock_bh(&hwstats->stats_lock)) { in mtk_get_ethtool_stats()
4436 spin_unlock_bh(&hwstats->stats_lock); in mtk_get_ethtool_stats()
4444 start = u64_stats_fetch_begin(&hwstats->syncp); in mtk_get_ethtool_stats()
4448 if (mtk_page_pool_enabled(mac->hw)) in mtk_get_ethtool_stats()
4449 mtk_ethtool_pp_stats(mac->hw, data_dst); in mtk_get_ethtool_stats()
4450 } while (u64_stats_fetch_retry(&hwstats->syncp, start)); in mtk_get_ethtool_stats()
4456 int ret = -EOPNOTSUPP; in mtk_get_rxnfc()
4458 switch (cmd->cmd) { in mtk_get_rxnfc()
4460 if (dev->hw_features & NETIF_F_LRO) { in mtk_get_rxnfc()
4461 cmd->data = MTK_MAX_RX_RING_NUM; in mtk_get_rxnfc()
4466 if (dev->hw_features & NETIF_F_LRO) { in mtk_get_rxnfc()
4469 cmd->rule_cnt = mac->hwlro_ip_cnt; in mtk_get_rxnfc()
4474 if (dev->hw_features & NETIF_F_LRO) in mtk_get_rxnfc()
4478 if (dev->hw_features & NETIF_F_LRO) in mtk_get_rxnfc()
4491 int ret = -EOPNOTSUPP; in mtk_set_rxnfc()
4493 switch (cmd->cmd) { in mtk_set_rxnfc()
4495 if (dev->hw_features & NETIF_F_LRO) in mtk_set_rxnfc()
4499 if (dev->hw_features & NETIF_F_LRO) in mtk_set_rxnfc()
4513 phylink_ethtool_get_pauseparam(mac->phylink, pause); in mtk_get_pauseparam()
4520 return phylink_ethtool_set_pauseparam(mac->phylink, pause); in mtk_set_pauseparam()
4527 return phylink_ethtool_get_eee(mac->phylink, eee); in mtk_get_eee()
4534 return phylink_ethtool_set_eee(mac->phylink, eee); in mtk_set_eee()
4546 queue = mac->id; in mtk_select_queue()
4548 if (queue >= dev->num_tx_queues) in mtk_select_queue()
4606 dev_err(eth->dev, "missing mac id\n"); in mtk_add_mac()
4607 return -EINVAL; in mtk_add_mac()
4612 dev_err(eth->dev, "%d is not a valid mac id\n", id); in mtk_add_mac()
4613 return -EINVAL; in mtk_add_mac()
4616 if (eth->netdev[id]) { in mtk_add_mac()
4617 dev_err(eth->dev, "duplicate mac id found: %d\n", id); in mtk_add_mac()
4618 return -EINVAL; in mtk_add_mac()
4621 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) in mtk_add_mac()
4624 eth->netdev[id] = alloc_etherdev_mqs(sizeof(*mac), txqs, 1); in mtk_add_mac()
4625 if (!eth->netdev[id]) { in mtk_add_mac()
4626 dev_err(eth->dev, "alloc_etherdev failed\n"); in mtk_add_mac()
4627 return -ENOMEM; in mtk_add_mac()
4629 mac = netdev_priv(eth->netdev[id]); in mtk_add_mac()
4630 eth->mac[id] = mac; in mtk_add_mac()
4631 mac->id = id; in mtk_add_mac()
4632 mac->hw = eth; in mtk_add_mac()
4633 mac->of_node = np; in mtk_add_mac()
4635 err = of_get_ethdev_address(mac->of_node, eth->netdev[id]); in mtk_add_mac()
4636 if (err == -EPROBE_DEFER) in mtk_add_mac()
4641 eth_hw_addr_random(eth->netdev[id]); in mtk_add_mac()
4642 dev_err(eth->dev, "generated random MAC address %pM\n", in mtk_add_mac()
4643 eth->netdev[id]->dev_addr); in mtk_add_mac()
4646 memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip)); in mtk_add_mac()
4647 mac->hwlro_ip_cnt = 0; in mtk_add_mac()
4649 mac->hw_stats = devm_kzalloc(eth->dev, in mtk_add_mac()
4650 sizeof(*mac->hw_stats), in mtk_add_mac()
4652 if (!mac->hw_stats) { in mtk_add_mac()
4653 dev_err(eth->dev, "failed to allocate counter memory\n"); in mtk_add_mac()
4654 err = -ENOMEM; in mtk_add_mac()
4657 spin_lock_init(&mac->hw_stats->stats_lock); in mtk_add_mac()
4658 u64_stats_init(&mac->hw_stats->syncp); in mtk_add_mac()
4661 mac->hw_stats->reg_offset = id * 0x80; in mtk_add_mac()
4663 mac->hw_stats->reg_offset = id * 0x40; in mtk_add_mac()
4668 dev_err(eth->dev, "incorrect phy-mode\n"); in mtk_add_mac()
4673 mac->interface = PHY_INTERFACE_MODE_NA; in mtk_add_mac()
4674 mac->speed = SPEED_UNKNOWN; in mtk_add_mac()
4676 mac->phylink_config.dev = ð->netdev[id]->dev; in mtk_add_mac()
4677 mac->phylink_config.type = PHYLINK_NETDEV; in mtk_add_mac()
4678 mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | in mtk_add_mac()
4680 mac->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD | in mtk_add_mac()
4682 mac->phylink_config.lpi_timer_default = 1000; in mtk_add_mac()
4684 /* MT7623 gmac0 is now missing its speed-specific PLL configuration in mtk_add_mac()
4685 * in its .mac_config method (since state->speed is not valid there. in mtk_add_mac()
4688 if (!mac->hw->soc->disable_pll_modes || mac->id != 0) { in mtk_add_mac()
4690 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4692 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4694 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) in mtk_add_mac()
4695 phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); in mtk_add_mac()
4698 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id) in mtk_add_mac()
4700 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4703 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) && in mtk_add_mac()
4704 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII_MT7621_CLK)) { in mtk_add_mac()
4705 regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val); in mtk_add_mac()
4708 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4711 if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII)) { in mtk_add_mac()
4713 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4715 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4717 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4720 if (mtk_is_netsys_v3_or_greater(mac->hw) && in mtk_add_mac()
4721 MTK_HAS_CAPS(mac->hw->soc->caps, MTK_ESW_BIT) && in mtk_add_mac()
4723 mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | in mtk_add_mac()
4726 phy_interface_zero(mac->phylink_config.supported_interfaces); in mtk_add_mac()
4728 mac->phylink_config.supported_interfaces); in mtk_add_mac()
4731 phylink = phylink_create(&mac->phylink_config, in mtk_add_mac()
4732 of_fwnode_handle(mac->of_node), in mtk_add_mac()
4739 mac->phylink = phylink; in mtk_add_mac()
4741 SET_NETDEV_DEV(eth->netdev[id], eth->dev); in mtk_add_mac()
4742 eth->netdev[id]->watchdog_timeo = 5 * HZ; in mtk_add_mac()
4743 eth->netdev[id]->netdev_ops = &mtk_netdev_ops; in mtk_add_mac()
4744 eth->netdev[id]->base_addr = (unsigned long)eth->base; in mtk_add_mac()
4746 eth->netdev[id]->hw_features = eth->soc->hw_features; in mtk_add_mac()
4747 if (eth->hwlro) in mtk_add_mac()
4748 eth->netdev[id]->hw_features |= NETIF_F_LRO; in mtk_add_mac()
4750 eth->netdev[id]->vlan_features = eth->soc->hw_features & in mtk_add_mac()
4752 eth->netdev[id]->features |= eth->soc->hw_features; in mtk_add_mac()
4753 eth->netdev[id]->ethtool_ops = &mtk_ethtool_ops; in mtk_add_mac()
4755 eth->netdev[id]->irq = eth->irq[0]; in mtk_add_mac()
4756 eth->netdev[id]->dev.of_node = np; in mtk_add_mac()
4758 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_add_mac()
4759 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN; in mtk_add_mac()
4761 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH_2K - MTK_RX_ETH_HLEN; in mtk_add_mac()
4763 if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { in mtk_add_mac()
4764 mac->device_notifier.notifier_call = mtk_device_event; in mtk_add_mac()
4765 register_netdevice_notifier(&mac->device_notifier); in mtk_add_mac()
4769 eth->netdev[id]->xdp_features = NETDEV_XDP_ACT_BASIC | in mtk_add_mac()
4777 free_netdev(eth->netdev[id]); in mtk_add_mac()
4790 dev = eth->netdev[i]; in mtk_eth_set_dma_device()
4792 if (!dev || !(dev->flags & IFF_UP)) in mtk_eth_set_dma_device()
4795 list_add_tail(&dev->close_list, &dev_list); in mtk_eth_set_dma_device()
4800 eth->dma_dev = dma_dev; in mtk_eth_set_dma_device()
4803 list_del_init(&dev->close_list); in mtk_eth_set_dma_device()
4818 np = of_parse_phandle(eth->dev->of_node, "mediatek,sgmiisys", i); in mtk_sgmii_init()
4832 eth->sgmii_pcs[i] = mtk_pcs_lynxi_create(eth->dev, regmap, in mtk_sgmii_init()
4833 eth->soc->ana_rgc3, in mtk_sgmii_init()
4847 eth = devm_kzalloc(&pdev->dev, sizeof(*eth), GFP_KERNEL); in mtk_probe()
4849 return -ENOMEM; in mtk_probe()
4851 eth->soc = of_device_get_match_data(&pdev->dev); in mtk_probe()
4853 eth->dev = &pdev->dev; in mtk_probe()
4854 eth->dma_dev = &pdev->dev; in mtk_probe()
4855 eth->base = devm_platform_ioremap_resource(pdev, 0); in mtk_probe()
4856 if (IS_ERR(eth->base)) in mtk_probe()
4857 return PTR_ERR(eth->base); in mtk_probe()
4859 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) in mtk_probe()
4860 eth->ip_align = NET_IP_ALIGN; in mtk_probe()
4862 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { in mtk_probe()
4868 eth->sram_base = (void __force *)devm_platform_ioremap_resource(pdev, 1); in mtk_probe()
4869 if (IS_ERR(eth->sram_base)) in mtk_probe()
4870 return PTR_ERR(eth->sram_base); in mtk_probe()
4872 eth->sram_base = (void __force *)eth->base + MTK_ETH_SRAM_OFFSET; in mtk_probe()
4876 if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { in mtk_probe()
4877 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(36)); in mtk_probe()
4879 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); in mtk_probe()
4882 dev_err(&pdev->dev, "Wrong DMA config\n"); in mtk_probe()
4883 return -EINVAL; in mtk_probe()
4887 spin_lock_init(ð->page_lock); in mtk_probe()
4888 spin_lock_init(ð->tx_irq_lock); in mtk_probe()
4889 spin_lock_init(ð->rx_irq_lock); in mtk_probe()
4890 spin_lock_init(ð->dim_lock); in mtk_probe()
4892 eth->rx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in mtk_probe()
4893 INIT_WORK(ð->rx_dim.work, mtk_dim_rx); in mtk_probe()
4894 INIT_DELAYED_WORK(ð->reset.monitor_work, mtk_hw_reset_monitor_work); in mtk_probe()
4896 eth->tx_dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE; in mtk_probe()
4897 INIT_WORK(ð->tx_dim.work, mtk_dim_tx); in mtk_probe()
4899 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_probe()
4900 eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4902 if (IS_ERR(eth->ethsys)) { in mtk_probe()
4903 dev_err(&pdev->dev, "no ethsys regmap found\n"); in mtk_probe()
4904 return PTR_ERR(eth->ethsys); in mtk_probe()
4908 if (MTK_HAS_CAPS(eth->soc->caps, MTK_INFRA)) { in mtk_probe()
4909 eth->infra = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4911 if (IS_ERR(eth->infra)) { in mtk_probe()
4912 dev_err(&pdev->dev, "no infracfg regmap found\n"); in mtk_probe()
4913 return PTR_ERR(eth->infra); in mtk_probe()
4917 if (of_dma_is_coherent(pdev->dev.of_node)) { in mtk_probe()
4920 cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4921 "cci-control-port"); in mtk_probe()
4927 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { in mtk_probe()
4934 if (eth->soc->required_pctl) { in mtk_probe()
4935 eth->pctl = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in mtk_probe()
4937 if (IS_ERR(eth->pctl)) { in mtk_probe()
4938 dev_err(&pdev->dev, "no pctl regmap found\n"); in mtk_probe()
4939 err = PTR_ERR(eth->pctl); in mtk_probe()
4947 err = -EINVAL; in mtk_probe()
4950 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { in mtk_probe()
4954 err = -EINVAL; in mtk_probe()
4957 eth->phy_scratch_ring = res_sram->start; in mtk_probe()
4959 eth->phy_scratch_ring = res->start + MTK_ETH_SRAM_OFFSET; in mtk_probe()
4964 if (eth->soc->offload_version) { in mtk_probe()
4970 if (i >= ARRAY_SIZE(eth->soc->reg_map->wdma_base)) in mtk_probe()
4973 np = of_parse_phandle(pdev->dev.of_node, in mtk_probe()
4974 "mediatek,wed", i); in mtk_probe()
4978 wdma_base = eth->soc->reg_map->wdma_base[i]; in mtk_probe()
4979 wdma_phy = res ? res->start + wdma_base : 0; in mtk_probe()
4980 mtk_wed_add_hw(np, eth, eth->base + wdma_base, in mtk_probe()
4986 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT) && i > 0) in mtk_probe()
4987 eth->irq[i] = eth->irq[0]; in mtk_probe()
4989 eth->irq[i] = platform_get_irq(pdev, i); in mtk_probe()
4990 if (eth->irq[i] < 0) { in mtk_probe()
4991 dev_err(&pdev->dev, "no IRQ%d resource found\n", i); in mtk_probe()
4992 err = -ENXIO; in mtk_probe()
4996 for (i = 0; i < ARRAY_SIZE(eth->clks); i++) { in mtk_probe()
4997 eth->clks[i] = devm_clk_get(eth->dev, in mtk_probe()
4999 if (IS_ERR(eth->clks[i])) { in mtk_probe()
5000 if (PTR_ERR(eth->clks[i]) == -EPROBE_DEFER) { in mtk_probe()
5001 err = -EPROBE_DEFER; in mtk_probe()
5004 if (eth->soc->required_clks & BIT(i)) { in mtk_probe()
5005 dev_err(&pdev->dev, "clock %s not found\n", in mtk_probe()
5007 err = -EINVAL; in mtk_probe()
5010 eth->clks[i] = NULL; in mtk_probe()
5014 eth->msg_enable = netif_msg_init(mtk_msg_level, MTK_DEFAULT_MSG_ENABLE); in mtk_probe()
5015 INIT_WORK(ð->pending_work, mtk_pending_work); in mtk_probe()
5021 eth->hwlro = MTK_HAS_CAPS(eth->soc->caps, MTK_HWLRO); in mtk_probe()
5023 for_each_child_of_node(pdev->dev.of_node, mac_np) { in mtk_probe()
5025 "mediatek,eth-mac")) in mtk_probe()
5038 if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) { in mtk_probe()
5039 err = devm_request_irq(eth->dev, eth->irq[0], in mtk_probe()
5041 dev_name(eth->dev), eth); in mtk_probe()
5043 err = devm_request_irq(eth->dev, eth->irq[1], in mtk_probe()
5045 dev_name(eth->dev), eth); in mtk_probe()
5049 err = devm_request_irq(eth->dev, eth->irq[2], in mtk_probe()
5051 dev_name(eth->dev), eth); in mtk_probe()
5057 if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { in mtk_probe()
5063 if (eth->soc->offload_version) { in mtk_probe()
5064 u8 ppe_num = eth->soc->ppe_num; in mtk_probe()
5066 ppe_num = min_t(u8, ARRAY_SIZE(eth->ppe), ppe_num); in mtk_probe()
5068 u32 ppe_addr = eth->soc->reg_map->ppe_base; in mtk_probe()
5071 eth->ppe[i] = mtk_ppe_init(eth, eth->base + ppe_addr, i); in mtk_probe()
5073 if (!eth->ppe[i]) { in mtk_probe()
5074 err = -ENOMEM; in mtk_probe()
5085 if (!eth->netdev[i]) in mtk_probe()
5088 err = register_netdev(eth->netdev[i]); in mtk_probe()
5090 dev_err(eth->dev, "error bringing up device\n"); in mtk_probe()
5093 netif_info(eth, probe, eth->netdev[i], in mtk_probe()
5095 eth->netdev[i]->base_addr, eth->irq[0]); in mtk_probe()
5101 eth->dummy_dev = alloc_netdev_dummy(0); in mtk_probe()
5102 if (!eth->dummy_dev) { in mtk_probe()
5103 err = -ENOMEM; in mtk_probe()
5104 dev_err(eth->dev, "failed to allocated dummy device\n"); in mtk_probe()
5107 netif_napi_add(eth->dummy_dev, ð->tx_napi, mtk_napi_tx); in mtk_probe()
5108 netif_napi_add(eth->dummy_dev, ð->rx_napi, mtk_napi_rx); in mtk_probe()
5111 schedule_delayed_work(ð->reset.monitor_work, in mtk_probe()
5141 if (!eth->netdev[i]) in mtk_remove()
5143 mtk_stop(eth->netdev[i]); in mtk_remove()
5144 mac = netdev_priv(eth->netdev[i]); in mtk_remove()
5145 phylink_disconnect_phy(mac->phylink); in mtk_remove()
5151 netif_napi_del(ð->tx_napi); in mtk_remove()
5152 netif_napi_del(ð->rx_napi); in mtk_remove()
5154 free_netdev(eth->dummy_dev); in mtk_remove()
5409 { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data },
5410 { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data },
5411 { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data },
5412 { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data },
5413 { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data },
5414 { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data },
5415 { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data },
5416 { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data },
5417 { .compatible = "ralink,rt5350-eth", .data = &rt5350_data },