Lines Matching +full:hw +full:- +full:flow +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0-only
7 * of the original driver such as link fail-over and link management because
19 #include <linux/dma-mapping.h>
54 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
70 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))
77 static int debug = -1; /* defaults above */
85 static int disable_msi = -1;
94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
96 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
97 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
98 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
99 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
100 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
151 static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val) in gm_phy_write() argument
155 gma_write16(hw, port, GM_SMI_DATA, val); in gm_phy_write()
156 gma_write16(hw, port, GM_SMI_CTRL, in gm_phy_write()
160 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in gm_phy_write() local
161 if (ctrl == 0xffff) in gm_phy_write()
164 if (!(ctrl & GM_SMI_CT_BUSY)) in gm_phy_write()
170 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name); in gm_phy_write()
171 return -ETIMEDOUT; in gm_phy_write()
174 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in gm_phy_write()
175 return -EIO; in gm_phy_write()
178 static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val) in __gm_phy_read() argument
182 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) in __gm_phy_read()
186 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL); in __gm_phy_read() local
187 if (ctrl == 0xffff) in __gm_phy_read()
190 if (ctrl & GM_SMI_CT_RD_VAL) { in __gm_phy_read()
191 *val = gma_read16(hw, port, GM_SMI_DATA); in __gm_phy_read()
198 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name); in __gm_phy_read()
199 return -ETIMEDOUT; in __gm_phy_read()
201 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name); in __gm_phy_read()
202 return -EIO; in __gm_phy_read()
205 static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) in gm_phy_read() argument
208 __gm_phy_read(hw, port, reg, &v); in gm_phy_read()
213 static void sky2_power_on(struct sky2_hw *hw) in sky2_power_on() argument
216 sky2_write8(hw, B0_POWER_CTRL, in sky2_power_on()
220 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); in sky2_power_on()
222 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_power_on()
224 sky2_write8(hw, B2_Y2_CLK_GATE, in sky2_power_on()
229 sky2_write8(hw, B2_Y2_CLK_GATE, 0); in sky2_power_on()
231 if (hw->flags & SKY2_HW_ADV_POWER_CTL) { in sky2_power_on()
234 sky2_pci_write32(hw, PCI_DEV_REG3, 0); in sky2_power_on()
236 reg = sky2_pci_read32(hw, PCI_DEV_REG4); in sky2_power_on()
239 sky2_pci_write32(hw, PCI_DEV_REG4, reg); in sky2_power_on()
241 reg = sky2_pci_read32(hw, PCI_DEV_REG5); in sky2_power_on()
244 sky2_pci_write32(hw, PCI_DEV_REG5, reg); in sky2_power_on()
246 sky2_pci_write32(hw, PCI_CFG_REG_1, 0); in sky2_power_on()
248 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON); in sky2_power_on()
250 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ in sky2_power_on()
251 reg = sky2_read32(hw, B2_GP_IO); in sky2_power_on()
253 sky2_write32(hw, B2_GP_IO, reg); in sky2_power_on()
255 sky2_read32(hw, B2_GP_IO); in sky2_power_on()
259 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON); in sky2_power_on()
262 static void sky2_power_aux(struct sky2_hw *hw) in sky2_power_aux() argument
264 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_power_aux()
265 sky2_write8(hw, B2_Y2_CLK_GATE, 0); in sky2_power_aux()
268 sky2_write8(hw, B2_Y2_CLK_GATE, in sky2_power_aux()
274 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) && in sky2_power_aux()
275 pci_pme_capable(hw->pdev, PCI_D3cold)) in sky2_power_aux()
276 sky2_write8(hw, B0_POWER_CTRL, in sky2_power_aux()
281 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF); in sky2_power_aux()
284 static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port) in sky2_gmac_reset() argument
289 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); in sky2_gmac_reset()
291 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ in sky2_gmac_reset()
292 gma_write16(hw, port, GM_MC_ADDR_H2, 0); in sky2_gmac_reset()
293 gma_write16(hw, port, GM_MC_ADDR_H3, 0); in sky2_gmac_reset()
294 gma_write16(hw, port, GM_MC_ADDR_H4, 0); in sky2_gmac_reset()
296 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_gmac_reset()
298 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_gmac_reset()
301 /* flow control to advertise bits */
309 /* flow control to advertise bits when using 1000BaseX */
317 /* flow control to GMA disable bits */
326 static void sky2_phy_init(struct sky2_hw *hw, unsigned port) in sky2_phy_init() argument
328 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_phy_init()
329 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg; in sky2_phy_init() local
331 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) && in sky2_phy_init()
332 !(hw->flags & SKY2_HW_NEWER_PHY)) { in sky2_phy_init()
333 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
340 if (hw->chip_id == CHIP_ID_YUKON_EC) in sky2_phy_init()
347 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); in sky2_phy_init()
350 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
351 if (sky2_is_copper(hw)) { in sky2_phy_init()
352 if (!(hw->flags & SKY2_HW_GIGABIT)) { in sky2_phy_init()
354 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1; in sky2_phy_init()
356 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_phy_init()
357 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_phy_init()
361 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2); in sky2_phy_init()
363 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec); in sky2_phy_init()
367 ctrl &= ~PHY_M_PC_EN_DET_MSK; in sky2_phy_init()
370 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); in sky2_phy_init()
373 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) && in sky2_phy_init()
374 (hw->flags & SKY2_HW_NEWER_PHY)) { in sky2_phy_init()
376 ctrl &= ~PHY_M_PC_DSC_MSK; in sky2_phy_init()
377 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; in sky2_phy_init()
384 ctrl &= ~PHY_M_PC_MDIX_MSK; in sky2_phy_init()
387 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
390 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) { in sky2_phy_init()
391 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
393 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */ in sky2_phy_init()
394 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_init()
395 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
396 ctrl &= ~PHY_M_MAC_MD_MSK; in sky2_phy_init()
397 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX); in sky2_phy_init()
398 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
400 if (hw->pmd_type == 'P') { in sky2_phy_init()
402 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1); in sky2_phy_init()
404 /* for SFP-module set SIGDET polarity to low */ in sky2_phy_init()
405 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
406 ctrl |= PHY_M_FIB_SIGD_POL; in sky2_phy_init()
407 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
410 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
413 ctrl = PHY_CT_RESET; in sky2_phy_init()
418 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) { in sky2_phy_init()
419 if (sky2_is_copper(hw)) { in sky2_phy_init()
420 if (sky2->advertising & ADVERTISED_1000baseT_Full) in sky2_phy_init()
422 if (sky2->advertising & ADVERTISED_1000baseT_Half) in sky2_phy_init()
424 if (sky2->advertising & ADVERTISED_100baseT_Full) in sky2_phy_init()
426 if (sky2->advertising & ADVERTISED_100baseT_Half) in sky2_phy_init()
428 if (sky2->advertising & ADVERTISED_10baseT_Full) in sky2_phy_init()
430 if (sky2->advertising & ADVERTISED_10baseT_Half) in sky2_phy_init()
434 if (sky2->advertising & ADVERTISED_1000baseT_Full) in sky2_phy_init()
436 if (sky2->advertising & ADVERTISED_1000baseT_Half) in sky2_phy_init()
440 /* Restart Auto-negotiation */ in sky2_phy_init()
441 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; in sky2_phy_init()
446 /* Disable auto update for duplex flow control and duplex */ in sky2_phy_init()
449 switch (sky2->speed) { in sky2_phy_init()
451 ctrl |= PHY_CT_SP1000; in sky2_phy_init()
455 ctrl |= PHY_CT_SP100; in sky2_phy_init()
460 if (sky2->duplex == DUPLEX_FULL) { in sky2_phy_init()
462 ctrl |= PHY_CT_DUP_MD; in sky2_phy_init()
463 } else if (sky2->speed < SPEED_1000) in sky2_phy_init()
464 sky2->flow_mode = FC_NONE; in sky2_phy_init()
467 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) { in sky2_phy_init()
468 if (sky2_is_copper(hw)) in sky2_phy_init()
469 adv |= copper_fc_adv[sky2->flow_mode]; in sky2_phy_init()
471 adv |= fiber_fc_adv[sky2->flow_mode]; in sky2_phy_init()
474 reg |= gm_fc_disable[sky2->flow_mode]; in sky2_phy_init()
477 if (sky2->flow_mode & FC_RX) in sky2_phy_init()
478 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_phy_init()
480 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_phy_init()
483 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_phy_init()
485 if (hw->flags & SKY2_HW_GIGABIT) in sky2_phy_init()
486 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); in sky2_phy_init()
488 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); in sky2_phy_init()
489 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); in sky2_phy_init()
495 switch (hw->chip_id) { in sky2_phy_init()
500 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR); in sky2_phy_init()
503 ctrl &= ~PHY_M_FELP_LED1_MSK; in sky2_phy_init()
505 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL); in sky2_phy_init()
506 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
511 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_init()
512 ctrl |= PHY_M_PC_ENA_LIP_NP; in sky2_phy_init()
515 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB); in sky2_phy_init()
516 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_init()
518 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */ in sky2_phy_init()
519 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) | in sky2_phy_init()
523 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl); in sky2_phy_init()
527 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
530 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
533 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
540 gm_phy_write(hw, port, PHY_MARV_PHY_STAT, in sky2_phy_init()
549 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
555 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_phy_init()
558 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_phy_init()
561 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_phy_init()
568 gm_phy_write(hw, port, PHY_MARV_INT_MASK, in sky2_phy_init()
571 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_phy_init()
582 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) { in sky2_phy_init()
584 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255); in sky2_phy_init()
586 /* increase differential signal amplitude in 10BASE-T */ in sky2_phy_init()
587 gm_phy_write(hw, port, 0x18, 0xaa99); in sky2_phy_init()
588 gm_phy_write(hw, port, 0x17, 0x2011); in sky2_phy_init()
590 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_phy_init()
591 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */ in sky2_phy_init()
592 gm_phy_write(hw, port, 0x18, 0xa204); in sky2_phy_init()
593 gm_phy_write(hw, port, 0x17, 0x2002); in sky2_phy_init()
597 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
598 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_phy_init()
599 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_phy_init()
601 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17); in sky2_phy_init()
602 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60); in sky2_phy_init()
603 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { in sky2_phy_init()
605 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); in sky2_phy_init()
608 gm_phy_write(hw, port, 24, 0x2800); in sky2_phy_init()
609 gm_phy_write(hw, port, 23, 0x2001); in sky2_phy_init()
612 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
613 } else if (hw->chip_id != CHIP_ID_YUKON_EX && in sky2_phy_init()
614 hw->chip_id < CHIP_ID_YUKON_SUPR) { in sky2_phy_init()
615 /* no effect on Yukon-XL */ in sky2_phy_init()
616 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); in sky2_phy_init()
618 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) || in sky2_phy_init()
619 sky2->speed == SPEED_100) { in sky2_phy_init()
625 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); in sky2_phy_init()
627 } else if (hw->chip_id == CHIP_ID_YUKON_PRM && in sky2_phy_init()
628 (sky2_read8(hw, B2_MAC_CFG) & 0xf) == 0x7) { in sky2_phy_init()
655 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fb); in sky2_phy_init()
657 gm_phy_write(hw, port, 1, 0x4099); in sky2_phy_init()
658 gm_phy_write(hw, port, 3, 0x1120); in sky2_phy_init()
659 gm_phy_write(hw, port, 11, 0x113c); in sky2_phy_init()
660 gm_phy_write(hw, port, 14, 0x8100); in sky2_phy_init()
661 gm_phy_write(hw, port, 15, 0x112a); in sky2_phy_init()
662 gm_phy_write(hw, port, 17, 0x1008); in sky2_phy_init()
664 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fc); in sky2_phy_init()
665 gm_phy_write(hw, port, 1, 0x20b0); in sky2_phy_init()
667 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); in sky2_phy_init()
671 gm_phy_write(hw, port, 17, eee_afe[i].val); in sky2_phy_init()
672 gm_phy_write(hw, port, 16, eee_afe[i].reg | 1u<<13); in sky2_phy_init()
676 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_init()
678 /* Enable 10Base-Te (EEE) */ in sky2_phy_init()
679 if (hw->chip_id >= CHIP_ID_YUKON_PRM) { in sky2_phy_init()
680 reg = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); in sky2_phy_init()
681 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, in sky2_phy_init()
686 /* Enable phy interrupt on auto-negotiation complete (or link up) */ in sky2_phy_init()
687 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) in sky2_phy_init()
688 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); in sky2_phy_init()
690 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_phy_init()
696 static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port) in sky2_phy_power_up() argument
700 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_phy_power_up()
701 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_up()
704 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1) in sky2_phy_power_up()
707 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_phy_power_up()
708 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_phy_power_up()
709 sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_up()
711 if (hw->chip_id == CHIP_ID_YUKON_FE) in sky2_phy_power_up()
712 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE); in sky2_phy_power_up()
713 else if (hw->flags & SKY2_HW_ADV_POWER_CTL) in sky2_phy_power_up()
714 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_up()
717 static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port) in sky2_phy_power_down() argument
720 u16 ctrl; in sky2_phy_power_down() local
723 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_down()
726 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_phy_power_down()
728 if (hw->flags & SKY2_HW_NEWER_PHY) { in sky2_phy_power_down()
730 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
732 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
734 ctrl &= ~PHY_M_MAC_GMIF_PUP; in sky2_phy_power_down()
735 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
738 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
742 gma_write16(hw, port, GM_GP_CTRL, in sky2_phy_power_down()
747 if (hw->chip_id != CHIP_ID_YUKON_EC) { in sky2_phy_power_down()
748 if (hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_phy_power_down()
750 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2); in sky2_phy_power_down()
752 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL); in sky2_phy_power_down()
754 ctrl |= PHY_M_PC_POW_D_ENA; in sky2_phy_power_down()
755 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl); in sky2_phy_power_down()
758 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); in sky2_phy_power_down()
762 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN); in sky2_phy_power_down()
765 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_phy_power_down()
766 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_phy_power_down()
768 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_phy_power_down()
769 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_phy_power_down()
777 reg = gma_read16(sky2->hw, sky2->port, GM_SERIAL_MODE); in sky2_set_ipg()
779 if (sky2->speed > SPEED_100) in sky2_set_ipg()
783 gma_write16(sky2->hw, sky2->port, GM_SERIAL_MODE, reg); in sky2_set_ipg()
789 struct sky2_hw *hw = sky2->hw; in sky2_enable_rx_tx() local
790 unsigned port = sky2->port; in sky2_enable_rx_tx()
793 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_enable_rx_tx()
795 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_enable_rx_tx()
801 spin_lock_bh(&sky2->phy_lock); in sky2_phy_reinit()
802 sky2_phy_init(sky2->hw, sky2->port); in sky2_phy_reinit()
804 spin_unlock_bh(&sky2->phy_lock); in sky2_phy_reinit()
810 struct sky2_hw *hw = sky2->hw; in sky2_wol_init() local
811 unsigned port = sky2->port; in sky2_wol_init()
813 u16 ctrl; in sky2_wol_init() local
816 sky2_write16(hw, B0_CTST, CS_RST_CLR); in sky2_wol_init()
817 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_wol_init()
819 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_wol_init()
820 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_wol_init()
823 * sky2_reset will re-enable on resume in sky2_wol_init()
825 save_mode = sky2->flow_mode; in sky2_wol_init()
826 ctrl = sky2->advertising; in sky2_wol_init()
828 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full); in sky2_wol_init()
829 sky2->flow_mode = FC_NONE; in sky2_wol_init()
831 spin_lock_bh(&sky2->phy_lock); in sky2_wol_init()
832 sky2_phy_power_up(hw, port); in sky2_wol_init()
833 sky2_phy_init(hw, port); in sky2_wol_init()
834 spin_unlock_bh(&sky2->phy_lock); in sky2_wol_init()
836 sky2->flow_mode = save_mode; in sky2_wol_init()
837 sky2->advertising = ctrl; in sky2_wol_init()
839 /* Set GMAC to no flow control and auto update for speed/duplex */ in sky2_wol_init()
840 gma_write16(hw, port, GM_GP_CTRL, in sky2_wol_init()
845 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR), in sky2_wol_init()
846 sky2->netdev->dev_addr, ETH_ALEN); in sky2_wol_init()
849 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT); in sky2_wol_init()
850 ctrl = 0; in sky2_wol_init()
851 if (sky2->wol & WAKE_PHY) in sky2_wol_init()
852 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT; in sky2_wol_init()
854 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT; in sky2_wol_init()
856 if (sky2->wol & WAKE_MAGIC) in sky2_wol_init()
857 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT; in sky2_wol_init()
859 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT; in sky2_wol_init()
861 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT; in sky2_wol_init()
862 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); in sky2_wol_init()
865 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF); in sky2_wol_init()
867 /* Needed by some broken BIOSes, use PCI rather than PCI-e for WOL */ in sky2_wol_init()
869 u32 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); in sky2_wol_init()
871 sky2_pci_write32(hw, PCI_DEV_REG1, reg1); in sky2_wol_init()
875 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_wol_init()
876 sky2_read32(hw, B0_CTST); in sky2_wol_init()
879 static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) in sky2_set_tx_stfwd() argument
881 struct net_device *dev = hw->dev[port]; in sky2_set_tx_stfwd()
883 if ( (hw->chip_id == CHIP_ID_YUKON_EX && in sky2_set_tx_stfwd()
884 hw->chip_rev != CHIP_REV_YU_EX_A0) || in sky2_set_tx_stfwd()
885 hw->chip_id >= CHIP_ID_YUKON_FE_P) { in sky2_set_tx_stfwd()
886 /* Yukon-Extreme B0 and further Extreme devices */ in sky2_set_tx_stfwd()
887 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
888 } else if (dev->mtu > ETH_DATA_LEN) { in sky2_set_tx_stfwd()
890 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), in sky2_set_tx_stfwd()
893 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); in sky2_set_tx_stfwd()
895 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); in sky2_set_tx_stfwd()
898 static void sky2_mac_init(struct sky2_hw *hw, unsigned port) in sky2_mac_init() argument
900 struct sky2_port *sky2 = netdev_priv(hw->dev[port]); in sky2_mac_init()
904 const u8 *addr = hw->dev[port]->dev_addr; in sky2_mac_init()
906 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_mac_init()
907 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_mac_init()
909 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
911 if (hw->chip_id == CHIP_ID_YUKON_XL && in sky2_mac_init()
912 hw->chip_rev == CHIP_REV_YU_XL_A0 && in sky2_mac_init()
914 /* WA DEV_472 -- looks like crossed wires on port 2 */ in sky2_mac_init()
916 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
918 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET); in sky2_mac_init()
919 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR); in sky2_mac_init()
920 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL || in sky2_mac_init()
921 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 || in sky2_mac_init()
922 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0); in sky2_mac_init()
925 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_init()
928 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK); in sky2_mac_init()
930 spin_lock_bh(&sky2->phy_lock); in sky2_mac_init()
931 sky2_phy_power_up(hw, port); in sky2_mac_init()
932 sky2_phy_init(hw, port); in sky2_mac_init()
933 spin_unlock_bh(&sky2->phy_lock); in sky2_mac_init()
936 reg = gma_read16(hw, port, GM_PHY_ADDR); in sky2_mac_init()
937 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); in sky2_mac_init()
940 gma_read16(hw, port, i); in sky2_mac_init()
941 gma_write16(hw, port, GM_PHY_ADDR, reg); in sky2_mac_init()
944 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); in sky2_mac_init()
947 gma_write16(hw, port, GM_RX_CTRL, in sky2_mac_init()
950 /* transmit flow control */ in sky2_mac_init()
951 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); in sky2_mac_init()
954 gma_write16(hw, port, GM_TX_PARAM, in sky2_mac_init()
964 if (hw->dev[port]->mtu > ETH_DATA_LEN) in sky2_mac_init()
967 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_mac_init()
968 hw->chip_rev == CHIP_REV_YU_EC_U_B1) in sky2_mac_init()
971 gma_write16(hw, port, GM_SERIAL_MODE, reg); in sky2_mac_init()
974 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); in sky2_mac_init()
977 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); in sky2_mac_init()
980 gma_write16(hw, port, GM_TX_IRQ_MSK, 0); in sky2_mac_init()
981 gma_write16(hw, port, GM_RX_IRQ_MSK, 0); in sky2_mac_init()
982 gma_write16(hw, port, GM_TR_IRQ_MSK, 0); in sky2_mac_init()
985 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
987 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_mac_init()
988 hw->chip_id == CHIP_ID_YUKON_FE_P) in sky2_mac_init()
991 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
993 if (hw->chip_id == CHIP_ID_YUKON_XL) { in sky2_mac_init()
994 /* Hardware errata - clear flush mask */ in sky2_mac_init()
995 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0); in sky2_mac_init()
997 /* Flush Rx MAC FIFO on any flow control or error */ in sky2_mac_init()
998 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR); in sky2_mac_init()
1004 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1005 hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_mac_init()
1007 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg); in sky2_mac_init()
1010 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); in sky2_mac_init()
1011 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); in sky2_mac_init()
1014 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) { in sky2_mac_init()
1016 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1017 hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_mac_init()
1021 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg); in sky2_mac_init()
1022 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8); in sky2_mac_init()
1024 sky2_set_tx_stfwd(hw, port); in sky2_mac_init()
1027 if (hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_mac_init()
1028 hw->chip_rev == CHIP_REV_YU_FE2_A0) { in sky2_mac_init()
1030 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA)); in sky2_mac_init()
1032 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg); in sky2_mac_init()
1037 static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space) in sky2_ramset() argument
1041 /* convert from K bytes to qwords used for hw register */ in sky2_ramset()
1044 end = start + space - 1; in sky2_ramset()
1046 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); in sky2_ramset()
1047 sky2_write32(hw, RB_ADDR(q, RB_START), start); in sky2_ramset()
1048 sky2_write32(hw, RB_ADDR(q, RB_END), end); in sky2_ramset()
1049 sky2_write32(hw, RB_ADDR(q, RB_WP), start); in sky2_ramset()
1050 sky2_write32(hw, RB_ADDR(q, RB_RP), start); in sky2_ramset()
1053 u32 tp = space - space/4; in sky2_ramset()
1059 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp); in sky2_ramset()
1060 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2); in sky2_ramset()
1062 tp = space - 8192/8; in sky2_ramset()
1063 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp); in sky2_ramset()
1064 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4); in sky2_ramset()
1069 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD); in sky2_ramset()
1072 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD); in sky2_ramset()
1073 sky2_read8(hw, RB_ADDR(q, RB_CTRL)); in sky2_ramset()
1077 static void sky2_qset(struct sky2_hw *hw, u16 q) in sky2_qset() argument
1079 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET); in sky2_qset()
1080 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT); in sky2_qset()
1081 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON); in sky2_qset()
1082 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT); in sky2_qset()
1088 static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr, in sky2_prefetch_init() argument
1091 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); in sky2_prefetch_init()
1092 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR); in sky2_prefetch_init()
1093 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr)); in sky2_prefetch_init()
1094 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr)); in sky2_prefetch_init()
1095 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last); in sky2_prefetch_init()
1096 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON); in sky2_prefetch_init()
1098 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL)); in sky2_prefetch_init()
1103 struct sky2_tx_le *le = sky2->tx_le + *slot; in get_tx_le()
1105 *slot = RING_NEXT(*slot, sky2->tx_ring_size); in get_tx_le()
1106 le->ctrl = 0; in get_tx_le()
1114 sky2->tx_prod = sky2->tx_cons = 0; in tx_init()
1115 sky2->tx_tcpsum = 0; in tx_init()
1116 sky2->tx_last_mss = 0; in tx_init()
1117 netdev_reset_queue(sky2->netdev); in tx_init()
1119 le = get_tx_le(sky2, &sky2->tx_prod); in tx_init()
1120 le->addr = 0; in tx_init()
1121 le->opcode = OP_ADDR64 | HW_OWNER; in tx_init()
1122 sky2->tx_last_upper = 0; in tx_init()
1126 static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx) in sky2_put_idx() argument
1130 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx); in sky2_put_idx()
1136 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put; in sky2_next_rx()
1137 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE); in sky2_next_rx()
1138 le->ctrl = 0; in sky2_next_rx()
1147 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); in sky2_get_rx_threshold()
1150 return (size - 8) / sizeof(u32); in sky2_get_rx_threshold()
1159 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); in sky2_get_rx_data_size()
1161 sky2->rx_nfrags = size >> PAGE_SHIFT; in sky2_get_rx_data_size()
1162 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr)); in sky2_get_rx_data_size()
1165 size -= sky2->rx_nfrags << PAGE_SHIFT; in sky2_get_rx_data_size()
1184 le->addr = cpu_to_le32(upper_32_bits(map)); in sky2_rx_add()
1185 le->opcode = OP_ADDR64 | HW_OWNER; in sky2_rx_add()
1189 le->addr = cpu_to_le32(lower_32_bits(map)); in sky2_rx_add()
1190 le->length = cpu_to_le16(len); in sky2_rx_add()
1191 le->opcode = op | HW_OWNER; in sky2_rx_add()
1200 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size); in sky2_rx_submit()
1202 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++) in sky2_rx_submit()
1203 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE); in sky2_rx_submit()
1210 struct sk_buff *skb = re->skb; in sky2_rx_map_skb()
1213 re->data_addr = dma_map_single(&pdev->dev, skb->data, size, in sky2_rx_map_skb()
1215 if (dma_mapping_error(&pdev->dev, re->data_addr)) in sky2_rx_map_skb()
1220 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in sky2_rx_map_skb()
1221 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in sky2_rx_map_skb()
1223 re->frag_addr[i] = skb_frag_dma_map(&pdev->dev, frag, 0, in sky2_rx_map_skb()
1227 if (dma_mapping_error(&pdev->dev, re->frag_addr[i])) in sky2_rx_map_skb()
1233 while (--i >= 0) { in sky2_rx_map_skb()
1234 dma_unmap_page(&pdev->dev, re->frag_addr[i], in sky2_rx_map_skb()
1235 skb_frag_size(&skb_shinfo(skb)->frags[i]), in sky2_rx_map_skb()
1239 dma_unmap_single(&pdev->dev, re->data_addr, in sky2_rx_map_skb()
1244 dev_warn(&pdev->dev, "%s: rx mapping error\n", in sky2_rx_map_skb()
1245 skb->dev->name); in sky2_rx_map_skb()
1246 return -EIO; in sky2_rx_map_skb()
1251 struct sk_buff *skb = re->skb; in sky2_rx_unmap_skb()
1254 dma_unmap_single(&pdev->dev, re->data_addr, in sky2_rx_unmap_skb()
1257 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) in sky2_rx_unmap_skb()
1258 dma_unmap_page(&pdev->dev, re->frag_addr[i], in sky2_rx_unmap_skb()
1259 skb_frag_size(&skb_shinfo(skb)->frags[i]), in sky2_rx_unmap_skb()
1271 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN); in rx_set_checksum()
1272 le->ctrl = 0; in rx_set_checksum()
1273 le->opcode = OP_TCPSTART | HW_OWNER; in rx_set_checksum()
1275 sky2_write32(sky2->hw, in rx_set_checksum()
1276 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_checksum()
1277 (sky2->netdev->features & NETIF_F_RXCSUM) in rx_set_checksum()
1285 struct sky2_hw *hw = sky2->hw; in rx_set_rss() local
1289 if (hw->flags & SKY2_HW_NEW_LE) { in rx_set_rss()
1291 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL); in rx_set_rss()
1300 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4), in rx_set_rss()
1304 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), in rx_set_rss()
1307 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1310 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in rx_set_rss()
1315 * The RX Stop command will not work for Yukon-2 if the BMU does not
1326 struct sky2_hw *hw = sky2->hw; in sky2_rx_stop() local
1327 unsigned rxq = rxqaddr[sky2->port]; in sky2_rx_stop()
1331 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD); in sky2_rx_stop()
1334 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL)) in sky2_rx_stop()
1335 == sky2_read8(hw, RB_ADDR(rxq, Q_RL))) in sky2_rx_stop()
1338 netdev_warn(sky2->netdev, "receiver stop failed\n"); in sky2_rx_stop()
1340 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); in sky2_rx_stop()
1343 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); in sky2_rx_stop()
1351 if (sky2->rx_le) in sky2_rx_clean()
1352 memset(sky2->rx_le, 0, RX_LE_BYTES); in sky2_rx_clean()
1354 for (i = 0; i < sky2->rx_pending; i++) { in sky2_rx_clean()
1355 struct rx_ring_info *re = sky2->rx_ring + i; in sky2_rx_clean()
1357 if (re->skb) { in sky2_rx_clean()
1358 sky2_rx_unmap_skb(sky2->hw->pdev, re); in sky2_rx_clean()
1359 kfree_skb(re->skb); in sky2_rx_clean()
1360 re->skb = NULL; in sky2_rx_clean()
1370 struct sky2_hw *hw = sky2->hw; in sky2_ioctl() local
1371 int err = -EOPNOTSUPP; in sky2_ioctl()
1374 return -ENODEV; /* Phy still in reset */ in sky2_ioctl()
1378 data->phy_id = PHY_ADDR_MARV; in sky2_ioctl()
1384 spin_lock_bh(&sky2->phy_lock); in sky2_ioctl()
1385 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val); in sky2_ioctl()
1386 spin_unlock_bh(&sky2->phy_lock); in sky2_ioctl()
1388 data->val_out = val; in sky2_ioctl()
1393 spin_lock_bh(&sky2->phy_lock); in sky2_ioctl()
1394 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f, in sky2_ioctl()
1395 data->val_in); in sky2_ioctl()
1396 spin_unlock_bh(&sky2->phy_lock); in sky2_ioctl()
1407 struct sky2_hw *hw = sky2->hw; in sky2_vlan_mode() local
1408 u16 port = sky2->port; in sky2_vlan_mode()
1411 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), in sky2_vlan_mode()
1414 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), in sky2_vlan_mode()
1418 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_vlan_mode()
1421 dev->vlan_features |= SKY2_VLAN_OFFLOADS; in sky2_vlan_mode()
1423 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), in sky2_vlan_mode()
1426 /* Can't do transmit offload of vlan without hw vlan */ in sky2_vlan_mode()
1427 dev->vlan_features &= ~SKY2_VLAN_OFFLOADS; in sky2_vlan_mode()
1432 static inline unsigned sky2_rx_pad(const struct sky2_hw *hw) in sky2_rx_pad() argument
1434 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2; in sky2_rx_pad()
1439 * make the skb non-linear with a fragment list of pages.
1446 skb = __netdev_alloc_skb(sky2->netdev, in sky2_rx_alloc()
1447 sky2->rx_data_size + sky2_rx_pad(sky2->hw), in sky2_rx_alloc()
1452 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) { in sky2_rx_alloc()
1460 start = PTR_ALIGN(skb->data, 8); in sky2_rx_alloc()
1461 skb_reserve(skb, start - skb->data); in sky2_rx_alloc()
1465 for (i = 0; i < sky2->rx_nfrags; i++) { in sky2_rx_alloc()
1482 sky2_put_idx(sky2->hw, rxq, sky2->rx_put); in sky2_rx_update()
1487 struct sky2_hw *hw = sky2->hw; in sky2_alloc_rx_skbs() local
1490 sky2->rx_data_size = sky2_get_rx_data_size(sky2); in sky2_alloc_rx_skbs()
1493 for (i = 0; i < sky2->rx_pending; i++) { in sky2_alloc_rx_skbs()
1494 struct rx_ring_info *re = sky2->rx_ring + i; in sky2_alloc_rx_skbs()
1496 re->skb = sky2_rx_alloc(sky2, GFP_KERNEL); in sky2_alloc_rx_skbs()
1497 if (!re->skb) in sky2_alloc_rx_skbs()
1498 return -ENOMEM; in sky2_alloc_rx_skbs()
1500 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) { in sky2_alloc_rx_skbs()
1501 dev_kfree_skb(re->skb); in sky2_alloc_rx_skbs()
1502 re->skb = NULL; in sky2_alloc_rx_skbs()
1503 return -ENOMEM; in sky2_alloc_rx_skbs()
1520 struct sky2_hw *hw = sky2->hw; in sky2_rx_start() local
1522 unsigned rxq = rxqaddr[sky2->port]; in sky2_rx_start()
1525 sky2->rx_put = sky2->rx_next = 0; in sky2_rx_start()
1526 sky2_qset(hw, rxq); in sky2_rx_start()
1529 if (pci_is_pcie(hw->pdev)) in sky2_rx_start()
1530 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX); in sky2_rx_start()
1535 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_rx_start()
1536 hw->chip_rev > CHIP_REV_YU_EC_U_A0) in sky2_rx_start()
1537 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); in sky2_rx_start()
1539 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); in sky2_rx_start()
1541 if (!(hw->flags & SKY2_HW_NEW_LE)) in sky2_rx_start()
1544 if (!(hw->flags & SKY2_HW_RSS_BROKEN)) in sky2_rx_start()
1545 rx_set_rss(sky2->netdev, sky2->netdev->features); in sky2_rx_start()
1548 for (i = 0; i < sky2->rx_pending; i++) { in sky2_rx_start()
1549 re = sky2->rx_ring + i; in sky2_rx_start()
1561 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF); in sky2_rx_start()
1563 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh); in sky2_rx_start()
1564 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON); in sky2_rx_start()
1570 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_rx_start()
1571 hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_rx_start()
1579 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF); in sky2_rx_start()
1582 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) { in sky2_rx_start()
1584 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL), in sky2_rx_start()
1588 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST), in sky2_rx_start()
1595 struct sky2_hw *hw = sky2->hw; in sky2_alloc_buffers() local
1598 sky2->tx_le = dma_alloc_coherent(&hw->pdev->dev, in sky2_alloc_buffers()
1599 sky2->tx_ring_size * sizeof(struct sky2_tx_le), in sky2_alloc_buffers()
1600 &sky2->tx_le_map, GFP_KERNEL); in sky2_alloc_buffers()
1601 if (!sky2->tx_le) in sky2_alloc_buffers()
1604 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info), in sky2_alloc_buffers()
1606 if (!sky2->tx_ring) in sky2_alloc_buffers()
1609 sky2->rx_le = dma_alloc_coherent(&hw->pdev->dev, RX_LE_BYTES, in sky2_alloc_buffers()
1610 &sky2->rx_le_map, GFP_KERNEL); in sky2_alloc_buffers()
1611 if (!sky2->rx_le) in sky2_alloc_buffers()
1614 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info), in sky2_alloc_buffers()
1616 if (!sky2->rx_ring) in sky2_alloc_buffers()
1621 return -ENOMEM; in sky2_alloc_buffers()
1626 struct sky2_hw *hw = sky2->hw; in sky2_free_buffers() local
1630 if (sky2->rx_le) { in sky2_free_buffers()
1631 dma_free_coherent(&hw->pdev->dev, RX_LE_BYTES, sky2->rx_le, in sky2_free_buffers()
1632 sky2->rx_le_map); in sky2_free_buffers()
1633 sky2->rx_le = NULL; in sky2_free_buffers()
1635 if (sky2->tx_le) { in sky2_free_buffers()
1636 dma_free_coherent(&hw->pdev->dev, in sky2_free_buffers()
1637 sky2->tx_ring_size * sizeof(struct sky2_tx_le), in sky2_free_buffers()
1638 sky2->tx_le, sky2->tx_le_map); in sky2_free_buffers()
1639 sky2->tx_le = NULL; in sky2_free_buffers()
1641 kfree(sky2->tx_ring); in sky2_free_buffers()
1642 kfree(sky2->rx_ring); in sky2_free_buffers()
1644 sky2->tx_ring = NULL; in sky2_free_buffers()
1645 sky2->rx_ring = NULL; in sky2_free_buffers()
1650 struct sky2_hw *hw = sky2->hw; in sky2_hw_up() local
1651 unsigned port = sky2->port; in sky2_hw_up()
1654 struct net_device *otherdev = hw->dev[sky2->port^1]; in sky2_hw_up()
1659 * On dual port PCI-X card, there is an problem where status in sky2_hw_up()
1663 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) { in sky2_hw_up()
1666 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); in sky2_hw_up()
1668 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); in sky2_hw_up()
1671 sky2_mac_init(hw, port); in sky2_hw_up()
1674 ramsize = sky2_read8(hw, B2_E_0) * 4; in sky2_hw_up()
1678 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize); in sky2_hw_up()
1682 rxspace = 8 + (2*(ramsize - 16))/3; in sky2_hw_up()
1684 sky2_ramset(hw, rxqaddr[port], 0, rxspace); in sky2_hw_up()
1685 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace); in sky2_hw_up()
1688 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL), in sky2_hw_up()
1692 sky2_qset(hw, txqaddr[port]); in sky2_hw_up()
1695 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0) in sky2_hw_up()
1696 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); in sky2_hw_up()
1699 if (hw->chip_id == CHIP_ID_YUKON_EC_U && in sky2_hw_up()
1700 hw->chip_rev == CHIP_REV_YU_EC_U_A0) in sky2_hw_up()
1701 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); in sky2_hw_up()
1703 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, in sky2_hw_up()
1704 sky2->tx_ring_size - 1); in sky2_hw_up()
1706 sky2_vlan_mode(sky2->netdev, sky2->netdev->features); in sky2_hw_up()
1707 netdev_update_features(sky2->netdev); in sky2_hw_up()
1713 static int sky2_setup_irq(struct sky2_hw *hw, const char *name) in sky2_setup_irq() argument
1715 struct pci_dev *pdev = hw->pdev; in sky2_setup_irq()
1718 err = request_irq(pdev->irq, sky2_intr, in sky2_setup_irq()
1719 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED, in sky2_setup_irq()
1720 name, hw); in sky2_setup_irq()
1722 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq); in sky2_setup_irq()
1724 hw->flags |= SKY2_HW_IRQ_SETUP; in sky2_setup_irq()
1726 napi_enable(&hw->napi); in sky2_setup_irq()
1727 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); in sky2_setup_irq()
1728 sky2_read32(hw, B0_IMSK); in sky2_setup_irq()
1739 struct sky2_hw *hw = sky2->hw; in sky2_open() local
1740 unsigned port = sky2->port; in sky2_open()
1751 if (hw->ports == 1 && (err = sky2_setup_irq(hw, dev->name))) in sky2_open()
1757 imask = sky2_read32(hw, B0_IMSK); in sky2_open()
1759 if (hw->chip_id == CHIP_ID_YUKON_OPT || in sky2_open()
1760 hw->chip_id == CHIP_ID_YUKON_PRM || in sky2_open()
1761 hw->chip_id == CHIP_ID_YUKON_OP_2) in sky2_open()
1765 sky2_write32(hw, B0_IMSK, imask); in sky2_open()
1766 sky2_read32(hw, B0_IMSK); in sky2_open()
1780 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1); in tx_inuse()
1786 return sky2->tx_pending - tx_inuse(sky2); in tx_avail()
1794 count = (skb_shinfo(skb)->nr_frags + 1) in tx_le_req()
1802 if (skb->ip_summed == CHECKSUM_PARTIAL) in tx_le_req()
1810 if (re->flags & TX_MAP_SINGLE) in sky2_tx_unmap()
1811 dma_unmap_single(&pdev->dev, dma_unmap_addr(re, mapaddr), in sky2_tx_unmap()
1813 else if (re->flags & TX_MAP_PAGE) in sky2_tx_unmap()
1814 dma_unmap_page(&pdev->dev, dma_unmap_addr(re, mapaddr), in sky2_tx_unmap()
1816 re->flags = 0; in sky2_tx_unmap()
1829 struct sky2_hw *hw = sky2->hw; in sky2_xmit_frame() local
1837 u8 ctrl; in sky2_xmit_frame() local
1843 mapping = dma_map_single(&hw->pdev->dev, skb->data, len, in sky2_xmit_frame()
1846 if (dma_mapping_error(&hw->pdev->dev, mapping)) in sky2_xmit_frame()
1849 slot = sky2->tx_prod; in sky2_xmit_frame()
1851 "tx queued, slot %u, len %d\n", slot, skb->len); in sky2_xmit_frame()
1855 if (upper != sky2->tx_last_upper) { in sky2_xmit_frame()
1857 le->addr = cpu_to_le32(upper); in sky2_xmit_frame()
1858 sky2->tx_last_upper = upper; in sky2_xmit_frame()
1859 le->opcode = OP_ADDR64 | HW_OWNER; in sky2_xmit_frame()
1863 mss = skb_shinfo(skb)->gso_size; in sky2_xmit_frame()
1866 if (!(hw->flags & SKY2_HW_NEW_LE)) in sky2_xmit_frame()
1869 if (mss != sky2->tx_last_mss) { in sky2_xmit_frame()
1871 le->addr = cpu_to_le32(mss); in sky2_xmit_frame()
1873 if (hw->flags & SKY2_HW_NEW_LE) in sky2_xmit_frame()
1874 le->opcode = OP_MSS | HW_OWNER; in sky2_xmit_frame()
1876 le->opcode = OP_LRGLEN | HW_OWNER; in sky2_xmit_frame()
1877 sky2->tx_last_mss = mss; in sky2_xmit_frame()
1881 ctrl = 0; in sky2_xmit_frame()
1887 le->addr = 0; in sky2_xmit_frame()
1888 le->opcode = OP_VLAN|HW_OWNER; in sky2_xmit_frame()
1890 le->opcode |= OP_VLAN; in sky2_xmit_frame()
1891 le->length = cpu_to_be16(skb_vlan_tag_get(skb)); in sky2_xmit_frame()
1892 ctrl |= INS_VLAN; in sky2_xmit_frame()
1896 if (skb->ip_summed == CHECKSUM_PARTIAL) { in sky2_xmit_frame()
1898 if (hw->flags & SKY2_HW_AUTO_TX_SUM) in sky2_xmit_frame()
1899 ctrl |= CALSUM; /* auto checksum */ in sky2_xmit_frame()
1905 tcpsum |= offset + skb->csum_offset; /* sum write */ in sky2_xmit_frame()
1907 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM; in sky2_xmit_frame()
1908 if (ip_hdr(skb)->protocol == IPPROTO_UDP) in sky2_xmit_frame()
1909 ctrl |= UDPTCP; in sky2_xmit_frame()
1911 if (tcpsum != sky2->tx_tcpsum) { in sky2_xmit_frame()
1912 sky2->tx_tcpsum = tcpsum; in sky2_xmit_frame()
1915 le->addr = cpu_to_le32(tcpsum); in sky2_xmit_frame()
1916 le->length = 0; /* initial checksum value */ in sky2_xmit_frame()
1917 le->ctrl = 1; /* one packet */ in sky2_xmit_frame()
1918 le->opcode = OP_TCPLISW | HW_OWNER; in sky2_xmit_frame()
1923 re = sky2->tx_ring + slot; in sky2_xmit_frame()
1924 re->flags = TX_MAP_SINGLE; in sky2_xmit_frame()
1929 le->addr = cpu_to_le32(lower_32_bits(mapping)); in sky2_xmit_frame()
1930 le->length = cpu_to_le16(len); in sky2_xmit_frame()
1931 le->ctrl = ctrl; in sky2_xmit_frame()
1932 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER); in sky2_xmit_frame()
1935 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { in sky2_xmit_frame()
1936 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in sky2_xmit_frame()
1938 mapping = skb_frag_dma_map(&hw->pdev->dev, frag, 0, in sky2_xmit_frame()
1941 if (dma_mapping_error(&hw->pdev->dev, mapping)) in sky2_xmit_frame()
1945 if (upper != sky2->tx_last_upper) { in sky2_xmit_frame()
1947 le->addr = cpu_to_le32(upper); in sky2_xmit_frame()
1948 sky2->tx_last_upper = upper; in sky2_xmit_frame()
1949 le->opcode = OP_ADDR64 | HW_OWNER; in sky2_xmit_frame()
1952 re = sky2->tx_ring + slot; in sky2_xmit_frame()
1953 re->flags = TX_MAP_PAGE; in sky2_xmit_frame()
1958 le->addr = cpu_to_le32(lower_32_bits(mapping)); in sky2_xmit_frame()
1959 le->length = cpu_to_le16(skb_frag_size(frag)); in sky2_xmit_frame()
1960 le->ctrl = ctrl; in sky2_xmit_frame()
1961 le->opcode = OP_BUFFER | HW_OWNER; in sky2_xmit_frame()
1964 re->skb = skb; in sky2_xmit_frame()
1965 le->ctrl |= EOP; in sky2_xmit_frame()
1967 sky2->tx_prod = slot; in sky2_xmit_frame()
1972 netdev_sent_queue(dev, skb->len); in sky2_xmit_frame()
1973 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod); in sky2_xmit_frame()
1978 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) { in sky2_xmit_frame()
1979 re = sky2->tx_ring + i; in sky2_xmit_frame()
1981 sky2_tx_unmap(hw->pdev, re); in sky2_xmit_frame()
1986 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name); in sky2_xmit_frame()
1995 * 1. The hardware will tell us about partial completion of multi-part
2003 struct net_device *dev = sky2->netdev; in sky2_tx_complete()
2007 BUG_ON(done >= sky2->tx_ring_size); in sky2_tx_complete()
2009 for (idx = sky2->tx_cons; idx != done; in sky2_tx_complete()
2010 idx = RING_NEXT(idx, sky2->tx_ring_size)) { in sky2_tx_complete()
2011 struct tx_ring_info *re = sky2->tx_ring + idx; in sky2_tx_complete()
2012 struct sk_buff *skb = re->skb; in sky2_tx_complete()
2014 sky2_tx_unmap(sky2->hw->pdev, re); in sky2_tx_complete()
2021 bytes_compl += skb->len; in sky2_tx_complete()
2023 re->skb = NULL; in sky2_tx_complete()
2026 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size); in sky2_tx_complete()
2030 sky2->tx_cons = idx; in sky2_tx_complete()
2035 u64_stats_update_begin(&sky2->tx_stats.syncp); in sky2_tx_complete()
2036 sky2->tx_stats.packets += pkts_compl; in sky2_tx_complete()
2037 sky2->tx_stats.bytes += bytes_compl; in sky2_tx_complete()
2038 u64_stats_update_end(&sky2->tx_stats.syncp); in sky2_tx_complete()
2041 static void sky2_tx_reset(struct sky2_hw *hw, unsigned port) in sky2_tx_reset() argument
2044 sky2_write8(hw, SK_REG(port, TXA_CTRL), in sky2_tx_reset()
2048 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); in sky2_tx_reset()
2049 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); in sky2_tx_reset()
2052 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), in sky2_tx_reset()
2056 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL), in sky2_tx_reset()
2059 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); in sky2_tx_reset()
2060 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); in sky2_tx_reset()
2062 sky2_read32(hw, B0_CTST); in sky2_tx_reset()
2067 struct sky2_hw *hw = sky2->hw; in sky2_hw_down() local
2068 unsigned port = sky2->port; in sky2_hw_down()
2069 u16 ctrl; in sky2_hw_down() local
2071 /* Force flow control off */ in sky2_hw_down()
2072 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_hw_down()
2075 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP); in sky2_hw_down()
2076 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR)); in sky2_hw_down()
2078 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), in sky2_hw_down()
2081 ctrl = gma_read16(hw, port, GM_GP_CTRL); in sky2_hw_down()
2082 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA); in sky2_hw_down()
2083 gma_write16(hw, port, GM_GP_CTRL, ctrl); in sky2_hw_down()
2085 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_hw_down()
2088 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && in sky2_hw_down()
2089 port == 0 && hw->dev[1] && netif_running(hw->dev[1]))) in sky2_hw_down()
2090 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); in sky2_hw_down()
2092 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); in sky2_hw_down()
2095 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0); in sky2_hw_down()
2096 sky2_write32(hw, STAT_TX_TIMER_CNT, 0); in sky2_hw_down()
2097 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0); in sky2_hw_down()
2098 sky2_read8(hw, STAT_ISR_TIMER_CTRL); in sky2_hw_down()
2102 spin_lock_bh(&sky2->phy_lock); in sky2_hw_down()
2103 sky2_phy_power_down(hw, port); in sky2_hw_down()
2104 spin_unlock_bh(&sky2->phy_lock); in sky2_hw_down()
2106 sky2_tx_reset(hw, port); in sky2_hw_down()
2108 /* Free any pending frames stuck in HW queue */ in sky2_hw_down()
2109 sky2_tx_complete(sky2, sky2->tx_prod); in sky2_hw_down()
2116 struct sky2_hw *hw = sky2->hw; in sky2_close() local
2119 if (!sky2->tx_le) in sky2_close()
2124 if (hw->ports == 1) { in sky2_close()
2125 sky2_write32(hw, B0_IMSK, 0); in sky2_close()
2126 sky2_read32(hw, B0_IMSK); in sky2_close()
2128 napi_disable(&hw->napi); in sky2_close()
2129 free_irq(hw->pdev->irq, hw); in sky2_close()
2130 hw->flags &= ~SKY2_HW_IRQ_SETUP; in sky2_close()
2135 imask = sky2_read32(hw, B0_IMSK); in sky2_close()
2136 imask &= ~portirq_msk[sky2->port]; in sky2_close()
2137 sky2_write32(hw, B0_IMSK, imask); in sky2_close()
2138 sky2_read32(hw, B0_IMSK); in sky2_close()
2140 synchronize_irq(hw->pdev->irq); in sky2_close()
2141 napi_synchronize(&hw->napi); in sky2_close()
2151 static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux) in sky2_phy_speed() argument
2153 if (hw->flags & SKY2_HW_FIBRE_PHY) in sky2_phy_speed()
2156 if (!(hw->flags & SKY2_HW_GIGABIT)) { in sky2_phy_speed()
2175 struct sky2_hw *hw = sky2->hw; in sky2_link_up() local
2176 unsigned port = sky2->port; in sky2_link_up()
2188 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); in sky2_link_up()
2190 netif_carrier_on(sky2->netdev); in sky2_link_up()
2192 mod_timer(&hw->watchdog_timer, jiffies + 1); in sky2_link_up()
2195 sky2_write8(hw, SK_REG(port, LNK_LED_REG), in sky2_link_up()
2198 netif_info(sky2, link, sky2->netdev, in sky2_link_up()
2199 "Link is up at %d Mbps, %s duplex, flow control %s\n", in sky2_link_up()
2200 sky2->speed, in sky2_link_up()
2201 sky2->duplex == DUPLEX_FULL ? "full" : "half", in sky2_link_up()
2202 fc_name[sky2->flow_status]); in sky2_link_up()
2207 struct sky2_hw *hw = sky2->hw; in sky2_link_down() local
2208 unsigned port = sky2->port; in sky2_link_down()
2211 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); in sky2_link_down()
2213 reg = gma_read16(hw, port, GM_GP_CTRL); in sky2_link_down()
2215 gma_write16(hw, port, GM_GP_CTRL, reg); in sky2_link_down()
2217 netif_carrier_off(sky2->netdev); in sky2_link_down()
2220 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); in sky2_link_down()
2222 netif_info(sky2, link, sky2->netdev, "Link is down\n"); in sky2_link_down()
2224 sky2_phy_init(hw, port); in sky2_link_down()
2237 struct sky2_hw *hw = sky2->hw; in sky2_autoneg_done() local
2238 unsigned port = sky2->port; in sky2_autoneg_done()
2241 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); in sky2_autoneg_done()
2242 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); in sky2_autoneg_done()
2244 netdev_err(sky2->netdev, "remote fault\n"); in sky2_autoneg_done()
2245 return -1; in sky2_autoneg_done()
2249 netdev_err(sky2->netdev, "speed/duplex mismatch\n"); in sky2_autoneg_done()
2250 return -1; in sky2_autoneg_done()
2253 sky2->speed = sky2_phy_speed(hw, aux); in sky2_autoneg_done()
2254 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF; in sky2_autoneg_done()
2259 if (hw->flags & SKY2_HW_FIBRE_PHY) { in sky2_autoneg_done()
2274 sky2->flow_status = FC_NONE; in sky2_autoneg_done()
2277 sky2->flow_status = FC_BOTH; in sky2_autoneg_done()
2279 sky2->flow_status = FC_RX; in sky2_autoneg_done()
2282 sky2->flow_status = FC_TX; in sky2_autoneg_done()
2285 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 && in sky2_autoneg_done()
2286 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX)) in sky2_autoneg_done()
2287 sky2->flow_status = FC_NONE; in sky2_autoneg_done()
2289 if (sky2->flow_status & FC_TX) in sky2_autoneg_done()
2290 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); in sky2_autoneg_done()
2292 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); in sky2_autoneg_done()
2298 static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) in sky2_phy_intr() argument
2300 struct net_device *dev = hw->dev[port]; in sky2_phy_intr()
2307 spin_lock(&sky2->phy_lock); in sky2_phy_intr()
2308 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); in sky2_phy_intr()
2309 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); in sky2_phy_intr()
2311 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n", in sky2_phy_intr()
2322 sky2->speed = sky2_phy_speed(hw, phystat); in sky2_phy_intr()
2325 sky2->duplex = in sky2_phy_intr()
2335 spin_unlock(&sky2->phy_lock); in sky2_phy_intr()
2338 /* Special quick link interrupt (Yukon-2 Optima only) */
2339 static void sky2_qlink_intr(struct sky2_hw *hw) in sky2_qlink_intr() argument
2341 struct sky2_port *sky2 = netdev_priv(hw->dev[0]); in sky2_qlink_intr()
2346 imask = sky2_read32(hw, B0_IMSK); in sky2_qlink_intr()
2348 sky2_write32(hw, B0_IMSK, imask); in sky2_qlink_intr()
2351 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); in sky2_qlink_intr()
2352 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_qlink_intr()
2353 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); in sky2_qlink_intr()
2354 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_qlink_intr()
2365 struct sky2_hw *hw = sky2->hw; in sky2_tx_timeout() local
2370 sky2->tx_cons, sky2->tx_prod, in sky2_tx_timeout()
2371 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), in sky2_tx_timeout()
2372 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE))); in sky2_tx_timeout()
2375 schedule_work(&hw->restart_work); in sky2_tx_timeout()
2381 struct sky2_hw *hw = sky2->hw; in sky2_change_mtu() local
2382 unsigned port = sky2->port; in sky2_change_mtu()
2388 WRITE_ONCE(dev->mtu, new_mtu); in sky2_change_mtu()
2393 imask = sky2_read32(hw, B0_IMSK); in sky2_change_mtu()
2394 sky2_write32(hw, B0_IMSK, 0); in sky2_change_mtu()
2395 sky2_read32(hw, B0_IMSK); in sky2_change_mtu()
2398 napi_disable(&hw->napi); in sky2_change_mtu()
2401 synchronize_irq(hw->pdev->irq); in sky2_change_mtu()
2403 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) in sky2_change_mtu()
2404 sky2_set_tx_stfwd(hw, port); in sky2_change_mtu()
2406 ctl = gma_read16(hw, port, GM_GP_CTRL); in sky2_change_mtu()
2407 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); in sky2_change_mtu()
2411 WRITE_ONCE(dev->mtu, new_mtu); in sky2_change_mtu()
2415 if (sky2->speed > SPEED_100) in sky2_change_mtu()
2420 if (dev->mtu > ETH_DATA_LEN) in sky2_change_mtu()
2423 gma_write16(hw, port, GM_SERIAL_MODE, mode); in sky2_change_mtu()
2425 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); in sky2_change_mtu()
2432 sky2_write32(hw, B0_IMSK, imask); in sky2_change_mtu()
2434 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_change_mtu()
2435 napi_enable(&hw->napi); in sky2_change_mtu()
2440 gma_write16(hw, port, GM_GP_CTRL, ctl); in sky2_change_mtu()
2453 if (!IS_ALIGNED(re->data_addr + ETH_HLEN, sizeof(u32))) in needs_copy()
2466 skb = netdev_alloc_skb_ip_align(sky2->netdev, length); in receive_copy()
2468 dma_sync_single_for_cpu(&sky2->hw->pdev->dev, re->data_addr, in receive_copy()
2470 skb_copy_from_linear_data(re->skb, skb->data, length); in receive_copy()
2471 skb->ip_summed = re->skb->ip_summed; in receive_copy()
2472 skb->csum = re->skb->csum; in receive_copy()
2473 skb_copy_hash(skb, re->skb); in receive_copy()
2474 __vlan_hwaccel_copy_tag(skb, re->skb); in receive_copy()
2476 dma_sync_single_for_device(&sky2->hw->pdev->dev, in receive_copy()
2477 re->data_addr, length, in receive_copy()
2479 __vlan_hwaccel_clear_tag(re->skb); in receive_copy()
2480 skb_clear_hash(re->skb); in receive_copy()
2481 re->skb->ip_summed = CHECKSUM_NONE; in receive_copy()
2496 skb->tail += size; in skb_put_frags()
2497 skb->len += size; in skb_put_frags()
2498 length -= size; in skb_put_frags()
2500 num_frags = skb_shinfo(skb)->nr_frags; in skb_put_frags()
2502 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in skb_put_frags()
2507 --skb_shinfo(skb)->nr_frags; in skb_put_frags()
2512 skb->data_len += size; in skb_put_frags()
2513 skb->truesize += PAGE_SIZE; in skb_put_frags()
2514 skb->len += size; in skb_put_frags()
2515 length -= size; in skb_put_frags()
2520 /* Normal packet - take skb from ring element and put in a new one */
2527 unsigned hdr_space = sky2->rx_data_size; in receive_new()
2533 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space)) in receive_new()
2536 skb = re->skb; in receive_new()
2537 sky2_rx_unmap_skb(sky2->hw->pdev, re); in receive_new()
2538 prefetch(skb->data); in receive_new()
2541 if (skb_shinfo(skb)->nr_frags) in receive_new()
2561 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next; in sky2_receive()
2567 sky2->rx_next, status, length); in sky2_receive()
2569 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending; in sky2_receive()
2570 prefetch(sky2->rx_ring + sky2->rx_next); in sky2_receive()
2572 if (skb_vlan_tag_present(re->skb)) in sky2_receive()
2573 count -= VLAN_HLEN; /* Account for vlan tag */ in sky2_receive()
2579 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P && in sky2_receive()
2580 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 && in sky2_receive()
2600 dev->stats.rx_dropped += (skb == NULL); in sky2_receive()
2608 ++dev->stats.rx_errors; in sky2_receive()
2634 if (skb->ip_summed == CHECKSUM_NONE) in sky2_skb_rx()
2637 napi_gro_receive(&sky2->hw->napi, skb); in sky2_skb_rx()
2640 static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port, in sky2_rx_done() argument
2643 struct net_device *dev = hw->dev[port]; in sky2_rx_done()
2649 u64_stats_update_begin(&sky2->rx_stats.syncp); in sky2_rx_done()
2650 sky2->rx_stats.packets += packets; in sky2_rx_done()
2651 sky2->rx_stats.bytes += bytes; in sky2_rx_done()
2652 u64_stats_update_end(&sky2->rx_stats.syncp); in sky2_rx_done()
2654 sky2->last_rx = jiffies; in sky2_rx_done()
2661 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE); in sky2_rx_checksum()
2669 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb; in sky2_rx_checksum()
2670 skb->ip_summed = CHECKSUM_COMPLETE; in sky2_rx_checksum()
2671 skb->csum = le16_to_cpu(status); in sky2_rx_checksum()
2673 dev_notice(&sky2->hw->pdev->dev, in sky2_rx_checksum()
2675 sky2->netdev->name, status); in sky2_rx_checksum()
2681 sky2->netdev->features &= ~NETIF_F_RXCSUM; in sky2_rx_checksum()
2682 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), in sky2_rx_checksum()
2691 skb = sky2->rx_ring[sky2->rx_next].skb; in sky2_rx_tag()
2699 skb = sky2->rx_ring[sky2->rx_next].skb; in sky2_rx_hash()
2704 static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) in sky2_status_intr() argument
2716 struct sky2_status_le *le = hw->st_le + hw->st_idx; in sky2_status_intr()
2722 u8 opcode = le->opcode; in sky2_status_intr()
2727 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size); in sky2_status_intr()
2729 port = le->css & CSS_LINK_BIT; in sky2_status_intr()
2730 dev = hw->dev[port]; in sky2_status_intr()
2732 length = le16_to_cpu(le->length); in sky2_status_intr()
2733 status = le32_to_cpu(le->status); in sky2_status_intr()
2735 le->opcode = 0; in sky2_status_intr()
2746 if (hw->flags & SKY2_HW_NEW_LE) { in sky2_status_intr()
2747 if ((dev->features & NETIF_F_RXCSUM) && in sky2_status_intr()
2748 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) && in sky2_status_intr()
2749 (le->css & CSS_TCPUDPCSOK)) in sky2_status_intr()
2750 skb->ip_summed = CHECKSUM_UNNECESSARY; in sky2_status_intr()
2752 skb->ip_summed = CHECKSUM_NONE; in sky2_status_intr()
2755 skb->protocol = eth_type_trans(skb, dev); in sky2_status_intr()
2771 if (likely(dev->features & NETIF_F_RXCSUM)) in sky2_status_intr()
2781 sky2_tx_done(hw->dev[0], status & 0xfff); in sky2_status_intr()
2782 if (hw->dev[1]) in sky2_status_intr()
2783 sky2_tx_done(hw->dev[1], in sky2_status_intr()
2792 } while (hw->st_idx != idx); in sky2_status_intr()
2795 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); in sky2_status_intr()
2798 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]); in sky2_status_intr()
2799 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]); in sky2_status_intr()
2804 static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status) in sky2_hw_error() argument
2806 struct net_device *dev = hw->dev[port]; in sky2_hw_error()
2809 netdev_info(dev, "hw error interrupt status 0x%x\n", status); in sky2_hw_error()
2815 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); in sky2_hw_error()
2822 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); in sky2_hw_error()
2828 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); in sky2_hw_error()
2834 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); in sky2_hw_error()
2840 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); in sky2_hw_error()
2844 static void sky2_hw_intr(struct sky2_hw *hw) in sky2_hw_intr() argument
2846 struct pci_dev *pdev = hw->pdev; in sky2_hw_intr()
2847 u32 status = sky2_read32(hw, B0_HWE_ISRC); in sky2_hw_intr()
2848 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK); in sky2_hw_intr()
2853 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_hw_intr()
2858 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_hw_intr()
2859 pci_err = sky2_pci_read16(hw, PCI_STATUS); in sky2_hw_intr()
2861 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", in sky2_hw_intr()
2864 sky2_pci_write16(hw, PCI_STATUS, in sky2_hw_intr()
2866 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_hw_intr()
2870 /* PCI-Express uncorrectable Error occurred */ in sky2_hw_intr()
2873 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_hw_intr()
2874 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); in sky2_hw_intr()
2875 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, in sky2_hw_intr()
2878 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err); in sky2_hw_intr()
2880 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); in sky2_hw_intr()
2881 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_hw_intr()
2885 sky2_hw_error(hw, 0, status); in sky2_hw_intr()
2888 sky2_hw_error(hw, 1, status); in sky2_hw_intr()
2891 static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) in sky2_mac_intr() argument
2893 struct net_device *dev = hw->dev[port]; in sky2_mac_intr()
2895 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); in sky2_mac_intr()
2900 gma_read16(hw, port, GM_RX_IRQ_SRC); in sky2_mac_intr()
2903 gma_read16(hw, port, GM_TX_IRQ_SRC); in sky2_mac_intr()
2906 ++dev->stats.rx_fifo_errors; in sky2_mac_intr()
2907 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); in sky2_mac_intr()
2911 ++dev->stats.tx_fifo_errors; in sky2_mac_intr()
2912 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU); in sky2_mac_intr()
2917 static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q) in sky2_le_error() argument
2919 struct net_device *dev = hw->dev[port]; in sky2_le_error()
2920 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); in sky2_le_error()
2922 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n", in sky2_le_error()
2923 dev->name, (unsigned) q, (unsigned) idx, in sky2_le_error()
2924 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX))); in sky2_le_error()
2926 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK); in sky2_le_error()
2932 struct sky2_hw *hw = sky2->hw; in sky2_rx_hung() local
2933 unsigned port = sky2->port; in sky2_rx_hung()
2935 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP)); in sky2_rx_hung()
2936 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV)); in sky2_rx_hung()
2937 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP)); in sky2_rx_hung()
2938 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL)); in sky2_rx_hung()
2941 if (sky2->check.last == sky2->last_rx && in sky2_rx_hung()
2942 ((mac_rp == sky2->check.mac_rp && in sky2_rx_hung()
2943 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) || in sky2_rx_hung()
2945 (fifo_rp == sky2->check.fifo_rp && in sky2_rx_hung()
2946 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) { in sky2_rx_hung()
2950 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP))); in sky2_rx_hung()
2953 sky2->check.last = sky2->last_rx; in sky2_rx_hung()
2954 sky2->check.mac_rp = mac_rp; in sky2_rx_hung()
2955 sky2->check.mac_lev = mac_lev; in sky2_rx_hung()
2956 sky2->check.fifo_rp = fifo_rp; in sky2_rx_hung()
2957 sky2->check.fifo_lev = fifo_lev; in sky2_rx_hung()
2964 struct sky2_hw *hw = timer_container_of(hw, t, watchdog_timer); in sky2_watchdog() local
2967 if (sky2_read32(hw, B0_ISRC)) { in sky2_watchdog()
2968 napi_schedule(&hw->napi); in sky2_watchdog()
2972 for (i = 0; i < hw->ports; i++) { in sky2_watchdog()
2973 struct net_device *dev = hw->dev[i]; in sky2_watchdog()
2979 if ((hw->flags & SKY2_HW_RAM_BUFFER) && in sky2_watchdog()
2982 schedule_work(&hw->restart_work); in sky2_watchdog()
2991 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ)); in sky2_watchdog()
2995 static void sky2_err_intr(struct sky2_hw *hw, u32 status) in sky2_err_intr() argument
2998 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status); in sky2_err_intr()
3001 sky2_hw_intr(hw); in sky2_err_intr()
3004 sky2_mac_intr(hw, 0); in sky2_err_intr()
3007 sky2_mac_intr(hw, 1); in sky2_err_intr()
3010 sky2_le_error(hw, 0, Q_R1); in sky2_err_intr()
3013 sky2_le_error(hw, 1, Q_R2); in sky2_err_intr()
3016 sky2_le_error(hw, 0, Q_XA1); in sky2_err_intr()
3019 sky2_le_error(hw, 1, Q_XA2); in sky2_err_intr()
3024 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi); in sky2_poll() local
3025 u32 status = sky2_read32(hw, B0_Y2_SP_EISR); in sky2_poll()
3030 sky2_err_intr(hw, status); in sky2_poll()
3033 sky2_phy_intr(hw, 0); in sky2_poll()
3036 sky2_phy_intr(hw, 1); in sky2_poll()
3039 sky2_qlink_intr(hw); in sky2_poll()
3041 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) { in sky2_poll()
3042 work_done += sky2_status_intr(hw, work_limit - work_done, idx); in sky2_poll()
3049 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_poll()
3057 struct sky2_hw *hw = dev_id; in sky2_intr() local
3061 status = sky2_read32(hw, B0_Y2_SP_ISRC2); in sky2_intr()
3063 sky2_write32(hw, B0_Y2_SP_ICR, 2); in sky2_intr()
3067 prefetch(&hw->st_le[hw->st_idx]); in sky2_intr()
3069 napi_schedule(&hw->napi); in sky2_intr()
3079 napi_schedule(&sky2->hw->napi); in sky2_netpoll()
3084 static u32 sky2_mhz(const struct sky2_hw *hw) in sky2_mhz() argument
3086 switch (hw->chip_id) { in sky2_mhz()
3111 static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us) in sky2_us2clk() argument
3113 return sky2_mhz(hw) * us; in sky2_us2clk()
3116 static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) in sky2_clk2us() argument
3118 return clk / sky2_mhz(hw); in sky2_clk2us()
3122 static int sky2_init(struct sky2_hw *hw) in sky2_init() argument
3127 sky2_pci_write32(hw, PCI_DEV_REG3, 0); in sky2_init()
3129 sky2_write8(hw, B0_CTST, CS_RST_CLR); in sky2_init()
3131 hw->chip_id = sky2_read8(hw, B2_CHIP_ID); in sky2_init()
3132 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4; in sky2_init()
3134 switch (hw->chip_id) { in sky2_init()
3136 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY; in sky2_init()
3137 if (hw->chip_rev < CHIP_REV_YU_XL_A2) in sky2_init()
3138 hw->flags |= SKY2_HW_RSS_BROKEN; in sky2_init()
3142 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3148 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3155 if (hw->chip_rev != CHIP_REV_YU_EX_B0) in sky2_init()
3156 hw->flags |= SKY2_HW_AUTO_TX_SUM; in sky2_init()
3161 if (hw->chip_rev == CHIP_REV_YU_EC_A1) { in sky2_init()
3162 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n"); in sky2_init()
3163 return -EOPNOTSUPP; in sky2_init()
3165 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN; in sky2_init()
3169 hw->flags = SKY2_HW_RSS_BROKEN; in sky2_init()
3173 hw->flags = SKY2_HW_NEWER_PHY in sky2_init()
3179 if (hw->chip_rev == CHIP_REV_YU_FE2_A0) in sky2_init()
3180 hw->flags |= SKY2_HW_VLAN_BROKEN | SKY2_HW_RSS_CHKSUM; in sky2_init()
3184 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3190 if (hw->chip_rev == CHIP_REV_YU_SU_A0) in sky2_init()
3191 hw->flags |= SKY2_HW_RSS_CHKSUM; in sky2_init()
3195 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3202 hw->flags = SKY2_HW_GIGABIT in sky2_init()
3208 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n", in sky2_init()
3209 hw->chip_id); in sky2_init()
3210 return -EOPNOTSUPP; in sky2_init()
3213 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP); in sky2_init()
3214 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P') in sky2_init()
3215 hw->flags |= SKY2_HW_FIBRE_PHY; in sky2_init()
3217 hw->ports = 1; in sky2_init()
3218 t8 = sky2_read8(hw, B2_Y2_HW_RES); in sky2_init()
3220 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC)) in sky2_init()
3221 ++hw->ports; in sky2_init()
3224 if (sky2_read8(hw, B2_E_0)) in sky2_init()
3225 hw->flags |= SKY2_HW_RAM_BUFFER; in sky2_init()
3230 static void sky2_reset(struct sky2_hw *hw) in sky2_reset() argument
3232 struct pci_dev *pdev = hw->pdev; in sky2_reset()
3238 if (hw->chip_id == CHIP_ID_YUKON_EX in sky2_reset()
3239 || hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_reset()
3240 sky2_write32(hw, CPU_WDOG, 0); in sky2_reset()
3241 status = sky2_read16(hw, HCU_CCSR); in sky2_reset()
3246 * - ASF firmware may malfunction in sky2_reset()
3247 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks in sky2_reset()
3250 sky2_write16(hw, HCU_CCSR, status); in sky2_reset()
3251 sky2_write32(hw, CPU_WDOG, 0); in sky2_reset()
3253 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); in sky2_reset()
3254 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); in sky2_reset()
3257 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_reset()
3258 sky2_write8(hw, B0_CTST, CS_RST_CLR); in sky2_reset()
3261 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_reset()
3264 status = sky2_pci_read16(hw, PCI_STATUS); in sky2_reset()
3266 sky2_pci_write16(hw, PCI_STATUS, status); in sky2_reset()
3268 sky2_write8(hw, B0_CTST, CS_MRST_CLR); in sky2_reset()
3271 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, in sky2_reset()
3275 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP) in sky2_reset()
3276 dev_info(&pdev->dev, "ignoring stuck error report bit\n"); in sky2_reset()
3281 sky2_power_on(hw); in sky2_reset()
3282 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_reset()
3284 for (i = 0; i < hw->ports; i++) { in sky2_reset()
3285 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); in sky2_reset()
3286 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); in sky2_reset()
3288 if (hw->chip_id == CHIP_ID_YUKON_EX || in sky2_reset()
3289 hw->chip_id == CHIP_ID_YUKON_SUPR) in sky2_reset()
3290 sky2_write16(hw, SK_REG(i, GMAC_CTRL), in sky2_reset()
3296 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) { in sky2_reset()
3298 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS); in sky2_reset()
3301 if (hw->chip_id == CHIP_ID_YUKON_OPT || in sky2_reset()
3302 hw->chip_id == CHIP_ID_YUKON_PRM || in sky2_reset()
3303 hw->chip_id == CHIP_ID_YUKON_OP_2) { in sky2_reset()
3306 if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { in sky2_reset()
3307 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */ in sky2_reset()
3308 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7)); in sky2_reset()
3313 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ in sky2_reset()
3314 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); in sky2_reset()
3324 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); in sky2_reset()
3325 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); in sky2_reset()
3328 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3); in sky2_reset()
3331 sky2_pci_write16(hw, pdev->pcie_cap + PCI_EXP_LNKCTL, in sky2_reset()
3334 if (hw->chip_id == CHIP_ID_YUKON_PRM && in sky2_reset()
3335 hw->chip_rev == CHIP_REV_YU_PRM_A0) { in sky2_reset()
3337 reg = sky2_read16(hw, GPHY_CTRL); in sky2_reset()
3338 sky2_write16(hw, GPHY_CTRL, reg | GPC_INTPOL); in sky2_reset()
3340 /* adapt HW for low active PHY Interrupt */ in sky2_reset()
3341 reg = sky2_read16(hw, Y2_CFG_SPC + PCI_LDO_CTRL); in sky2_reset()
3342 sky2_write16(hw, Y2_CFG_SPC + PCI_LDO_CTRL, reg | PHY_M_UNDOC1); in sky2_reset()
3345 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); in sky2_reset()
3347 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ in sky2_reset()
3348 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); in sky2_reset()
3352 sky2_write32(hw, B2_I2C_IRQ, 1); in sky2_reset()
3355 sky2_write8(hw, B2_TI_CTRL, TIM_STOP); in sky2_reset()
3356 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ); in sky2_reset()
3359 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP); in sky2_reset()
3362 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP); in sky2_reset()
3363 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); in sky2_reset()
3366 for (i = 0; i < hw->ports; i++) in sky2_reset()
3367 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB); in sky2_reset()
3370 for (i = 0; i < hw->ports; i++) { in sky2_reset()
3371 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR); in sky2_reset()
3373 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53); in sky2_reset()
3374 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53); in sky2_reset()
3375 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53); in sky2_reset()
3376 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53); in sky2_reset()
3377 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53); in sky2_reset()
3378 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53); in sky2_reset()
3379 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53); in sky2_reset()
3380 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53); in sky2_reset()
3381 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53); in sky2_reset()
3382 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53); in sky2_reset()
3383 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53); in sky2_reset()
3384 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53); in sky2_reset()
3387 sky2_write32(hw, B0_HWE_IMSK, hwe_mask); in sky2_reset()
3389 for (i = 0; i < hw->ports; i++) in sky2_reset()
3390 sky2_gmac_reset(hw, i); in sky2_reset()
3392 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le)); in sky2_reset()
3393 hw->st_idx = 0; in sky2_reset()
3395 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET); in sky2_reset()
3396 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR); in sky2_reset()
3398 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma); in sky2_reset()
3399 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32); in sky2_reset()
3402 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1); in sky2_reset()
3404 sky2_write16(hw, STAT_TX_IDX_TH, 10); in sky2_reset()
3405 sky2_write8(hw, STAT_FIFO_WM, 16); in sky2_reset()
3407 /* set Status-FIFO ISR watermark */ in sky2_reset()
3408 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0) in sky2_reset()
3409 sky2_write8(hw, STAT_FIFO_ISR_WM, 4); in sky2_reset()
3411 sky2_write8(hw, STAT_FIFO_ISR_WM, 16); in sky2_reset()
3413 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); in sky2_reset()
3414 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20)); in sky2_reset()
3415 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100)); in sky2_reset()
3418 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON); in sky2_reset()
3420 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); in sky2_reset()
3421 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); in sky2_reset()
3422 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); in sky2_reset()
3458 static void sky2_all_down(struct sky2_hw *hw) in sky2_all_down() argument
3462 if (hw->flags & SKY2_HW_IRQ_SETUP) { in sky2_all_down()
3463 sky2_write32(hw, B0_IMSK, 0); in sky2_all_down()
3464 sky2_read32(hw, B0_IMSK); in sky2_all_down()
3466 synchronize_irq(hw->pdev->irq); in sky2_all_down()
3467 napi_disable(&hw->napi); in sky2_all_down()
3470 for (i = 0; i < hw->ports; i++) { in sky2_all_down()
3471 struct net_device *dev = hw->dev[i]; in sky2_all_down()
3483 static void sky2_all_up(struct sky2_hw *hw) in sky2_all_up() argument
3488 for (i = 0; i < hw->ports; i++) { in sky2_all_up()
3489 struct net_device *dev = hw->dev[i]; in sky2_all_up()
3501 if (hw->flags & SKY2_HW_IRQ_SETUP) { in sky2_all_up()
3502 sky2_write32(hw, B0_IMSK, imask); in sky2_all_up()
3503 sky2_read32(hw, B0_IMSK); in sky2_all_up()
3504 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_all_up()
3505 napi_enable(&hw->napi); in sky2_all_up()
3511 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work); in sky2_restart() local
3515 sky2_all_down(hw); in sky2_restart()
3516 sky2_reset(hw); in sky2_restart()
3517 sky2_all_up(hw); in sky2_restart()
3522 static inline u8 sky2_wol_supported(const struct sky2_hw *hw) in sky2_wol_supported() argument
3524 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0; in sky2_wol_supported()
3531 wol->supported = sky2_wol_supported(sky2->hw); in sky2_get_wol()
3532 wol->wolopts = sky2->wol; in sky2_get_wol()
3538 struct sky2_hw *hw = sky2->hw; in sky2_set_wol() local
3542 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) || in sky2_set_wol()
3543 !device_can_wakeup(&hw->pdev->dev)) in sky2_set_wol()
3544 return -EOPNOTSUPP; in sky2_set_wol()
3546 sky2->wol = wol->wolopts; in sky2_set_wol()
3548 for (i = 0; i < hw->ports; i++) { in sky2_set_wol()
3549 struct net_device *dev = hw->dev[i]; in sky2_set_wol()
3552 if (sky2->wol) in sky2_set_wol()
3555 device_set_wakeup_enable(&hw->pdev->dev, enable_wakeup); in sky2_set_wol()
3560 static u32 sky2_supported_modes(const struct sky2_hw *hw) in sky2_supported_modes() argument
3562 if (sky2_is_copper(hw)) { in sky2_supported_modes()
3568 if (hw->flags & SKY2_HW_GIGABIT) in sky2_supported_modes()
3581 struct sky2_hw *hw = sky2->hw; in sky2_get_link_ksettings() local
3584 supported = sky2_supported_modes(hw); in sky2_get_link_ksettings()
3585 cmd->base.phy_address = PHY_ADDR_MARV; in sky2_get_link_ksettings()
3586 if (sky2_is_copper(hw)) { in sky2_get_link_ksettings()
3587 cmd->base.port = PORT_TP; in sky2_get_link_ksettings()
3588 cmd->base.speed = sky2->speed; in sky2_get_link_ksettings()
3591 cmd->base.speed = SPEED_1000; in sky2_get_link_ksettings()
3592 cmd->base.port = PORT_FIBRE; in sky2_get_link_ksettings()
3596 advertising = sky2->advertising; in sky2_get_link_ksettings()
3597 cmd->base.autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED) in sky2_get_link_ksettings()
3599 cmd->base.duplex = sky2->duplex; in sky2_get_link_ksettings()
3601 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, in sky2_get_link_ksettings()
3603 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, in sky2_get_link_ksettings()
3613 const struct sky2_hw *hw = sky2->hw; in sky2_set_link_ksettings() local
3614 u32 supported = sky2_supported_modes(hw); in sky2_set_link_ksettings()
3618 cmd->link_modes.advertising); in sky2_set_link_ksettings()
3620 if (cmd->base.autoneg == AUTONEG_ENABLE) { in sky2_set_link_ksettings()
3622 return -EINVAL; in sky2_set_link_ksettings()
3624 if (sky2_is_copper(hw)) in sky2_set_link_ksettings()
3625 sky2->advertising = new_advertising | in sky2_set_link_ksettings()
3629 sky2->advertising = new_advertising | in sky2_set_link_ksettings()
3633 sky2->flags |= SKY2_FLAG_AUTO_SPEED; in sky2_set_link_ksettings()
3634 sky2->duplex = -1; in sky2_set_link_ksettings()
3635 sky2->speed = -1; in sky2_set_link_ksettings()
3638 u32 speed = cmd->base.speed; in sky2_set_link_ksettings()
3642 if (cmd->base.duplex == DUPLEX_FULL) in sky2_set_link_ksettings()
3644 else if (cmd->base.duplex == DUPLEX_HALF) in sky2_set_link_ksettings()
3647 return -EINVAL; in sky2_set_link_ksettings()
3650 if (cmd->base.duplex == DUPLEX_FULL) in sky2_set_link_ksettings()
3652 else if (cmd->base.duplex == DUPLEX_HALF) in sky2_set_link_ksettings()
3655 return -EINVAL; in sky2_set_link_ksettings()
3659 if (cmd->base.duplex == DUPLEX_FULL) in sky2_set_link_ksettings()
3661 else if (cmd->base.duplex == DUPLEX_HALF) in sky2_set_link_ksettings()
3664 return -EINVAL; in sky2_set_link_ksettings()
3667 return -EINVAL; in sky2_set_link_ksettings()
3671 return -EINVAL; in sky2_set_link_ksettings()
3673 sky2->speed = speed; in sky2_set_link_ksettings()
3674 sky2->duplex = cmd->base.duplex; in sky2_set_link_ksettings()
3675 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED; in sky2_set_link_ksettings()
3691 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in sky2_get_drvinfo()
3692 strscpy(info->version, DRV_VERSION, sizeof(info->version)); in sky2_get_drvinfo()
3693 strscpy(info->bus_info, pci_name(sky2->hw->pdev), in sky2_get_drvinfo()
3694 sizeof(info->bus_info)); in sky2_get_drvinfo()
3744 return sky2->msg_enable; in sky2_get_msglevel()
3751 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED)) in sky2_nway_reset()
3752 return -EINVAL; in sky2_nway_reset()
3762 struct sky2_hw *hw = sky2->hw; in sky2_phy_stats() local
3763 unsigned port = sky2->port; in sky2_phy_stats()
3766 data[0] = get_stats64(hw, port, GM_TXO_OK_LO); in sky2_phy_stats()
3767 data[1] = get_stats64(hw, port, GM_RXO_OK_LO); in sky2_phy_stats()
3770 data[i] = get_stats32(hw, port, sky2_stats[i].offset); in sky2_phy_stats()
3776 sky2->msg_enable = value; in sky2_set_msglevel()
3785 return -EOPNOTSUPP; in sky2_get_sset_count()
3812 struct sky2_hw *hw = sky2->hw; in sky2_set_mac_address() local
3813 unsigned port = sky2->port; in sky2_set_mac_address()
3816 if (!is_valid_ether_addr(addr->sa_data)) in sky2_set_mac_address()
3817 return -EADDRNOTAVAIL; in sky2_set_mac_address()
3819 eth_hw_addr_set(dev, addr->sa_data); in sky2_set_mac_address()
3820 memcpy_toio(hw->regs + B2_MAC_1 + port * 8, in sky2_set_mac_address()
3821 dev->dev_addr, ETH_ALEN); in sky2_set_mac_address()
3822 memcpy_toio(hw->regs + B2_MAC_2 + port * 8, in sky2_set_mac_address()
3823 dev->dev_addr, ETH_ALEN); in sky2_set_mac_address()
3826 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); in sky2_set_mac_address()
3829 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); in sky2_set_mac_address()
3845 struct sky2_hw *hw = sky2->hw; in sky2_set_multicast() local
3846 unsigned port = sky2->port; in sky2_set_multicast()
3853 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH); in sky2_set_multicast()
3856 reg = gma_read16(hw, port, GM_RX_CTRL); in sky2_set_multicast()
3859 if (dev->flags & IFF_PROMISC) /* promiscuous */ in sky2_set_multicast()
3861 else if (dev->flags & IFF_ALLMULTI) in sky2_set_multicast()
3872 sky2_add_filter(filter, ha->addr); in sky2_set_multicast()
3875 gma_write16(hw, port, GM_MC_ADDR_H1, in sky2_set_multicast()
3877 gma_write16(hw, port, GM_MC_ADDR_H2, in sky2_set_multicast()
3879 gma_write16(hw, port, GM_MC_ADDR_H3, in sky2_set_multicast()
3881 gma_write16(hw, port, GM_MC_ADDR_H4, in sky2_set_multicast()
3884 gma_write16(hw, port, GM_RX_CTRL, reg); in sky2_set_multicast()
3891 struct sky2_hw *hw = sky2->hw; in sky2_get_stats() local
3892 unsigned port = sky2->port; in sky2_get_stats()
3897 start = u64_stats_fetch_begin(&sky2->rx_stats.syncp); in sky2_get_stats()
3898 _bytes = sky2->rx_stats.bytes; in sky2_get_stats()
3899 _packets = sky2->rx_stats.packets; in sky2_get_stats()
3900 } while (u64_stats_fetch_retry(&sky2->rx_stats.syncp, start)); in sky2_get_stats()
3902 stats->rx_packets = _packets; in sky2_get_stats()
3903 stats->rx_bytes = _bytes; in sky2_get_stats()
3906 start = u64_stats_fetch_begin(&sky2->tx_stats.syncp); in sky2_get_stats()
3907 _bytes = sky2->tx_stats.bytes; in sky2_get_stats()
3908 _packets = sky2->tx_stats.packets; in sky2_get_stats()
3909 } while (u64_stats_fetch_retry(&sky2->tx_stats.syncp, start)); in sky2_get_stats()
3911 stats->tx_packets = _packets; in sky2_get_stats()
3912 stats->tx_bytes = _bytes; in sky2_get_stats()
3914 stats->multicast = get_stats32(hw, port, GM_RXF_MC_OK) in sky2_get_stats()
3915 + get_stats32(hw, port, GM_RXF_BC_OK); in sky2_get_stats()
3917 stats->collisions = get_stats32(hw, port, GM_TXF_COL); in sky2_get_stats()
3919 stats->rx_length_errors = get_stats32(hw, port, GM_RXF_LNG_ERR); in sky2_get_stats()
3920 stats->rx_crc_errors = get_stats32(hw, port, GM_RXF_FCS_ERR); in sky2_get_stats()
3921 stats->rx_frame_errors = get_stats32(hw, port, GM_RXF_SHT) in sky2_get_stats()
3922 + get_stats32(hw, port, GM_RXE_FRAG); in sky2_get_stats()
3923 stats->rx_over_errors = get_stats32(hw, port, GM_RXE_FIFO_OV); in sky2_get_stats()
3925 stats->rx_dropped = dev->stats.rx_dropped; in sky2_get_stats()
3926 stats->rx_fifo_errors = dev->stats.rx_fifo_errors; in sky2_get_stats()
3927 stats->tx_fifo_errors = dev->stats.tx_fifo_errors; in sky2_get_stats()
3935 struct sky2_hw *hw = sky2->hw; in sky2_led() local
3936 unsigned port = sky2->port; in sky2_led()
3938 spin_lock_bh(&sky2->phy_lock); in sky2_led()
3939 if (hw->chip_id == CHIP_ID_YUKON_EC_U || in sky2_led()
3940 hw->chip_id == CHIP_ID_YUKON_EX || in sky2_led()
3941 hw->chip_id == CHIP_ID_YUKON_SUPR) { in sky2_led()
3943 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); in sky2_led()
3944 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3); in sky2_led()
3948 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3955 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3962 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3969 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, in sky2_led()
3976 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); in sky2_led()
3978 gm_phy_write(hw, port, PHY_MARV_LED_OVER, in sky2_led()
3986 spin_unlock_bh(&sky2->phy_lock); in sky2_led()
4017 switch (sky2->flow_mode) { in sky2_get_pauseparam()
4019 ecmd->tx_pause = ecmd->rx_pause = 0; in sky2_get_pauseparam()
4022 ecmd->tx_pause = 1, ecmd->rx_pause = 0; in sky2_get_pauseparam()
4025 ecmd->tx_pause = 0, ecmd->rx_pause = 1; in sky2_get_pauseparam()
4028 ecmd->tx_pause = ecmd->rx_pause = 1; in sky2_get_pauseparam()
4031 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE) in sky2_get_pauseparam()
4040 if (ecmd->autoneg == AUTONEG_ENABLE) in sky2_set_pauseparam()
4041 sky2->flags |= SKY2_FLAG_AUTO_PAUSE; in sky2_set_pauseparam()
4043 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE; in sky2_set_pauseparam()
4045 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause); in sky2_set_pauseparam()
4059 struct sky2_hw *hw = sky2->hw; in sky2_get_coalesce() local
4061 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4062 ecmd->tx_coalesce_usecs = 0; in sky2_get_coalesce()
4064 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI); in sky2_get_coalesce()
4065 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4067 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH); in sky2_get_coalesce()
4069 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4070 ecmd->rx_coalesce_usecs = 0; in sky2_get_coalesce()
4072 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI); in sky2_get_coalesce()
4073 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4075 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM); in sky2_get_coalesce()
4077 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP) in sky2_get_coalesce()
4078 ecmd->rx_coalesce_usecs_irq = 0; in sky2_get_coalesce()
4080 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI); in sky2_get_coalesce()
4081 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks); in sky2_get_coalesce()
4084 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM); in sky2_get_coalesce()
4096 struct sky2_hw *hw = sky2->hw; in sky2_set_coalesce() local
4097 const u32 tmax = sky2_clk2us(hw, 0x0ffffff); in sky2_set_coalesce()
4099 if (ecmd->tx_coalesce_usecs > tmax || in sky2_set_coalesce()
4100 ecmd->rx_coalesce_usecs > tmax || in sky2_set_coalesce()
4101 ecmd->rx_coalesce_usecs_irq > tmax) in sky2_set_coalesce()
4102 return -EINVAL; in sky2_set_coalesce()
4104 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1) in sky2_set_coalesce()
4105 return -EINVAL; in sky2_set_coalesce()
4106 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING) in sky2_set_coalesce()
4107 return -EINVAL; in sky2_set_coalesce()
4108 if (ecmd->rx_max_coalesced_frames_irq > RX_MAX_PENDING) in sky2_set_coalesce()
4109 return -EINVAL; in sky2_set_coalesce()
4111 if (ecmd->tx_coalesce_usecs == 0) in sky2_set_coalesce()
4112 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4114 sky2_write32(hw, STAT_TX_TIMER_INI, in sky2_set_coalesce()
4115 sky2_us2clk(hw, ecmd->tx_coalesce_usecs)); in sky2_set_coalesce()
4116 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4118 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames); in sky2_set_coalesce()
4120 if (ecmd->rx_coalesce_usecs == 0) in sky2_set_coalesce()
4121 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4123 sky2_write32(hw, STAT_LEV_TIMER_INI, in sky2_set_coalesce()
4124 sky2_us2clk(hw, ecmd->rx_coalesce_usecs)); in sky2_set_coalesce()
4125 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4127 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames); in sky2_set_coalesce()
4129 if (ecmd->rx_coalesce_usecs_irq == 0) in sky2_set_coalesce()
4130 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP); in sky2_set_coalesce()
4132 sky2_write32(hw, STAT_ISR_TIMER_INI, in sky2_set_coalesce()
4133 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq)); in sky2_set_coalesce()
4134 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); in sky2_set_coalesce()
4136 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq); in sky2_set_coalesce()
4157 ering->rx_max_pending = RX_MAX_PENDING; in sky2_get_ringparam()
4158 ering->tx_max_pending = TX_MAX_PENDING; in sky2_get_ringparam()
4160 ering->rx_pending = sky2->rx_pending; in sky2_get_ringparam()
4161 ering->tx_pending = sky2->tx_pending; in sky2_get_ringparam()
4171 if (ering->rx_pending > RX_MAX_PENDING || in sky2_set_ringparam()
4172 ering->rx_pending < 8 || in sky2_set_ringparam()
4173 ering->tx_pending < TX_MIN_PENDING || in sky2_set_ringparam()
4174 ering->tx_pending > TX_MAX_PENDING) in sky2_set_ringparam()
4175 return -EINVAL; in sky2_set_ringparam()
4179 sky2->rx_pending = ering->rx_pending; in sky2_set_ringparam()
4180 sky2->tx_pending = ering->tx_pending; in sky2_set_ringparam()
4181 sky2->tx_ring_size = roundup_ring_size(sky2->tx_pending); in sky2_set_ringparam()
4191 static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b) in sky2_reg_access_ok() argument
4210 return hw->ports > 1; in sky2_reg_access_ok()
4243 const void __iomem *io = sky2->hw->regs; in sky2_get_regs()
4246 regs->version = 1; in sky2_get_regs()
4251 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10); in sky2_get_regs()
4252 else if (sky2_reg_access_ok(sky2->hw, b)) in sky2_get_regs()
4265 struct sky2_hw *hw = sky2->hw; in sky2_get_eeprom_len() local
4268 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2); in sky2_get_eeprom_len()
4278 eeprom->magic = SKY2_EEPROM_MAGIC; in sky2_get_eeprom()
4279 rc = pci_read_vpd_any(sky2->hw->pdev, eeprom->offset, eeprom->len, in sky2_get_eeprom()
4284 eeprom->len = rc; in sky2_get_eeprom()
4295 if (eeprom->magic != SKY2_EEPROM_MAGIC) in sky2_set_eeprom()
4296 return -EINVAL; in sky2_set_eeprom()
4298 rc = pci_write_vpd_any(sky2->hw->pdev, eeprom->offset, eeprom->len, in sky2_set_eeprom()
4308 const struct sky2_hw *hw = sky2->hw; in sky2_fix_features() local
4313 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) { in sky2_fix_features()
4321 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) { in sky2_fix_features()
4332 netdev_features_t changed = dev->features ^ features; in sky2_set_features()
4335 !(sky2->hw->flags & SKY2_HW_NEW_LE)) { in sky2_set_features()
4336 sky2_write32(sky2->hw, in sky2_set_features()
4337 Q_ADDR(rxqaddr[sky2->port], Q_CSR), in sky2_set_features()
4388 struct net_device *dev = seq->private; in sky2_debug_show()
4390 struct sky2_hw *hw = sky2->hw; in sky2_debug_show() local
4391 unsigned port = sky2->port; in sky2_debug_show()
4396 sky2_read32(hw, B0_ISRC), in sky2_debug_show()
4397 sky2_read32(hw, B0_IMSK), in sky2_debug_show()
4398 sky2_read32(hw, B0_Y2_SP_ICR)); in sky2_debug_show()
4405 napi_disable(&hw->napi); in sky2_debug_show()
4406 last = sky2_read16(hw, STAT_PUT_IDX); in sky2_debug_show()
4408 seq_printf(seq, "Status ring %u\n", hw->st_size); in sky2_debug_show()
4409 if (hw->st_idx == last) in sky2_debug_show()
4413 for (idx = hw->st_idx; idx != last && idx < hw->st_size; in sky2_debug_show()
4414 idx = RING_NEXT(idx, hw->st_size)) { in sky2_debug_show()
4415 const struct sky2_status_le *le = hw->st_le + idx; in sky2_debug_show()
4417 idx, le->opcode, le->length, le->status); in sky2_debug_show()
4423 sky2->tx_cons, sky2->tx_prod, in sky2_debug_show()
4424 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), in sky2_debug_show()
4425 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE))); in sky2_debug_show()
4429 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size; in sky2_debug_show()
4430 idx = RING_NEXT(idx, sky2->tx_ring_size)) { in sky2_debug_show()
4431 const struct sky2_tx_le *le = sky2->tx_le + idx; in sky2_debug_show()
4432 u32 a = le32_to_cpu(le->addr); in sky2_debug_show()
4438 switch (le->opcode & ~HW_OWNER) { in sky2_debug_show()
4446 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length)); in sky2_debug_show()
4452 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length)); in sky2_debug_show()
4455 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length)); in sky2_debug_show()
4458 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length)); in sky2_debug_show()
4461 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode, in sky2_debug_show()
4462 a, le16_to_cpu(le->length)); in sky2_debug_show()
4465 if (le->ctrl & EOP) { in sky2_debug_show()
4471 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n", in sky2_debug_show()
4472 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)), in sky2_debug_show()
4473 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)), in sky2_debug_show()
4474 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX))); in sky2_debug_show()
4476 sky2_read32(hw, B0_Y2_SP_LISR); in sky2_debug_show()
4477 napi_enable(&hw->napi); in sky2_debug_show()
4492 if (dev->netdev_ops->ndo_open != sky2_open || !sky2_debug) in sky2_device_event()
4497 debugfs_change_name(sky2->debugfs, "%s", dev->name); in sky2_device_event()
4501 if (sky2->debugfs) { in sky2_device_event()
4503 debugfs_remove(sky2->debugfs); in sky2_device_event()
4504 sky2->debugfs = NULL; in sky2_device_event()
4509 sky2->debugfs = debugfs_create_file(dev->name, 0444, in sky2_device_event()
4512 if (IS_ERR(sky2->debugfs)) in sky2_device_event()
4513 sky2->debugfs = NULL; in sky2_device_event()
4588 static struct net_device *sky2_init_netdev(struct sky2_hw *hw, unsigned port, in sky2_init_netdev() argument
4598 SET_NETDEV_DEV(dev, &hw->pdev->dev); in sky2_init_netdev()
4599 dev->irq = hw->pdev->irq; in sky2_init_netdev()
4600 dev->ethtool_ops = &sky2_ethtool_ops; in sky2_init_netdev()
4601 dev->watchdog_timeo = TX_WATCHDOG; in sky2_init_netdev()
4602 dev->netdev_ops = &sky2_netdev_ops[port]; in sky2_init_netdev()
4605 sky2->netdev = dev; in sky2_init_netdev()
4606 sky2->hw = hw; in sky2_init_netdev()
4607 sky2->msg_enable = netif_msg_init(debug, default_msg); in sky2_init_netdev()
4609 u64_stats_init(&sky2->tx_stats.syncp); in sky2_init_netdev()
4610 u64_stats_init(&sky2->rx_stats.syncp); in sky2_init_netdev()
4612 /* Auto speed and flow control */ in sky2_init_netdev()
4613 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE; in sky2_init_netdev()
4614 if (hw->chip_id != CHIP_ID_YUKON_XL) in sky2_init_netdev()
4615 dev->hw_features |= NETIF_F_RXCSUM; in sky2_init_netdev()
4617 sky2->flow_mode = FC_BOTH; in sky2_init_netdev()
4619 sky2->duplex = -1; in sky2_init_netdev()
4620 sky2->speed = -1; in sky2_init_netdev()
4621 sky2->advertising = sky2_supported_modes(hw); in sky2_init_netdev()
4622 sky2->wol = wol; in sky2_init_netdev()
4624 spin_lock_init(&sky2->phy_lock); in sky2_init_netdev()
4626 sky2->tx_pending = TX_DEF_PENDING; in sky2_init_netdev()
4627 sky2->tx_ring_size = roundup_ring_size(TX_DEF_PENDING); in sky2_init_netdev()
4628 sky2->rx_pending = RX_DEF_PENDING; in sky2_init_netdev()
4630 hw->dev[port] = dev; in sky2_init_netdev()
4632 sky2->port = port; in sky2_init_netdev()
4634 dev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO; in sky2_init_netdev()
4637 dev->features |= NETIF_F_HIGHDMA; in sky2_init_netdev()
4640 if (!(hw->flags & SKY2_HW_RSS_BROKEN)) in sky2_init_netdev()
4641 dev->hw_features |= NETIF_F_RXHASH; in sky2_init_netdev()
4643 if (!(hw->flags & SKY2_HW_VLAN_BROKEN)) { in sky2_init_netdev()
4644 dev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX | in sky2_init_netdev()
4646 dev->vlan_features |= SKY2_VLAN_OFFLOADS; in sky2_init_netdev()
4649 dev->features |= dev->hw_features; in sky2_init_netdev()
4651 /* MTU range: 60 - 1500 or 9000 */ in sky2_init_netdev()
4652 dev->min_mtu = ETH_ZLEN; in sky2_init_netdev()
4653 if (hw->chip_id == CHIP_ID_YUKON_FE || in sky2_init_netdev()
4654 hw->chip_id == CHIP_ID_YUKON_FE_P) in sky2_init_netdev()
4655 dev->max_mtu = ETH_DATA_LEN; in sky2_init_netdev()
4657 dev->max_mtu = ETH_JUMBO_MTU; in sky2_init_netdev()
4663 ret = of_get_ethdev_address(hw->pdev->dev.of_node, dev); in sky2_init_netdev()
4667 memcpy_fromio(addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN); in sky2_init_netdev()
4672 if (!is_valid_ether_addr(dev->dev_addr)) { in sky2_init_netdev()
4675 dev_warn(&hw->pdev->dev, "Invalid MAC address, defaulting to random\n"); in sky2_init_netdev()
4677 memcpy(sa.sa_data, dev->dev_addr, ETH_ALEN); in sky2_init_netdev()
4679 dev_warn(&hw->pdev->dev, "Failed to set MAC address.\n"); in sky2_init_netdev()
4689 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr); in sky2_show_addr()
4695 struct sky2_hw *hw = dev_id; in sky2_test_intr() local
4696 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2); in sky2_test_intr()
4702 hw->flags |= SKY2_HW_USE_MSI; in sky2_test_intr()
4703 wake_up(&hw->msi_wait); in sky2_test_intr()
4704 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); in sky2_test_intr()
4706 sky2_write32(hw, B0_Y2_SP_ICR, 2); in sky2_test_intr()
4712 static int sky2_test_msi(struct sky2_hw *hw) in sky2_test_msi() argument
4714 struct pci_dev *pdev = hw->pdev; in sky2_test_msi()
4717 init_waitqueue_head(&hw->msi_wait); in sky2_test_msi()
4719 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw); in sky2_test_msi()
4721 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq); in sky2_test_msi()
4725 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW); in sky2_test_msi()
4727 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ); in sky2_test_msi()
4728 sky2_read8(hw, B0_CTST); in sky2_test_msi()
4730 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10); in sky2_test_msi()
4732 if (!(hw->flags & SKY2_HW_USE_MSI)) { in sky2_test_msi()
4734 dev_info(&pdev->dev, "No interrupt generated using MSI, " in sky2_test_msi()
4737 err = -EOPNOTSUPP; in sky2_test_msi()
4738 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ); in sky2_test_msi()
4741 sky2_write32(hw, B0_IMSK, 0); in sky2_test_msi()
4742 sky2_read32(hw, B0_IMSK); in sky2_test_msi()
4744 free_irq(pdev->irq, hw); in sky2_test_msi()
4768 snprintf(buf, sz, "%s", name[chipid - CHIP_ID_YUKON_XL]); in sky2_name()
4783 .ident = "Gateway P-79",
4786 DMI_MATCH(DMI_PRODUCT_NAME, "P-79"),
4816 struct sky2_hw *hw; in sky2_probe() local
4823 dev_err(&pdev->dev, "cannot enable PCI device\n"); in sky2_probe()
4828 * Note: only regular PCI config access once to test for HW issues in sky2_probe()
4834 dev_err(&pdev->dev, "PCI read config failed\n"); in sky2_probe()
4839 dev_err(&pdev->dev, "PCI configuration read error\n"); in sky2_probe()
4840 err = -EIO; in sky2_probe()
4846 dev_err(&pdev->dev, "cannot obtain PCI resources\n"); in sky2_probe()
4853 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { in sky2_probe()
4855 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); in sky2_probe()
4857 dev_err(&pdev->dev, "unable to obtain 64 bit DMA " in sky2_probe()
4862 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); in sky2_probe()
4864 dev_err(&pdev->dev, "no usable DMA configuration\n"); in sky2_probe()
4877 dev_err(&pdev->dev, "PCI write config failed\n"); in sky2_probe()
4882 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0; in sky2_probe()
4884 err = -ENOMEM; in sky2_probe()
4886 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:") in sky2_probe()
4888 if (!hw) in sky2_probe()
4891 hw->pdev = pdev; in sky2_probe()
4892 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev)); in sky2_probe()
4894 hw->regs = ioremap(pci_resource_start(pdev, 0), 0x4000); in sky2_probe()
4895 if (!hw->regs) { in sky2_probe()
4896 dev_err(&pdev->dev, "cannot map device registers\n"); in sky2_probe()
4900 err = sky2_init(hw); in sky2_probe()
4905 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING); in sky2_probe()
4906 hw->st_le = dma_alloc_coherent(&pdev->dev, in sky2_probe()
4907 hw->st_size * sizeof(struct sky2_status_le), in sky2_probe()
4908 &hw->st_dma, GFP_KERNEL); in sky2_probe()
4909 if (!hw->st_le) { in sky2_probe()
4910 err = -ENOMEM; in sky2_probe()
4914 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n", in sky2_probe()
4915 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev); in sky2_probe()
4917 sky2_reset(hw); in sky2_probe()
4919 dev = sky2_init_netdev(hw, 0, using_dac, wol_default); in sky2_probe()
4921 err = -ENOMEM; in sky2_probe()
4925 if (disable_msi == -1) in sky2_probe()
4929 err = sky2_test_msi(hw); in sky2_probe()
4932 if (err != -EOPNOTSUPP) in sky2_probe()
4937 netif_napi_add(dev, &hw->napi, sky2_poll); in sky2_probe()
4941 dev_err(&pdev->dev, "cannot register net device\n"); in sky2_probe()
4949 if (hw->ports > 1) { in sky2_probe()
4950 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default); in sky2_probe()
4952 err = -ENOMEM; in sky2_probe()
4958 dev_err(&pdev->dev, "cannot register second net device\n"); in sky2_probe()
4962 err = sky2_setup_irq(hw, hw->irq_name); in sky2_probe()
4969 timer_setup(&hw->watchdog_timer, sky2_watchdog, 0); in sky2_probe()
4970 INIT_WORK(&hw->restart_work, sky2_restart); in sky2_probe()
4972 pci_set_drvdata(pdev, hw); in sky2_probe()
4973 pdev->d3hot_delay = 300; in sky2_probe()
4984 if (hw->flags & SKY2_HW_USE_MSI) in sky2_probe()
4988 dma_free_coherent(&pdev->dev, in sky2_probe()
4989 hw->st_size * sizeof(struct sky2_status_le), in sky2_probe()
4990 hw->st_le, hw->st_dma); in sky2_probe()
4992 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_probe()
4994 iounmap(hw->regs); in sky2_probe()
4996 kfree(hw); in sky2_probe()
5007 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_remove() local
5010 if (!hw) in sky2_remove()
5013 timer_shutdown_sync(&hw->watchdog_timer); in sky2_remove()
5014 cancel_work_sync(&hw->restart_work); in sky2_remove()
5016 for (i = hw->ports-1; i >= 0; --i) in sky2_remove()
5017 unregister_netdev(hw->dev[i]); in sky2_remove()
5019 sky2_write32(hw, B0_IMSK, 0); in sky2_remove()
5020 sky2_read32(hw, B0_IMSK); in sky2_remove()
5022 sky2_power_aux(hw); in sky2_remove()
5024 sky2_write8(hw, B0_CTST, CS_RST_SET); in sky2_remove()
5025 sky2_read8(hw, B0_CTST); in sky2_remove()
5027 if (hw->ports > 1) { in sky2_remove()
5028 napi_disable(&hw->napi); in sky2_remove()
5029 free_irq(pdev->irq, hw); in sky2_remove()
5032 if (hw->flags & SKY2_HW_USE_MSI) in sky2_remove()
5034 dma_free_coherent(&pdev->dev, in sky2_remove()
5035 hw->st_size * sizeof(struct sky2_status_le), in sky2_remove()
5036 hw->st_le, hw->st_dma); in sky2_remove()
5040 for (i = hw->ports-1; i >= 0; --i) in sky2_remove()
5041 free_netdev(hw->dev[i]); in sky2_remove()
5043 iounmap(hw->regs); in sky2_remove()
5044 kfree(hw); in sky2_remove()
5049 struct sky2_hw *hw = dev_get_drvdata(dev); in sky2_suspend() local
5052 if (!hw) in sky2_suspend()
5055 timer_delete_sync(&hw->watchdog_timer); in sky2_suspend()
5056 cancel_work_sync(&hw->restart_work); in sky2_suspend()
5060 sky2_all_down(hw); in sky2_suspend()
5061 for (i = 0; i < hw->ports; i++) { in sky2_suspend()
5062 struct net_device *dev = hw->dev[i]; in sky2_suspend()
5065 if (sky2->wol) in sky2_suspend()
5069 sky2_power_aux(hw); in sky2_suspend()
5079 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_resume() local
5082 if (!hw) in sky2_resume()
5085 /* Re-enable all clocks */ in sky2_resume()
5088 dev_err(&pdev->dev, "PCI write config failed\n"); in sky2_resume()
5093 sky2_reset(hw); in sky2_resume()
5094 sky2_all_up(hw); in sky2_resume()
5100 dev_err(&pdev->dev, "resume failed (%d)\n", err); in sky2_resume()
5115 struct sky2_hw *hw = pci_get_drvdata(pdev); in sky2_shutdown() local
5118 for (port = 0; port < hw->ports; port++) { in sky2_shutdown()
5119 struct net_device *ndev = hw->dev[port]; in sky2_shutdown()
5128 sky2_suspend(&pdev->dev); in sky2_shutdown()
5129 pci_wake_from_d3(pdev, device_may_wakeup(&pdev->dev)); in sky2_shutdown()
5160 MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");