Lines Matching full:pf
58 struct otx2_nic *pf = netdev_priv(netdev); in otx2_change_mtu() local
62 if (pf->xdp_prog && new_mtu > MAX_XDP_MTU) { in otx2_change_mtu()
80 static void otx2_disable_flr_me_intr(struct otx2_nic *pf) in otx2_disable_flr_me_intr() argument
82 int irq, vfs = pf->total_vfs; in otx2_disable_flr_me_intr()
85 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
86 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0); in otx2_disable_flr_me_intr()
87 free_irq(irq, pf); in otx2_disable_flr_me_intr()
90 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
91 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0); in otx2_disable_flr_me_intr()
92 free_irq(irq, pf); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
98 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME1); in otx2_disable_flr_me_intr()
99 free_irq(irq, pf); in otx2_disable_flr_me_intr()
101 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
102 irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR1); in otx2_disable_flr_me_intr()
103 free_irq(irq, pf); in otx2_disable_flr_me_intr()
106 static void otx2_flr_wq_destroy(struct otx2_nic *pf) in otx2_flr_wq_destroy() argument
108 if (!pf->flr_wq) in otx2_flr_wq_destroy()
110 destroy_workqueue(pf->flr_wq); in otx2_flr_wq_destroy()
111 pf->flr_wq = NULL; in otx2_flr_wq_destroy()
112 devm_kfree(pf->dev, pf->flr_wrk); in otx2_flr_wq_destroy()
118 struct otx2_nic *pf = flrwork->pf; in otx2_flr_handler() local
119 struct mbox *mbox = &pf->mbox; in otx2_flr_handler()
123 vf = flrwork - pf->flr_wrk; in otx2_flr_handler()
134 if (!otx2_sync_mbox_msg(&pf->mbox)) { in otx2_flr_handler()
140 otx2_write64(pf, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); in otx2_flr_handler()
141 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in otx2_flr_handler()
149 struct otx2_nic *pf = (struct otx2_nic *)pf_irq; in otx2_pf_flr_intr_handler() local
153 if (pf->total_vfs > 64) in otx2_pf_flr_intr_handler()
157 intr = otx2_read64(pf, RVU_PF_VFFLR_INTX(reg)); in otx2_pf_flr_intr_handler()
165 queue_work(pf->flr_wq, &pf->flr_wrk[dev].work); in otx2_pf_flr_intr_handler()
167 otx2_write64(pf, RVU_PF_VFFLR_INTX(reg), BIT_ULL(vf)); in otx2_pf_flr_intr_handler()
169 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg), in otx2_pf_flr_intr_handler()
178 struct otx2_nic *pf = (struct otx2_nic *)pf_irq; in otx2_pf_me_intr_handler() local
182 if (pf->total_vfs > 64) in otx2_pf_me_intr_handler()
186 intr = otx2_read64(pf, RVU_PF_VFME_INTX(reg)); in otx2_pf_me_intr_handler()
193 otx2_write64(pf, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); in otx2_pf_me_intr_handler()
195 otx2_write64(pf, RVU_PF_VFME_INTX(reg), BIT_ULL(vf)); in otx2_pf_me_intr_handler()
201 static int otx2_register_flr_me_intr(struct otx2_nic *pf, int numvfs) in otx2_register_flr_me_intr() argument
203 struct otx2_hw *hw = &pf->hw; in otx2_register_flr_me_intr()
210 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr()
211 ret = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0), in otx2_register_flr_me_intr()
212 otx2_pf_me_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
214 dev_err(pf->dev, in otx2_register_flr_me_intr()
221 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr()
222 ret = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0), in otx2_register_flr_me_intr()
223 otx2_pf_flr_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
225 dev_err(pf->dev, in otx2_register_flr_me_intr()
233 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr()
235 (pf->pdev, RVU_PF_INT_VEC_VFME1), in otx2_register_flr_me_intr()
236 otx2_pf_me_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
238 dev_err(pf->dev, in otx2_register_flr_me_intr()
243 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_flr_me_intr()
245 (pf->pdev, RVU_PF_INT_VEC_VFFLR1), in otx2_register_flr_me_intr()
246 otx2_pf_flr_intr_handler, 0, irq_name, pf); in otx2_register_flr_me_intr()
248 dev_err(pf->dev, in otx2_register_flr_me_intr()
255 otx2_write64(pf, RVU_PF_VFME_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
256 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
259 otx2_write64(pf, RVU_PF_VFFLR_INTX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
260 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
265 otx2_write64(pf, RVU_PF_VFME_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
266 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()
269 otx2_write64(pf, RVU_PF_VFFLR_INTX(1), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
270 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()
276 static int otx2_pf_flr_init(struct otx2_nic *pf, int num_vfs) in otx2_pf_flr_init() argument
280 pf->flr_wq = alloc_ordered_workqueue("otx2_pf_flr_wq", WQ_HIGHPRI); in otx2_pf_flr_init()
281 if (!pf->flr_wq) in otx2_pf_flr_init()
284 pf->flr_wrk = devm_kcalloc(pf->dev, num_vfs, in otx2_pf_flr_init()
286 if (!pf->flr_wrk) { in otx2_pf_flr_init()
287 destroy_workqueue(pf->flr_wq); in otx2_pf_flr_init()
292 pf->flr_wrk[vf].pf = pf; in otx2_pf_flr_init()
293 INIT_WORK(&pf->flr_wrk[vf].work, otx2_flr_handler); in otx2_pf_flr_init()
317 * when the interrupt handler is called. pf->mw[i].num_msgs in otx2_queue_vf_work()
319 * pf->mw[i].up_num_msgs holds the data for use in in otx2_queue_vf_work()
358 static int otx2_forward_vf_mbox_msgs(struct otx2_nic *pf, in otx2_forward_vf_mbox_msgs() argument
369 /* Set VF's mailbox memory as PF's bounce buffer memory, so in otx2_forward_vf_mbox_msgs()
370 * that explicit copying of VF's msgs to PF=>AF mbox region in otx2_forward_vf_mbox_msgs()
371 * and AF=>PF responses to VF's mbox region can be avoided. in otx2_forward_vf_mbox_msgs()
377 dst_mbox = &pf->mbox; in otx2_forward_vf_mbox_msgs()
386 mutex_lock(&pf->mbox.lock); in otx2_forward_vf_mbox_msgs()
397 dev_warn(pf->dev, in otx2_forward_vf_mbox_msgs()
399 /* restore PF mbase and exit */ in otx2_forward_vf_mbox_msgs()
400 dst_mdev->mbase = pf->mbox.bbuf_base; in otx2_forward_vf_mbox_msgs()
401 mutex_unlock(&pf->mbox.lock); in otx2_forward_vf_mbox_msgs()
412 otx2_forward_msg_pfvf(dst_mdev, &pf->mbox_pfvf[0].mbox, in otx2_forward_vf_mbox_msgs()
413 pf->mbox.bbuf_base, vf); in otx2_forward_vf_mbox_msgs()
414 mutex_unlock(&pf->mbox.lock); in otx2_forward_vf_mbox_msgs()
422 dst_mbox = &pf->mbox_pfvf[0]; in otx2_forward_vf_mbox_msgs()
435 dev_warn(pf->dev, in otx2_forward_vf_mbox_msgs()
443 otx2_forward_msg_pfvf(&pf->mbox_pfvf->mbox_up.dev[vf], in otx2_forward_vf_mbox_msgs()
444 &pf->mbox.mbox_up, in otx2_forward_vf_mbox_msgs()
445 pf->mbox_pfvf[vf].bbuf_base, in otx2_forward_vf_mbox_msgs()
459 struct otx2_nic *pf; in otx2_pfvf_mbox_handler() local
462 pf = vf_mbox->pfvf; in otx2_pfvf_mbox_handler()
463 vf_idx = vf_mbox - pf->mbox_pfvf; in otx2_pfvf_mbox_handler()
465 mbox = &pf->mbox_pfvf[0].mbox; in otx2_pfvf_mbox_handler()
470 trace_otx2_msg_status(pf->pdev, "PF-VF down queue handler(forwarding)", in otx2_pfvf_mbox_handler()
485 err = otx2_forward_vf_mbox_msgs(pf, mbox, MBOX_DIR_PFAF, vf_idx, in otx2_pfvf_mbox_handler()
499 struct otx2_nic *pf = vf_mbox->pfvf; in otx2_pfvf_mbox_up_handler() local
505 vf_idx = vf_mbox - pf->mbox_pfvf; in otx2_pfvf_mbox_up_handler()
506 mbox = &pf->mbox_pfvf[0].mbox_up; in otx2_pfvf_mbox_up_handler()
511 trace_otx2_msg_status(pf->pdev, "PF-VF up queue handler(response)", in otx2_pfvf_mbox_up_handler()
518 dev_err(pf->dev, in otx2_pfvf_mbox_up_handler()
524 dev_err(pf->dev, in otx2_pfvf_mbox_up_handler()
536 dev_err(pf->dev, in otx2_pfvf_mbox_up_handler()
552 struct otx2_nic *pf = (struct otx2_nic *)(pf_irq); in otx2_pfvf_mbox_intr_handler() local
553 int vfs = pf->total_vfs; in otx2_pfvf_mbox_intr_handler()
557 mbox = pf->mbox_pfvf; in otx2_pfvf_mbox_intr_handler()
560 intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(1)); in otx2_pfvf_mbox_intr_handler()
561 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), intr); in otx2_pfvf_mbox_intr_handler()
562 otx2_queue_vf_work(mbox, pf->mbox_pfvf_wq, 64, vfs, intr); in otx2_pfvf_mbox_intr_handler()
564 trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr); in otx2_pfvf_mbox_intr_handler()
568 intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(0)); in otx2_pfvf_mbox_intr_handler()
569 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), intr); in otx2_pfvf_mbox_intr_handler()
571 otx2_queue_vf_work(mbox, pf->mbox_pfvf_wq, 0, vfs, intr); in otx2_pfvf_mbox_intr_handler()
574 trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr); in otx2_pfvf_mbox_intr_handler()
579 static void *cn20k_pfvf_mbox_alloc(struct otx2_nic *pf, int numvfs) in cn20k_pfvf_mbox_alloc() argument
584 err = qmem_alloc(&pf->pdev->dev, &mbox_addr, numvfs, MBOX_SIZE); in cn20k_pfvf_mbox_alloc()
586 dev_err(pf->dev, "qmem alloc fail\n"); in cn20k_pfvf_mbox_alloc()
590 otx2_write64(pf, RVU_PF_VF_MBOX_ADDR, (u64)mbox_addr->iova); in cn20k_pfvf_mbox_alloc()
591 pf->pfvf_mbox_addr = mbox_addr; in cn20k_pfvf_mbox_alloc()
596 static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs) in otx2_pfvf_mbox_init() argument
606 pf->mbox_pfvf = devm_kcalloc(&pf->pdev->dev, numvfs, in otx2_pfvf_mbox_init()
608 if (!pf->mbox_pfvf) in otx2_pfvf_mbox_init()
611 pf->mbox_pfvf_wq = alloc_workqueue("otx2_pfvf_mailbox", in otx2_pfvf_mbox_init()
614 if (!pf->mbox_pfvf_wq) in otx2_pfvf_mbox_init()
617 /* For CN20K, PF allocates mbox memory in DRAM and writes PF/VF in otx2_pfvf_mbox_init()
619 * gives the aliased address to access PF/VF mailbox regions. in otx2_pfvf_mbox_init()
621 if (is_cn20k(pf->pdev)) { in otx2_pfvf_mbox_init()
622 hwbase = (void __iomem *)cn20k_pfvf_mbox_alloc(pf, numvfs); in otx2_pfvf_mbox_init()
624 /* On CN10K platform, PF <-> VF mailbox region follows after in otx2_pfvf_mbox_init()
625 * PF <-> AF mailbox region. in otx2_pfvf_mbox_init()
627 if (test_bit(CN10K_MBOX, &pf->hw.cap_flag)) in otx2_pfvf_mbox_init()
628 base = pci_resource_start(pf->pdev, PCI_MBOX_BAR_NUM) + in otx2_pfvf_mbox_init()
631 base = readq(pf->reg_base + RVU_PF_VF_BAR4_ADDR); in otx2_pfvf_mbox_init()
633 hwbase = ioremap_wc(base, MBOX_SIZE * pf->total_vfs); in otx2_pfvf_mbox_init()
640 mbox = &pf->mbox_pfvf[0]; in otx2_pfvf_mbox_init()
641 err = otx2_mbox_init(&mbox->mbox, hwbase, pf->pdev, pf->reg_base, in otx2_pfvf_mbox_init()
646 err = otx2_mbox_init(&mbox->mbox_up, hwbase, pf->pdev, pf->reg_base, in otx2_pfvf_mbox_init()
652 mbox->pfvf = pf; in otx2_pfvf_mbox_init()
661 if (hwbase && !(is_cn20k(pf->pdev))) in otx2_pfvf_mbox_init()
664 destroy_workqueue(pf->mbox_pfvf_wq); in otx2_pfvf_mbox_init()
668 static void otx2_pfvf_mbox_destroy(struct otx2_nic *pf) in otx2_pfvf_mbox_destroy() argument
670 struct mbox *mbox = &pf->mbox_pfvf[0]; in otx2_pfvf_mbox_destroy()
675 if (pf->mbox_pfvf_wq) { in otx2_pfvf_mbox_destroy()
676 destroy_workqueue(pf->mbox_pfvf_wq); in otx2_pfvf_mbox_destroy()
677 pf->mbox_pfvf_wq = NULL; in otx2_pfvf_mbox_destroy()
680 if (mbox->mbox.hwbase && !is_cn20k(pf->pdev)) in otx2_pfvf_mbox_destroy()
683 qmem_free(&pf->pdev->dev, pf->pfvf_mbox_addr); in otx2_pfvf_mbox_destroy()
688 static void otx2_enable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) in otx2_enable_pfvf_mbox_intr() argument
690 /* Clear PF <=> VF mailbox IRQ */ in otx2_enable_pfvf_mbox_intr()
691 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), ~0ull); in otx2_enable_pfvf_mbox_intr()
692 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), ~0ull); in otx2_enable_pfvf_mbox_intr()
694 /* Enable PF <=> VF mailbox IRQ */ in otx2_enable_pfvf_mbox_intr()
695 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_enable_pfvf_mbox_intr()
698 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(1), in otx2_enable_pfvf_mbox_intr()
703 static void otx2_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) in otx2_disable_pfvf_mbox_intr() argument
707 if (is_cn20k(pf->pdev)) in otx2_disable_pfvf_mbox_intr()
708 return cn20k_disable_pfvf_mbox_intr(pf, numvfs); in otx2_disable_pfvf_mbox_intr()
710 /* Disable PF <=> VF mailbox IRQ */ in otx2_disable_pfvf_mbox_intr()
711 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), ~0ull); in otx2_disable_pfvf_mbox_intr()
712 otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(1), ~0ull); in otx2_disable_pfvf_mbox_intr()
714 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(0), ~0ull); in otx2_disable_pfvf_mbox_intr()
715 vector = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFPF_MBOX0); in otx2_disable_pfvf_mbox_intr()
716 free_irq(vector, pf); in otx2_disable_pfvf_mbox_intr()
719 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), ~0ull); in otx2_disable_pfvf_mbox_intr()
720 vector = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFPF_MBOX1); in otx2_disable_pfvf_mbox_intr()
721 free_irq(vector, pf); in otx2_disable_pfvf_mbox_intr()
725 static int otx2_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) in otx2_register_pfvf_mbox_intr() argument
727 struct otx2_hw *hw = &pf->hw; in otx2_register_pfvf_mbox_intr()
731 if (is_cn20k(pf->pdev)) in otx2_register_pfvf_mbox_intr()
732 return cn20k_register_pfvf_mbox_intr(pf, numvfs); in otx2_register_pfvf_mbox_intr()
736 if (pf->pcifunc) in otx2_register_pfvf_mbox_intr()
738 "RVUPF%d_VF Mbox0", rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_pfvf_mbox_intr()
741 err = request_irq(pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFPF_MBOX0), in otx2_register_pfvf_mbox_intr()
742 otx2_pfvf_mbox_intr_handler, 0, irq_name, pf); in otx2_register_pfvf_mbox_intr()
744 dev_err(pf->dev, in otx2_register_pfvf_mbox_intr()
752 if (pf->pcifunc) in otx2_register_pfvf_mbox_intr()
755 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_pfvf_mbox_intr()
758 err = request_irq(pci_irq_vector(pf->pdev, in otx2_register_pfvf_mbox_intr()
761 0, irq_name, pf); in otx2_register_pfvf_mbox_intr()
763 dev_err(pf->dev, in otx2_register_pfvf_mbox_intr()
769 otx2_enable_pfvf_mbox_intr(pf, numvfs); in otx2_register_pfvf_mbox_intr()
774 static void otx2_process_pfaf_mbox_msg(struct otx2_nic *pf, in otx2_process_pfaf_mbox_msg() argument
780 dev_err(pf->dev, in otx2_process_pfaf_mbox_msg()
786 dev_err(pf->dev, in otx2_process_pfaf_mbox_msg()
795 struct otx2_vf_config *config = &pf->vf_configs[devid - 1]; in otx2_process_pfaf_mbox_msg()
814 pf->pcifunc = msg->pcifunc; in otx2_process_pfaf_mbox_msg()
817 mbox_handler_msix_offset(pf, (struct msix_offset_rsp *)msg); in otx2_process_pfaf_mbox_msg()
820 mbox_handler_npa_lf_alloc(pf, (struct npa_lf_alloc_rsp *)msg); in otx2_process_pfaf_mbox_msg()
823 mbox_handler_nix_lf_alloc(pf, (struct nix_lf_alloc_rsp *)msg); in otx2_process_pfaf_mbox_msg()
826 mbox_handler_nix_bp_enable(pf, (struct nix_bp_cfg_rsp *)msg); in otx2_process_pfaf_mbox_msg()
829 mbox_handler_cgx_stats(pf, (struct cgx_stats_rsp *)msg); in otx2_process_pfaf_mbox_msg()
832 mbox_handler_cgx_fec_stats(pf, (struct cgx_fec_stats_rsp *)msg); in otx2_process_pfaf_mbox_msg()
836 dev_err(pf->dev, in otx2_process_pfaf_mbox_msg()
850 struct otx2_nic *pf; in otx2_pfaf_mbox_handler() local
861 pf = af_mbox->pfvf; in otx2_pfaf_mbox_handler()
863 trace_otx2_msg_status(pf->pdev, "PF-AF down queue handler(response)", in otx2_pfaf_mbox_handler()
868 otx2_process_pfaf_mbox_msg(pf, msg); in otx2_pfaf_mbox_handler()
877 static void otx2_handle_link_event(struct otx2_nic *pf) in otx2_handle_link_event() argument
879 struct cgx_link_user_info *linfo = &pf->linfo; in otx2_handle_link_event()
880 struct net_device *netdev = pf->netdev; in otx2_handle_link_event()
882 if (pf->flags & OTX2_FLAG_PORT_UP) in otx2_handle_link_event()
897 static int otx2_mbox_up_handler_rep_event_up_notify(struct otx2_nic *pf, in otx2_mbox_up_handler_rep_event_up_notify() argument
901 struct net_device *netdev = pf->netdev; in otx2_mbox_up_handler_rep_event_up_notify()
910 pf->flags |= OTX2_FLAG_PORT_UP; in otx2_mbox_up_handler_rep_event_up_notify()
914 pf->flags &= ~OTX2_FLAG_PORT_UP; in otx2_mbox_up_handler_rep_event_up_notify()
921 rvu_event_up_notify(pf, info); in otx2_mbox_up_handler_rep_event_up_notify()
926 int otx2_mbox_up_handler_mcs_intr_notify(struct otx2_nic *pf, in otx2_mbox_up_handler_mcs_intr_notify() argument
930 cn10k_handle_mcs_event(pf, event); in otx2_mbox_up_handler_mcs_intr_notify()
935 int otx2_mbox_up_handler_cgx_link_event(struct otx2_nic *pf, in otx2_mbox_up_handler_cgx_link_event() argument
942 pf->linfo = msg->link_info; in otx2_mbox_up_handler_cgx_link_event()
945 for (i = 0; i < pci_num_vf(pf->pdev); i++) { in otx2_mbox_up_handler_cgx_link_event()
946 struct otx2_vf_config *config = &pf->vf_configs[i]; in otx2_mbox_up_handler_cgx_link_event()
956 if (pf->flags & OTX2_FLAG_INTF_DOWN) in otx2_mbox_up_handler_cgx_link_event()
959 otx2_handle_link_event(pf); in otx2_mbox_up_handler_cgx_link_event()
963 static int otx2_process_mbox_msg_up(struct otx2_nic *pf, in otx2_process_mbox_msg_up() argument
968 otx2_reply_invalid_msg(&pf->mbox.mbox_up, 0, 0, req->id); in otx2_process_mbox_msg_up()
979 &pf->mbox.mbox_up, 0, \ in otx2_process_mbox_msg_up()
990 pf, (struct _req_type *)req, rsp); \ in otx2_process_mbox_msg_up()
999 otx2_reply_invalid_msg(&pf->mbox.mbox_up, 0, 0, req->id); in otx2_process_mbox_msg_up()
1010 struct otx2_nic *pf = af_mbox->pfvf; in otx2_pfaf_mbox_up_handler() local
1021 trace_otx2_msg_status(pf->pdev, "PF-AF up queue handler(notification)", in otx2_pfaf_mbox_up_handler()
1030 otx2_process_mbox_msg_up(pf, msg); in otx2_pfaf_mbox_up_handler()
1034 if (devid && pci_num_vf(pf->pdev)) { in otx2_pfaf_mbox_up_handler()
1035 otx2_forward_vf_mbox_msgs(pf, &pf->mbox.mbox_up, in otx2_pfaf_mbox_up_handler()
1046 struct otx2_nic *pf = (struct otx2_nic *)pf_irq; in otx2_pfaf_mbox_intr_handler() local
1047 struct mbox *mw = &pf->mbox; in otx2_pfaf_mbox_intr_handler()
1054 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0)); in otx2_pfaf_mbox_intr_handler()
1057 mbox_data = otx2_read64(pf, RVU_PF_PFAF_MBOX0); in otx2_pfaf_mbox_intr_handler()
1061 otx2_write64(pf, RVU_PF_PFAF_MBOX0, mbox_data); in otx2_pfaf_mbox_intr_handler()
1069 queue_work(pf->mbox_wq, &mw->mbox_up_wrk); in otx2_pfaf_mbox_intr_handler()
1071 trace_otx2_msg_interrupt(pf->pdev, "UP message from AF to PF", in otx2_pfaf_mbox_intr_handler()
1074 trace_otx2_msg_status(pf->pdev, "PF-AF up work queued(interrupt)", in otx2_pfaf_mbox_intr_handler()
1080 otx2_write64(pf, RVU_PF_PFAF_MBOX0, mbox_data); in otx2_pfaf_mbox_intr_handler()
1088 queue_work(pf->mbox_wq, &mw->mbox_wrk); in otx2_pfaf_mbox_intr_handler()
1090 trace_otx2_msg_interrupt(pf->pdev, "DOWN reply from AF to PF", in otx2_pfaf_mbox_intr_handler()
1093 trace_otx2_msg_status(pf->pdev, "PF-AF down work queued(interrupt)", in otx2_pfaf_mbox_intr_handler()
1100 void otx2_disable_mbox_intr(struct otx2_nic *pf) in otx2_disable_mbox_intr() argument
1104 /* Disable AF => PF mailbox IRQ */ in otx2_disable_mbox_intr()
1105 if (!is_cn20k(pf->pdev)) { in otx2_disable_mbox_intr()
1106 vector = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_AFPF_MBOX); in otx2_disable_mbox_intr()
1107 otx2_write64(pf, RVU_PF_INT_ENA_W1C, BIT_ULL(0)); in otx2_disable_mbox_intr()
1109 vector = pci_irq_vector(pf->pdev, in otx2_disable_mbox_intr()
1111 otx2_write64(pf, RVU_PF_INT_ENA_W1C, in otx2_disable_mbox_intr()
1114 free_irq(vector, pf); in otx2_disable_mbox_intr()
1118 int otx2_register_mbox_intr(struct otx2_nic *pf, bool probe_af) in otx2_register_mbox_intr() argument
1120 struct otx2_hw *hw = &pf->hw; in otx2_register_mbox_intr()
1126 if (!is_cn20k(pf->pdev)) { in otx2_register_mbox_intr()
1129 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_mbox_intr()
1131 (pf->pdev, RVU_PF_INT_VEC_AFPF_MBOX), in otx2_register_mbox_intr()
1132 pf->hw_ops->pfaf_mbox_intr_handler, in otx2_register_mbox_intr()
1133 0, irq_name, pf); in otx2_register_mbox_intr()
1138 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_register_mbox_intr()
1140 (pf->pdev, RVU_MBOX_PF_INT_VEC_AFPF_MBOX), in otx2_register_mbox_intr()
1141 pf->hw_ops->pfaf_mbox_intr_handler, in otx2_register_mbox_intr()
1142 0, irq_name, pf); in otx2_register_mbox_intr()
1145 dev_err(pf->dev, in otx2_register_mbox_intr()
1153 if (!is_cn20k(pf->pdev)) { in otx2_register_mbox_intr()
1154 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0)); in otx2_register_mbox_intr()
1155 otx2_write64(pf, RVU_PF_INT_ENA_W1S, BIT_ULL(0)); in otx2_register_mbox_intr()
1157 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0) | BIT_ULL(1)); in otx2_register_mbox_intr()
1158 otx2_write64(pf, RVU_PF_INT_ENA_W1S, BIT_ULL(0) | in otx2_register_mbox_intr()
1166 req = otx2_mbox_alloc_msg_ready(&pf->mbox); in otx2_register_mbox_intr()
1168 otx2_disable_mbox_intr(pf); in otx2_register_mbox_intr()
1171 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_register_mbox_intr()
1173 dev_warn(pf->dev, in otx2_register_mbox_intr()
1175 otx2_disable_mbox_intr(pf); in otx2_register_mbox_intr()
1182 void otx2_pfaf_mbox_destroy(struct otx2_nic *pf) in otx2_pfaf_mbox_destroy() argument
1184 struct mbox *mbox = &pf->mbox; in otx2_pfaf_mbox_destroy()
1186 if (pf->mbox_wq) { in otx2_pfaf_mbox_destroy()
1187 destroy_workqueue(pf->mbox_wq); in otx2_pfaf_mbox_destroy()
1188 pf->mbox_wq = NULL; in otx2_pfaf_mbox_destroy()
1191 if (mbox->mbox.hwbase && !is_cn20k(pf->pdev)) in otx2_pfaf_mbox_destroy()
1199 int otx2_pfaf_mbox_init(struct otx2_nic *pf) in otx2_pfaf_mbox_init() argument
1201 struct mbox *mbox = &pf->mbox; in otx2_pfaf_mbox_init()
1205 mbox->pfvf = pf; in otx2_pfaf_mbox_init()
1206 pf->mbox_wq = alloc_ordered_workqueue("otx2_pfaf_mailbox", in otx2_pfaf_mbox_init()
1208 if (!pf->mbox_wq) in otx2_pfaf_mbox_init()
1211 /* For CN20K, AF allocates mbox memory in DRAM and writes PF in otx2_pfaf_mbox_init()
1213 * gives the aliased address to access AF/PF mailbox regions. in otx2_pfaf_mbox_init()
1215 if (is_cn20k(pf->pdev)) in otx2_pfaf_mbox_init()
1216 hwbase = pf->reg_base + RVU_PFX_FUNC_PFAF_MBOX + in otx2_pfaf_mbox_init()
1220 * admin function (i.e AF) and this PF, shouldn't be mapped as in otx2_pfaf_mbox_init()
1224 (pf->pdev, PCI_MBOX_BAR_NUM), MBOX_SIZE); in otx2_pfaf_mbox_init()
1226 dev_err(pf->dev, "Unable to map PFAF mailbox region\n"); in otx2_pfaf_mbox_init()
1231 err = otx2_mbox_init(&mbox->mbox, hwbase, pf->pdev, pf->reg_base, in otx2_pfaf_mbox_init()
1236 err = otx2_mbox_init(&mbox->mbox_up, hwbase, pf->pdev, pf->reg_base, in otx2_pfaf_mbox_init()
1241 err = otx2_mbox_bbuf_init(mbox, pf->pdev); in otx2_pfaf_mbox_init()
1251 otx2_pfaf_mbox_destroy(pf); in otx2_pfaf_mbox_init()
1255 static int otx2_cgx_config_linkevents(struct otx2_nic *pf, bool enable) in otx2_cgx_config_linkevents() argument
1260 mutex_lock(&pf->mbox.lock); in otx2_cgx_config_linkevents()
1262 msg = otx2_mbox_alloc_msg_cgx_start_linkevents(&pf->mbox); in otx2_cgx_config_linkevents()
1264 msg = otx2_mbox_alloc_msg_cgx_stop_linkevents(&pf->mbox); in otx2_cgx_config_linkevents()
1267 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_linkevents()
1271 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_cgx_config_linkevents()
1272 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_linkevents()
1293 static int otx2_cgx_config_loopback(struct otx2_nic *pf, bool enable) in otx2_cgx_config_loopback() argument
1298 if (enable && !bitmap_empty(pf->flow_cfg->dmacflt_bmap, in otx2_cgx_config_loopback()
1299 pf->flow_cfg->dmacflt_max_flows)) in otx2_cgx_config_loopback()
1300 netdev_warn(pf->netdev, in otx2_cgx_config_loopback()
1303 mutex_lock(&pf->mbox.lock); in otx2_cgx_config_loopback()
1305 msg = otx2_mbox_alloc_msg_cgx_intlbk_enable(&pf->mbox); in otx2_cgx_config_loopback()
1307 msg = otx2_mbox_alloc_msg_cgx_intlbk_disable(&pf->mbox); in otx2_cgx_config_loopback()
1310 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_loopback()
1314 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_cgx_config_loopback()
1315 mutex_unlock(&pf->mbox.lock); in otx2_cgx_config_loopback()
1395 struct otx2_nic *pf = data; in otx2_q_intr_handler() local
1401 for (qidx = 0; qidx < pf->qset.cq_cnt; qidx++) { in otx2_q_intr_handler()
1402 ptr = otx2_get_regaddr(pf, NIX_LF_CQ_OP_INT); in otx2_q_intr_handler()
1405 otx2_write64(pf, NIX_LF_CQ_OP_INT, (qidx << 44) | in otx2_q_intr_handler()
1411 netdev_err(pf->netdev, in otx2_q_intr_handler()
1413 qidx, otx2_read64(pf, NIX_LF_ERR_INT)); in otx2_q_intr_handler()
1416 netdev_err(pf->netdev, "CQ%lld: Doorbell error", in otx2_q_intr_handler()
1419 netdev_err(pf->netdev, in otx2_q_intr_handler()
1424 schedule_work(&pf->reset_task); in otx2_q_intr_handler()
1428 for (qidx = 0; qidx < otx2_get_total_tx_queues(pf); qidx++) { in otx2_q_intr_handler()
1432 sq = &pf->qset.sq[qidx]; in otx2_q_intr_handler()
1441 ptr = otx2_get_regaddr(pf, NIX_LF_SQ_OP_INT); in otx2_q_intr_handler()
1443 otx2_write64(pf, NIX_LF_SQ_OP_INT, (qidx << 44) | in otx2_q_intr_handler()
1447 netdev_err(pf->netdev, in otx2_q_intr_handler()
1449 qidx, otx2_read64(pf, NIX_LF_ERR_INT)); in otx2_q_intr_handler()
1453 sq_op_err_dbg = otx2_read64(pf, NIX_LF_SQ_OP_ERR_DBG); in otx2_q_intr_handler()
1458 netdev_err(pf->netdev, in otx2_q_intr_handler()
1464 otx2_write64(pf, NIX_LF_SQ_OP_ERR_DBG, BIT_ULL(44)); in otx2_q_intr_handler()
1474 mnq_err_dbg = otx2_read64(pf, NIX_LF_MNQ_ERR_DBG); in otx2_q_intr_handler()
1479 netdev_err(pf->netdev, in otx2_q_intr_handler()
1483 otx2_write64(pf, NIX_LF_MNQ_ERR_DBG, BIT_ULL(44)); in otx2_q_intr_handler()
1486 snd_err_dbg = otx2_read64(pf, NIX_LF_SEND_ERR_DBG); in otx2_q_intr_handler()
1489 netdev_err(pf->netdev, in otx2_q_intr_handler()
1494 otx2_write64(pf, NIX_LF_SEND_ERR_DBG, BIT_ULL(44)); in otx2_q_intr_handler()
1500 netdev_err(pf->netdev, "SQ%lld: SQB allocation failed", in otx2_q_intr_handler()
1503 schedule_work(&pf->reset_task); in otx2_q_intr_handler()
1512 struct otx2_nic *pf = (struct otx2_nic *)cq_poll->dev; in otx2_cq_intr_handler() local
1520 otx2_write64(pf, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0)); in otx2_cq_intr_handler()
1523 pf->napi_events++; in otx2_cq_intr_handler()
1530 void otx2_disable_napi(struct otx2_nic *pf) in otx2_disable_napi() argument
1532 struct otx2_qset *qset = &pf->qset; in otx2_disable_napi()
1537 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_disable_napi()
1548 static void otx2_free_cq_res(struct otx2_nic *pf) in otx2_free_cq_res() argument
1550 struct otx2_qset *qset = &pf->qset; in otx2_free_cq_res()
1555 otx2_ctx_disable(&pf->mbox, NIX_AQ_CTYPE_CQ, false); in otx2_free_cq_res()
1558 qmem_free(pf->dev, cq->cqe); in otx2_free_cq_res()
1562 static void otx2_free_sq_res(struct otx2_nic *pf) in otx2_free_sq_res() argument
1564 struct otx2_qset *qset = &pf->qset; in otx2_free_sq_res()
1569 otx2_ctx_disable(&pf->mbox, NIX_AQ_CTYPE_SQ, false); in otx2_free_sq_res()
1571 otx2_sq_free_sqbs(pf); in otx2_free_sq_res()
1572 for (qidx = 0; qidx < otx2_get_total_tx_queues(pf); qidx++) { in otx2_free_sq_res()
1577 qmem_free(pf->dev, sq->sqe); in otx2_free_sq_res()
1578 qmem_free(pf->dev, sq->sqe_ring); in otx2_free_sq_res()
1579 qmem_free(pf->dev, sq->cpt_resp); in otx2_free_sq_res()
1580 qmem_free(pf->dev, sq->tso_hdrs); in otx2_free_sq_res()
1586 static int otx2_get_rbuf_size(struct otx2_nic *pf, int mtu) in otx2_get_rbuf_size() argument
1592 if (pf->hw.rbuf_len) in otx2_get_rbuf_size()
1593 return ALIGN(pf->hw.rbuf_len, OTX2_ALIGN) + OTX2_HEAD_ROOM; in otx2_get_rbuf_size()
1614 int otx2_init_hw_resources(struct otx2_nic *pf) in otx2_init_hw_resources() argument
1617 struct mbox *mbox = &pf->mbox; in otx2_init_hw_resources()
1618 struct otx2_hw *hw = &pf->hw; in otx2_init_hw_resources()
1627 hw->sqpool_cnt = otx2_get_total_tx_queues(pf); in otx2_init_hw_resources()
1630 if (!otx2_rep_dev(pf->pdev)) { in otx2_init_hw_resources()
1632 pf->tx_max_pktlen = pf->netdev->max_mtu + OTX2_ETH_HLEN; in otx2_init_hw_resources()
1633 pf->rbsize = otx2_get_rbuf_size(pf, pf->netdev->mtu); in otx2_init_hw_resources()
1638 err = otx2_config_npa(pf); in otx2_init_hw_resources()
1643 err = otx2_config_nix(pf); in otx2_init_hw_resources()
1648 otx2_nix_cpt_config_bp(pf, false); in otx2_init_hw_resources()
1650 /* Enable backpressure for CGX mapped PF/VFs */ in otx2_init_hw_resources()
1651 if (!is_otx2_lbkvf(pf->pdev)) in otx2_init_hw_resources()
1652 otx2_nix_config_bp(pf, true); in otx2_init_hw_resources()
1655 err = otx2_rq_aura_pool_init(pf); in otx2_init_hw_resources()
1661 err = otx2_sq_aura_pool_init(pf); in otx2_init_hw_resources()
1667 err = otx2_txsch_alloc(pf); in otx2_init_hw_resources()
1674 if (pf->pfc_en) { in otx2_init_hw_resources()
1675 err = otx2_pfc_txschq_alloc(pf); in otx2_init_hw_resources()
1683 err = otx2_config_nix_queues(pf); in otx2_init_hw_resources()
1692 for (idx = 0; idx < pf->hw.txschq_cnt[lvl]; idx++) { in otx2_init_hw_resources()
1693 err = otx2_txschq_config(pf, lvl, idx, false); in otx2_init_hw_resources()
1695 dev_err(pf->dev, "Failed to config TXSCH\n"); in otx2_init_hw_resources()
1703 if (pf->pfc_en) { in otx2_init_hw_resources()
1704 err = otx2_pfc_txschq_config(pf); in otx2_init_hw_resources()
1716 otx2_free_sq_res(pf); in otx2_init_hw_resources()
1717 otx2_free_cq_res(pf); in otx2_init_hw_resources()
1720 otx2_txschq_stop(pf); in otx2_init_hw_resources()
1722 otx2_sq_free_sqbs(pf); in otx2_init_hw_resources()
1724 otx2_free_aura_ptr(pf, AURA_NIX_RQ); in otx2_init_hw_resources()
1727 otx2_aura_pool_free(pf); in otx2_init_hw_resources()
1734 dev_err(pf->dev, "%s failed to free nixlf\n", __func__); in otx2_init_hw_resources()
1741 dev_err(pf->dev, "%s failed to free npalf\n", __func__); in otx2_init_hw_resources()
1749 void otx2_free_hw_resources(struct otx2_nic *pf) in otx2_free_hw_resources() argument
1751 struct otx2_qset *qset = &pf->qset; in otx2_free_hw_resources()
1753 struct mbox *mbox = &pf->mbox; in otx2_free_hw_resources()
1759 otx2_sqb_flush(pf); in otx2_free_hw_resources()
1762 otx2_txschq_stop(pf); in otx2_free_hw_resources()
1765 if (pf->pfc_en) in otx2_free_hw_resources()
1766 otx2_pfc_txschq_stop(pf); in otx2_free_hw_resources()
1769 if (!otx2_rep_dev(pf->pdev)) in otx2_free_hw_resources()
1770 otx2_clean_qos_queues(pf); in otx2_free_hw_resources()
1774 if (!is_otx2_lbkvf(pf->pdev)) in otx2_free_hw_resources()
1775 otx2_nix_config_bp(pf, false); in otx2_free_hw_resources()
1785 otx2_cleanup_rx_cqes(pf, cq, qidx); in otx2_free_hw_resources()
1787 otx2_cleanup_tx_cqes(pf, cq); in otx2_free_hw_resources()
1789 otx2_free_pending_sqe(pf); in otx2_free_hw_resources()
1791 otx2_free_sq_res(pf); in otx2_free_hw_resources()
1794 otx2_free_aura_ptr(pf, AURA_NIX_RQ); in otx2_free_hw_resources()
1796 otx2_free_cq_res(pf); in otx2_free_hw_resources()
1799 if (!otx2_rep_dev(pf->pdev)) in otx2_free_hw_resources()
1800 cn10k_free_all_ipolicers(pf); in otx2_free_hw_resources()
1807 if (!(pf->flags & OTX2_FLAG_PF_SHUTDOWN)) in otx2_free_hw_resources()
1810 dev_err(pf->dev, "%s failed to free nixlf\n", __func__); in otx2_free_hw_resources()
1817 otx2_aura_pool_free(pf); in otx2_free_hw_resources()
1824 dev_err(pf->dev, "%s failed to free npalf\n", __func__); in otx2_free_hw_resources()
1838 /* check if there are any trusted VFs associated with the PF netdev */ in otx2_promisc_use_mce_list()
1845 static void otx2_do_set_rx_mode(struct otx2_nic *pf) in otx2_do_set_rx_mode() argument
1847 struct net_device *netdev = pf->netdev; in otx2_do_set_rx_mode()
1855 (netdev_uc_count(netdev) > pf->flow_cfg->ucast_flt_cnt)) { in otx2_do_set_rx_mode()
1863 mutex_lock(&pf->mbox.lock); in otx2_do_set_rx_mode()
1864 req = otx2_mbox_alloc_msg_nix_set_rx_mode(&pf->mbox); in otx2_do_set_rx_mode()
1866 mutex_unlock(&pf->mbox.lock); in otx2_do_set_rx_mode()
1877 if (otx2_promisc_use_mce_list(pf)) in otx2_do_set_rx_mode()
1880 otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_rx_mode()
1881 mutex_unlock(&pf->mbox.lock); in otx2_do_set_rx_mode()
1924 int otx2_alloc_queue_mem(struct otx2_nic *pf) in otx2_alloc_queue_mem() argument
1926 struct otx2_qset *qset = &pf->qset; in otx2_alloc_queue_mem()
1933 pf->hw.non_qos_queues = pf->hw.tx_queues + pf->hw.xdp_queues; in otx2_alloc_queue_mem()
1934 pf->hw.cint_cnt = max3(pf->hw.rx_queues, pf->hw.tx_queues, in otx2_alloc_queue_mem()
1935 pf->hw.tc_tx_queues); in otx2_alloc_queue_mem()
1937 pf->qset.cq_cnt = pf->hw.rx_queues + otx2_get_total_tx_queues(pf); in otx2_alloc_queue_mem()
1939 qset->napi = kcalloc(pf->hw.cint_cnt, sizeof(*cq_poll), GFP_KERNEL); in otx2_alloc_queue_mem()
1948 qset->cq = kcalloc(pf->qset.cq_cnt, in otx2_alloc_queue_mem()
1953 qset->sq = kcalloc(otx2_get_total_tx_queues(pf), in otx2_alloc_queue_mem()
1958 qset->rq = kcalloc(pf->hw.rx_queues, in otx2_alloc_queue_mem()
1973 struct otx2_nic *pf = netdev_priv(netdev); in otx2_open() local
1975 struct otx2_qset *qset = &pf->qset; in otx2_open()
1981 err = otx2_alloc_queue_mem(pf); in otx2_open()
1985 err = otx2_init_hw_resources(pf); in otx2_open()
1990 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_open()
1999 (qidx < pf->hw.rx_queues) ? qidx : CINT_INVALID_CQ; in otx2_open()
2000 cq_poll->cq_ids[CQ_TX] = (qidx < pf->hw.tx_queues) ? in otx2_open()
2001 qidx + pf->hw.rx_queues : CINT_INVALID_CQ; in otx2_open()
2002 if (pf->xdp_prog) in otx2_open()
2003 cq_poll->cq_ids[CQ_XDP] = (qidx < pf->hw.xdp_queues) ? in otx2_open()
2004 (qidx + pf->hw.rx_queues + in otx2_open()
2005 pf->hw.tx_queues) : in otx2_open()
2010 cq_poll->cq_ids[CQ_QOS] = (qidx < pf->hw.tc_tx_queues) ? in otx2_open()
2011 (qidx + pf->hw.rx_queues + in otx2_open()
2012 pf->hw.non_qos_queues) : in otx2_open()
2015 cq_poll->dev = (void *)pf; in otx2_open()
2023 err = otx2_hw_set_mtu(pf, netdev->mtu); in otx2_open()
2028 otx2_setup_segmentation(pf); in otx2_open()
2031 err = otx2_rss_init(pf); in otx2_open()
2036 vec = pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START; in otx2_open()
2037 irq_name = &pf->hw.irq_name[vec * NAME_SIZE]; in otx2_open()
2039 snprintf(irq_name, NAME_SIZE, "%s-qerr", pf->netdev->name); in otx2_open()
2041 err = request_irq(pci_irq_vector(pf->pdev, vec), in otx2_open()
2042 otx2_q_intr_handler, 0, irq_name, pf); in otx2_open()
2044 dev_err(pf->dev, in otx2_open()
2046 rvu_get_pf(pf->pdev, pf->pcifunc)); in otx2_open()
2051 otx2_write64(pf, NIX_LF_QINTX_ENA_W1S(0), BIT_ULL(0)); in otx2_open()
2054 vec = pf->hw.nix_msixoff + NIX_LF_CINT_VEC_START; in otx2_open()
2055 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_open()
2056 irq_name = &pf->hw.irq_name[vec * NAME_SIZE]; in otx2_open()
2060 pf->netdev->name, qidx); in otx2_open()
2062 dev_err(pf->dev, in otx2_open()
2064 rvu_get_pf(pf->pdev, pf->pcifunc), qidx); in otx2_open()
2069 err = request_irq(pci_irq_vector(pf->pdev, vec), in otx2_open()
2073 dev_err(pf->dev, in otx2_open()
2075 rvu_get_pf(pf->pdev, pf->pcifunc), qidx); in otx2_open()
2080 otx2_config_irq_coalescing(pf, qidx); in otx2_open()
2083 otx2_write64(pf, NIX_LF_CINTX_INT(qidx), BIT_ULL(0)); in otx2_open()
2084 otx2_write64(pf, NIX_LF_CINTX_ENA_W1S(qidx), BIT_ULL(0)); in otx2_open()
2087 otx2_set_cints_affinity(pf); in otx2_open()
2089 if (pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT) in otx2_open()
2090 otx2_enable_rxvlan(pf, true); in otx2_open()
2093 if (pf->flags & OTX2_FLAG_TX_TSTAMP_ENABLED) { in otx2_open()
2094 pf->flags &= ~OTX2_FLAG_TX_TSTAMP_ENABLED; in otx2_open()
2095 otx2_config_hw_tx_tstamp(pf, true); in otx2_open()
2097 if (pf->flags & OTX2_FLAG_RX_TSTAMP_ENABLED) { in otx2_open()
2098 pf->flags &= ~OTX2_FLAG_RX_TSTAMP_ENABLED; in otx2_open()
2099 otx2_config_hw_rx_tstamp(pf, true); in otx2_open()
2102 pf->flags &= ~OTX2_FLAG_INTF_DOWN; in otx2_open()
2103 pf->flags &= ~OTX2_FLAG_PORT_UP; in otx2_open()
2108 otx2_qos_config_txschq(pf); in otx2_open()
2111 if (pf->linfo.link_up && !(pf->pcifunc & RVU_PFVF_FUNC_MASK)) in otx2_open()
2112 otx2_handle_link_event(pf); in otx2_open()
2115 if (pf->flags & OTX2_FLAG_DMACFLTR_SUPPORT) in otx2_open()
2116 otx2_dmacflt_reinstall_flows(pf); in otx2_open()
2118 otx2_tc_apply_ingress_police_rules(pf); in otx2_open()
2120 err = otx2_rxtx_enable(pf, true); in otx2_open()
2131 otx2_do_set_rx_mode(pf); in otx2_open()
2136 otx2_rxtx_enable(pf, false); in otx2_open()
2140 pf->flags |= OTX2_FLAG_INTF_DOWN; in otx2_open()
2142 otx2_free_cints(pf, qidx); in otx2_open()
2143 vec = pci_irq_vector(pf->pdev, in otx2_open()
2144 pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START); in otx2_open()
2145 otx2_write64(pf, NIX_LF_QINTX_ENA_W1C(0), BIT_ULL(0)); in otx2_open()
2146 free_irq(vec, pf); in otx2_open()
2148 otx2_disable_napi(pf); in otx2_open()
2149 otx2_free_hw_resources(pf); in otx2_open()
2158 struct otx2_nic *pf = netdev_priv(netdev); in otx2_stop() local
2160 struct otx2_qset *qset = &pf->qset; in otx2_stop()
2164 if (pf->flags & OTX2_FLAG_INTF_DOWN) in otx2_stop()
2170 pf->flags |= OTX2_FLAG_INTF_DOWN; in otx2_stop()
2175 otx2_rxtx_enable(pf, false); in otx2_stop()
2178 pf->hw.rss_info.enable = false; in otx2_stop()
2181 vec = pci_irq_vector(pf->pdev, in otx2_stop()
2182 pf->hw.nix_msixoff + NIX_LF_QINT_VEC_START); in otx2_stop()
2183 otx2_write64(pf, NIX_LF_QINTX_ENA_W1C(0), BIT_ULL(0)); in otx2_stop()
2184 free_irq(vec, pf); in otx2_stop()
2187 vec = pf->hw.nix_msixoff + NIX_LF_CINT_VEC_START; in otx2_stop()
2188 for (qidx = 0; qidx < pf->hw.cint_cnt; qidx++) { in otx2_stop()
2190 otx2_write64(pf, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0)); in otx2_stop()
2192 synchronize_irq(pci_irq_vector(pf->pdev, vec)); in otx2_stop()
2201 for (wrk = 0; wrk < pf->qset.cq_cnt; wrk++) in otx2_stop()
2202 cancel_delayed_work_sync(&pf->refill_wrk[wrk].pool_refill_work); in otx2_stop()
2203 devm_kfree(pf->dev, pf->refill_wrk); in otx2_stop()
2205 otx2_free_hw_resources(pf); in otx2_stop()
2206 otx2_free_cints(pf, pf->hw.cint_cnt); in otx2_stop()
2207 otx2_disable_napi(pf); in otx2_stop()
2221 struct otx2_nic *pf = netdev_priv(netdev); in otx2_xmit() local
2231 sq_idx = (qidx >= pf->hw.tx_queues) ? (qidx + pf->hw.xdp_queues) : qidx; in otx2_xmit()
2235 (!skb_shinfo(skb)->gso_size && skb->len > pf->tx_max_pktlen)) { in otx2_xmit()
2236 dev_stats = &pf->hw.dev_stats; in otx2_xmit()
2242 sq = &pf->qset.sq[sq_idx]; in otx2_xmit()
2245 if (!otx2_sq_append_skb(pf, txq, sq, skb, qidx)) { in otx2_xmit()
2260 static int otx2_qos_select_htb_queue(struct otx2_nic *pf, struct sk_buff *skb, in otx2_qos_select_htb_queue() argument
2268 classid = READ_ONCE(pf->qos.defcls); in otx2_qos_select_htb_queue()
2273 return otx2_get_txq_by_classid(pf, classid); in otx2_qos_select_htb_queue()
2279 struct otx2_nic *pf = netdev_priv(netdev); in otx2_select_queue() local
2286 qos_enabled = netdev->real_num_tx_queues > pf->hw.tx_queues; in otx2_select_queue()
2291 u16 htb_maj_id = smp_load_acquire(&pf->qos.maj_id); in otx2_select_queue()
2294 txq = otx2_qos_select_htb_queue(pf, skb, htb_maj_id); in otx2_select_queue()
2307 if ((vlan_prio > pf->hw.tx_queues - 1) || in otx2_select_queue()
2308 !pf->pfc_alloc_status[vlan_prio]) in otx2_select_queue()
2317 return txq % pf->hw.tx_queues; in otx2_select_queue()
2336 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_rx_mode() local
2338 queue_work(pf->otx2_wq, &pf->rx_mode_work); in otx2_set_rx_mode()
2343 struct otx2_nic *pf = container_of(work, struct otx2_nic, rx_mode_work); in otx2_rx_mode_wrk_handler() local
2345 otx2_do_set_rx_mode(pf); in otx2_rx_mode_wrk_handler()
2352 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_features() local
2355 return otx2_cgx_config_loopback(pf, in otx2_set_features()
2359 return otx2_enable_rxvlan(pf, in otx2_set_features()
2371 struct otx2_nic *pf = container_of(work, struct otx2_nic, reset_task); in otx2_reset_task() local
2373 if (!netif_running(pf->netdev)) in otx2_reset_task()
2377 otx2_stop(pf->netdev); in otx2_reset_task()
2378 pf->reset_count++; in otx2_reset_task()
2379 otx2_open(pf->netdev); in otx2_reset_task()
2380 netif_trans_update(pf->netdev); in otx2_reset_task()
2530 static int otx2_do_set_vf_mac(struct otx2_nic *pf, int vf, const u8 *mac) in otx2_do_set_vf_mac() argument
2535 mutex_lock(&pf->mbox.lock); in otx2_do_set_vf_mac()
2536 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); in otx2_do_set_vf_mac()
2545 req->channel = pf->hw.rx_chan_base; in otx2_do_set_vf_mac()
2552 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_mac()
2554 mutex_unlock(&pf->mbox.lock); in otx2_do_set_vf_mac()
2560 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_vf_mac() local
2561 struct pci_dev *pdev = pf->pdev; in otx2_set_vf_mac()
2568 if (vf >= pf->total_vfs) in otx2_set_vf_mac()
2574 config = &pf->vf_configs[vf]; in otx2_set_vf_mac()
2577 ret = otx2_do_set_vf_mac(pf, vf, mac); in otx2_set_vf_mac()
2585 static int otx2_do_set_vf_vlan(struct otx2_nic *pf, int vf, u16 vlan, u8 qos, in otx2_do_set_vf_vlan() argument
2588 struct otx2_flow_config *flow_cfg = pf->flow_cfg; in otx2_do_set_vf_vlan()
2597 config = &pf->vf_configs[vf]; in otx2_do_set_vf_vlan()
2602 mutex_lock(&pf->mbox.lock); in otx2_do_set_vf_vlan()
2606 vtag_req = otx2_mbox_alloc_msg_nix_vtag_cfg(&pf->mbox); in otx2_do_set_vf_vlan()
2615 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2622 del_req = otx2_mbox_alloc_msg_npc_delete_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2630 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2635 del_req = otx2_mbox_alloc_msg_npc_delete_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2643 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2649 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2662 req->channel = pf->hw.rx_chan_base; in otx2_do_set_vf_vlan()
2670 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2675 vtag_req = otx2_mbox_alloc_msg_nix_vtag_cfg(&pf->mbox); in otx2_do_set_vf_vlan()
2687 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2692 (&pf->mbox.mbox, 0, &vtag_req->hdr); in otx2_do_set_vf_vlan()
2699 req = otx2_mbox_alloc_msg_npc_install_flow(&pf->mbox); in otx2_do_set_vf_vlan()
2709 req->channel = pf->hw.tx_chan_base; in otx2_do_set_vf_vlan()
2717 err = otx2_sync_mbox_msg(&pf->mbox); in otx2_do_set_vf_vlan()
2720 mutex_unlock(&pf->mbox.lock); in otx2_do_set_vf_vlan()
2727 struct otx2_nic *pf = netdev_priv(netdev); in otx2_set_vf_vlan() local
2728 struct pci_dev *pdev = pf->pdev; in otx2_set_vf_vlan()
2743 if (!(pf->flags & OTX2_FLAG_VF_VLAN_SUPPORT)) in otx2_set_vf_vlan()
2746 return otx2_do_set_vf_vlan(pf, vf, vlan, qos, proto); in otx2_set_vf_vlan()
2752 struct otx2_nic *pf = netdev_priv(netdev); in otx2_get_vf_config() local
2753 struct pci_dev *pdev = pf->pdev; in otx2_get_vf_config()
2762 config = &pf->vf_configs[vf]; in otx2_get_vf_config()
2771 static int otx2_xdp_xmit_tx(struct otx2_nic *pf, struct xdp_frame *xdpf, in otx2_xdp_xmit_tx() argument
2777 dma_addr = otx2_dma_map_page(pf, virt_to_page(xdpf->data), in otx2_xdp_xmit_tx()
2780 if (dma_mapping_error(pf->dev, dma_addr)) in otx2_xdp_xmit_tx()
2783 err = otx2_xdp_sq_append_pkt(pf, xdpf, dma_addr, xdpf->len, in otx2_xdp_xmit_tx()
2786 otx2_dma_unmap_page(pf, dma_addr, xdpf->len, DMA_TO_DEVICE); in otx2_xdp_xmit_tx()
2796 struct otx2_nic *pf = netdev_priv(netdev); in otx2_xdp_xmit() local
2804 qidx += pf->hw.tx_queues; in otx2_xdp_xmit()
2805 sq = pf->xdp_prog ? &pf->qset.sq[qidx] : NULL; in otx2_xdp_xmit()
2818 err = otx2_xdp_xmit_tx(pf, xdpf, qidx); in otx2_xdp_xmit()
2825 static int otx2_xdp_setup(struct otx2_nic *pf, struct bpf_prog *prog) in otx2_xdp_setup() argument
2827 struct net_device *dev = pf->netdev; in otx2_xdp_setup()
2828 bool if_up = netif_running(pf->netdev); in otx2_xdp_setup()
2837 otx2_stop(pf->netdev); in otx2_xdp_setup()
2839 old_prog = xchg(&pf->xdp_prog, prog); in otx2_xdp_setup()
2844 if (pf->xdp_prog) in otx2_xdp_setup()
2845 bpf_prog_add(pf->xdp_prog, pf->hw.rx_queues - 1); in otx2_xdp_setup()
2850 if (pf->xdp_prog) { in otx2_xdp_setup()
2851 pf->hw.xdp_queues = pf->hw.rx_queues; in otx2_xdp_setup()
2854 pf->hw.xdp_queues = 0; in otx2_xdp_setup()
2859 otx2_open(pf->netdev); in otx2_xdp_setup()
2866 struct otx2_nic *pf = netdev_priv(netdev); in otx2_xdp() local
2870 return otx2_xdp_setup(pf, xdp->prog); in otx2_xdp()
2872 return otx2_xsk_pool_setup(pf, xdp->xsk.pool, xdp->xsk.queue_id); in otx2_xdp()
2878 static int otx2_set_vf_permissions(struct otx2_nic *pf, int vf, in otx2_set_vf_permissions() argument
2884 mutex_lock(&pf->mbox.lock); in otx2_set_vf_permissions()
2885 req = otx2_mbox_alloc_msg_set_vf_perm(&pf->mbox); in otx2_set_vf_permissions()
2895 if (pf->vf_configs[vf].trusted) in otx2_set_vf_permissions()
2900 rc = otx2_sync_mbox_msg(&pf->mbox); in otx2_set_vf_permissions()
2902 mutex_unlock(&pf->mbox.lock); in otx2_set_vf_permissions()
2909 struct otx2_nic *pf = netdev_priv(netdev); in otx2_ndo_set_vf_trust() local
2910 struct pci_dev *pdev = pf->pdev; in otx2_ndo_set_vf_trust()
2916 if (pf->vf_configs[vf].trusted == enable) in otx2_ndo_set_vf_trust()
2919 pf->vf_configs[vf].trusted = enable; in otx2_ndo_set_vf_trust()
2920 rc = otx2_set_vf_permissions(pf, vf, OTX2_TRUSTED_VF); in otx2_ndo_set_vf_trust()
2923 pf->vf_configs[vf].trusted = !enable; in otx2_ndo_set_vf_trust()
2925 netdev_info(pf->netdev, "VF %d is %strusted\n", in otx2_ndo_set_vf_trust()
2956 int otx2_wq_init(struct otx2_nic *pf) in otx2_wq_init() argument
2958 pf->otx2_wq = create_singlethread_workqueue("otx2_wq"); in otx2_wq_init()
2959 if (!pf->otx2_wq) in otx2_wq_init()
2962 INIT_WORK(&pf->rx_mode_work, otx2_rx_mode_wrk_handler); in otx2_wq_init()
2963 INIT_WORK(&pf->reset_task, otx2_reset_task); in otx2_wq_init()
2985 int otx2_realloc_msix_vectors(struct otx2_nic *pf) in otx2_realloc_msix_vectors() argument
2987 struct otx2_hw *hw = &pf->hw; in otx2_realloc_msix_vectors()
2996 otx2_disable_mbox_intr(pf); in otx2_realloc_msix_vectors()
3000 dev_err(pf->dev, "%s: Failed to realloc %d IRQ vectors\n", in otx2_realloc_msix_vectors()
3005 return otx2_register_mbox_intr(pf, false); in otx2_realloc_msix_vectors()
3009 static int otx2_sriov_vfcfg_init(struct otx2_nic *pf) in otx2_sriov_vfcfg_init() argument
3013 pf->vf_configs = devm_kcalloc(pf->dev, pf->total_vfs, in otx2_sriov_vfcfg_init()
3016 if (!pf->vf_configs) in otx2_sriov_vfcfg_init()
3019 for (i = 0; i < pf->total_vfs; i++) { in otx2_sriov_vfcfg_init()
3020 pf->vf_configs[i].pf = pf; in otx2_sriov_vfcfg_init()
3021 pf->vf_configs[i].intf_down = true; in otx2_sriov_vfcfg_init()
3022 pf->vf_configs[i].trusted = false; in otx2_sriov_vfcfg_init()
3023 INIT_DELAYED_WORK(&pf->vf_configs[i].link_event_work, in otx2_sriov_vfcfg_init()
3030 static void otx2_sriov_vfcfg_cleanup(struct otx2_nic *pf) in otx2_sriov_vfcfg_cleanup() argument
3034 if (!pf->vf_configs) in otx2_sriov_vfcfg_cleanup()
3037 for (i = 0; i < pf->total_vfs; i++) { in otx2_sriov_vfcfg_cleanup()
3038 cancel_delayed_work_sync(&pf->vf_configs[i].link_event_work); in otx2_sriov_vfcfg_cleanup()
3039 otx2_set_vf_permissions(pf, i, OTX2_RESET_VF_PERM); in otx2_sriov_vfcfg_cleanup()
3043 int otx2_init_rsrc(struct pci_dev *pdev, struct otx2_nic *pf) in otx2_init_rsrc() argument
3046 struct otx2_hw *hw = &pf->hw; in otx2_init_rsrc()
3061 pf->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); in otx2_init_rsrc()
3062 if (!pf->reg_base) { in otx2_init_rsrc()
3067 err = otx2_check_pf_usable(pf); in otx2_init_rsrc()
3071 if (!is_cn20k(pf->pdev)) in otx2_init_rsrc()
3084 otx2_setup_dev_hw_settings(pf); in otx2_init_rsrc()
3086 if (is_cn20k(pf->pdev)) in otx2_init_rsrc()
3087 cn20k_init(pf); in otx2_init_rsrc()
3089 otx2_init_hw_ops(pf); in otx2_init_rsrc()
3091 /* Init PF <=> AF mailbox stuff */ in otx2_init_rsrc()
3092 err = otx2_pfaf_mbox_init(pf); in otx2_init_rsrc()
3097 err = otx2_register_mbox_intr(pf, true); in otx2_init_rsrc()
3101 /* Request AF to attach NPA and NIX LFs to this PF. in otx2_init_rsrc()
3102 * NIX and NPA LFs are needed for this PF to function as a NIC. in otx2_init_rsrc()
3104 err = otx2_attach_npa_nix(pf); in otx2_init_rsrc()
3108 err = otx2_realloc_msix_vectors(pf); in otx2_init_rsrc()
3112 err = cn10k_lmtst_init(pf); in otx2_init_rsrc()
3119 if (pf->hw.lmt_info) in otx2_init_rsrc()
3120 free_percpu(pf->hw.lmt_info); in otx2_init_rsrc()
3121 if (test_bit(CN10K_LMTST, &pf->hw.cap_flag)) in otx2_init_rsrc()
3122 qmem_free(pf->dev, pf->dync_lmt); in otx2_init_rsrc()
3123 otx2_detach_resources(&pf->mbox); in otx2_init_rsrc()
3125 otx2_disable_mbox_intr(pf); in otx2_init_rsrc()
3127 otx2_pfaf_mbox_destroy(pf); in otx2_init_rsrc()
3140 struct otx2_nic *pf; in otx2_probe() local
3167 netdev = alloc_etherdev_mqs(sizeof(*pf), qcount + qos_txqs, qcount); in otx2_probe()
3173 pf = netdev_priv(netdev); in otx2_probe()
3174 pf->netdev = netdev; in otx2_probe()
3175 pf->pdev = pdev; in otx2_probe()
3176 pf->dev = dev; in otx2_probe()
3177 pf->total_vfs = pci_sriov_get_totalvfs(pdev); in otx2_probe()
3178 pf->flags |= OTX2_FLAG_INTF_DOWN; in otx2_probe()
3180 hw = &pf->hw; in otx2_probe()
3190 err = otx2_init_rsrc(pdev, pf); in otx2_probe()
3202 otx2_ptp_init(pf); in otx2_probe()
3215 pf->iommu_domain = iommu_get_domain_for_dev(dev); in otx2_probe()
3223 err = otx2_mcam_flow_init(pf); in otx2_probe()
3227 otx2_set_hw_capabilities(pf); in otx2_probe()
3229 err = cn10k_mcs_init(pf); in otx2_probe()
3233 if (pf->flags & OTX2_FLAG_NTUPLE_SUPPORT) in otx2_probe()
3236 if (pf->flags & OTX2_FLAG_UCAST_FLTR_SUPPORT) in otx2_probe()
3243 if (pf->flags & OTX2_FLAG_RX_VLAN_SUPPORT) in otx2_probe()
3249 if (pf->flags & OTX2_FLAG_TC_FLOWER_SUPPORT) in otx2_probe()
3261 netdev->max_mtu = otx2_get_max_mtu(pf); in otx2_probe()
3265 otx2_reset_mac_stats(pf); in otx2_probe()
3277 err = otx2_wq_init(pf); in otx2_probe()
3283 err = otx2_init_tc(pf); in otx2_probe()
3287 err = otx2_register_dl(pf); in otx2_probe()
3292 err = otx2_sriov_vfcfg_init(pf); in otx2_probe()
3297 otx2_cgx_config_linkevents(pf, true); in otx2_probe()
3299 pf->af_xdp_zc_qidx = bitmap_zalloc(qcount, GFP_KERNEL); in otx2_probe()
3300 if (!pf->af_xdp_zc_qidx) { in otx2_probe()
3311 otx2_qos_init(pf, qos_txqs); in otx2_probe()
3317 bitmap_free(pf->af_xdp_zc_qidx); in otx2_probe()
3320 otx2_sriov_vfcfg_cleanup(pf); in otx2_probe()
3322 otx2_shutdown_tc(pf); in otx2_probe()
3324 otx2_mcam_flow_del(pf); in otx2_probe()
3328 cn10k_ipsec_clean(pf); in otx2_probe()
3330 cn10k_mcs_free(pf); in otx2_probe()
3332 otx2_mcam_flow_del(pf); in otx2_probe()
3334 otx2_ptp_destroy(pf); in otx2_probe()
3336 if (pf->hw.lmt_info) in otx2_probe()
3337 free_percpu(pf->hw.lmt_info); in otx2_probe()
3338 if (test_bit(CN10K_LMTST, &pf->hw.cap_flag)) in otx2_probe()
3339 qmem_free(pf->dev, pf->dync_lmt); in otx2_probe()
3340 otx2_detach_resources(&pf->mbox); in otx2_probe()
3341 otx2_disable_mbox_intr(pf); in otx2_probe()
3342 otx2_pfaf_mbox_destroy(pf); in otx2_probe()
3356 struct otx2_nic *pf; in otx2_vf_link_event_task() local
3361 vf_idx = config - config->pf->vf_configs; in otx2_vf_link_event_task()
3362 pf = config->pf; in otx2_vf_link_event_task()
3367 mutex_lock(&pf->mbox.lock); in otx2_vf_link_event_task()
3371 if (!otx2_mbox_wait_for_zero(&pf->mbox_pfvf[0].mbox_up, vf_idx)) { in otx2_vf_link_event_task()
3373 mutex_unlock(&pf->mbox.lock); in otx2_vf_link_event_task()
3377 msghdr = otx2_mbox_alloc_msg_rsp(&pf->mbox_pfvf[0].mbox_up, vf_idx, in otx2_vf_link_event_task()
3380 dev_err(pf->dev, "Failed to create VF%d link event\n", vf_idx); in otx2_vf_link_event_task()
3381 mutex_unlock(&pf->mbox.lock); in otx2_vf_link_event_task()
3388 req->hdr.pcifunc = pf->pcifunc; in otx2_vf_link_event_task()
3389 memcpy(&req->link_info, &pf->linfo, sizeof(req->link_info)); in otx2_vf_link_event_task()
3391 otx2_mbox_wait_for_zero(&pf->mbox_pfvf[0].mbox_up, vf_idx); in otx2_vf_link_event_task()
3393 otx2_sync_mbox_up_msg(&pf->mbox_pfvf[0], vf_idx); in otx2_vf_link_event_task()
3395 mutex_unlock(&pf->mbox.lock); in otx2_vf_link_event_task()
3401 struct otx2_nic *pf = netdev_priv(netdev); in otx2_sriov_enable() local
3404 /* Init PF <=> VF mailbox stuff */ in otx2_sriov_enable()
3405 ret = otx2_pfvf_mbox_init(pf, numvfs); in otx2_sriov_enable()
3409 ret = otx2_register_pfvf_mbox_intr(pf, numvfs); in otx2_sriov_enable()
3413 ret = otx2_pf_flr_init(pf, numvfs); in otx2_sriov_enable()
3417 ret = otx2_register_flr_me_intr(pf, numvfs); in otx2_sriov_enable()
3427 otx2_disable_flr_me_intr(pf); in otx2_sriov_enable()
3429 otx2_flr_wq_destroy(pf); in otx2_sriov_enable()
3431 otx2_disable_pfvf_mbox_intr(pf, numvfs); in otx2_sriov_enable()
3433 otx2_pfvf_mbox_destroy(pf); in otx2_sriov_enable()
3440 struct otx2_nic *pf = netdev_priv(netdev); in otx2_sriov_disable() local
3448 otx2_disable_flr_me_intr(pf); in otx2_sriov_disable()
3449 otx2_flr_wq_destroy(pf); in otx2_sriov_disable()
3450 otx2_disable_pfvf_mbox_intr(pf, numvfs); in otx2_sriov_disable()
3451 otx2_pfvf_mbox_destroy(pf); in otx2_sriov_disable()
3464 static void otx2_ndc_sync(struct otx2_nic *pf) in otx2_ndc_sync() argument
3466 struct mbox *mbox = &pf->mbox; in otx2_ndc_sync()
3482 dev_err(pf->dev, "NDC sync operation failed\n"); in otx2_ndc_sync()
3490 struct otx2_nic *pf; in otx2_remove() local
3495 pf = netdev_priv(netdev); in otx2_remove()
3497 pf->flags |= OTX2_FLAG_PF_SHUTDOWN; in otx2_remove()
3499 if (pf->flags & OTX2_FLAG_TX_TSTAMP_ENABLED) in otx2_remove()
3500 otx2_config_hw_tx_tstamp(pf, false); in otx2_remove()
3501 if (pf->flags & OTX2_FLAG_RX_TSTAMP_ENABLED) in otx2_remove()
3502 otx2_config_hw_rx_tstamp(pf, false); in otx2_remove()
3505 if (pf->flags & OTX2_FLAG_RX_PAUSE_ENABLED || in otx2_remove()
3506 (pf->flags & OTX2_FLAG_TX_PAUSE_ENABLED)) { in otx2_remove()
3507 pf->flags &= ~OTX2_FLAG_RX_PAUSE_ENABLED; in otx2_remove()
3508 pf->flags &= ~OTX2_FLAG_TX_PAUSE_ENABLED; in otx2_remove()
3509 otx2_config_pause_frm(pf); in otx2_remove()
3514 if (pf->pfc_en) { in otx2_remove()
3515 pf->pfc_en = 0; in otx2_remove()
3516 otx2_config_priority_flow_ctrl(pf); in otx2_remove()
3519 cancel_work_sync(&pf->reset_task); in otx2_remove()
3521 otx2_cgx_config_linkevents(pf, false); in otx2_remove()
3523 otx2_unregister_dl(pf); in otx2_remove()
3525 cn10k_ipsec_clean(pf); in otx2_remove()
3526 cn10k_mcs_free(pf); in otx2_remove()
3527 otx2_sriov_disable(pf->pdev); in otx2_remove()
3528 otx2_sriov_vfcfg_cleanup(pf); in otx2_remove()
3529 if (pf->otx2_wq) in otx2_remove()
3530 destroy_workqueue(pf->otx2_wq); in otx2_remove()
3532 otx2_ptp_destroy(pf); in otx2_remove()
3533 otx2_mcam_flow_del(pf); in otx2_remove()
3534 otx2_shutdown_tc(pf); in otx2_remove()
3535 otx2_shutdown_qos(pf); in otx2_remove()
3536 otx2_ndc_sync(pf); in otx2_remove()
3537 otx2_detach_resources(&pf->mbox); in otx2_remove()
3538 if (pf->hw.lmt_info) in otx2_remove()
3539 free_percpu(pf->hw.lmt_info); in otx2_remove()
3540 if (test_bit(CN10K_LMTST, &pf->hw.cap_flag)) in otx2_remove()
3541 qmem_free(pf->dev, pf->dync_lmt); in otx2_remove()
3542 otx2_disable_mbox_intr(pf); in otx2_remove()
3543 otx2_pfaf_mbox_destroy(pf); in otx2_remove()
3544 pci_free_irq_vectors(pf->pdev); in otx2_remove()