27 	struct otx2_nic *pf = pf_irq;  in cn20k_pfaf_mbox_intr_handler()  local
28 	struct mbox *mw = &pf->mbox;  in cn20k_pfaf_mbox_intr_handler()
34 	pf_trig_val = otx2_read64(pf, RVU_PF_INT) & 0x3ULL;  in cn20k_pfaf_mbox_intr_handler()
37 	otx2_write64(pf, RVU_PF_INT, pf_trig_val);  in cn20k_pfaf_mbox_intr_handler()
46 			queue_work(pf->mbox_wq, &mw->mbox_up_wrk);  in cn20k_pfaf_mbox_intr_handler()
48 		trace_otx2_msg_interrupt(pf->pdev, "UP message from AF to PF",  in cn20k_pfaf_mbox_intr_handler()
59 			queue_work(pf->mbox_wq, &mw->mbox_wrk);  in cn20k_pfaf_mbox_intr_handler()
60 		trace_otx2_msg_interrupt(pf->pdev, "DOWN reply from AF to PF",  in cn20k_pfaf_mbox_intr_handler()
83 		/* Check for PF => VF response messages */  in cn20k_vfaf_mbox_intr_handler()
97 		/* Check for PF => VF notification messages */  in cn20k_vfaf_mbox_intr_handler()
113 void cn20k_enable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)  in cn20k_enable_pfvf_mbox_intr()  argument
115 	/* Clear PF <=> VF mailbox IRQ */  in cn20k_enable_pfvf_mbox_intr()
116 	otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(0), ~0ull);  in cn20k_enable_pfvf_mbox_intr()
117 	otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(1), ~0ull);  in cn20k_enable_pfvf_mbox_intr()
118 	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull);  in cn20k_enable_pfvf_mbox_intr()
119 	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull);  in cn20k_enable_pfvf_mbox_intr()
121 	/* Enable PF <=> VF mailbox IRQ */  in cn20k_enable_pfvf_mbox_intr()
122 	otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(0), INTR_MASK(numvfs));  in cn20k_enable_pfvf_mbox_intr()
123 	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(0), INTR_MASK(numvfs));  in cn20k_enable_pfvf_mbox_intr()
126 		otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(1),  in cn20k_enable_pfvf_mbox_intr()
128 		otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(1),  in cn20k_enable_pfvf_mbox_intr()
133 void cn20k_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)  in cn20k_disable_pfvf_mbox_intr()  argument
137 	/* Disable PF <=> VF mailbox IRQ */  in cn20k_disable_pfvf_mbox_intr()
138 	otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(0), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
139 	otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(1), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
140 	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
141 	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
143 	otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(0), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
144 	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
147 		otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(1), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
148 		otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull);  in cn20k_disable_pfvf_mbox_intr()
153 		vector = pci_irq_vector(pf->pdev, intr_vec);  in cn20k_disable_pfvf_mbox_intr()
154 		free_irq(vector, pf->hw.pfvf_irq_devid[vec]);  in cn20k_disable_pfvf_mbox_intr()
161 	struct otx2_nic *pf = irq_data->pf;  in cn20k_pfvf_mbox_intr_handler()  local
169 	intr = otx2_read64(pf, irq_data->intr_status);  in cn20k_pfvf_mbox_intr_handler()
170 	otx2_write64(pf, irq_data->intr_status, intr);  in cn20k_pfvf_mbox_intr_handler()
171 	mbox = pf->mbox_pfvf;  in cn20k_pfvf_mbox_intr_handler()
174 		trace_otx2_msg_interrupt(pf->pdev, "VF(s) to PF", intr);  in cn20k_pfvf_mbox_intr_handler()
176 	irq_data->pf_queue_work_hdlr(mbox, pf->mbox_pfvf_wq, irq_data->start,  in cn20k_pfvf_mbox_intr_handler()
182 int cn20k_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)  in cn20k_register_pfvf_mbox_intr()  argument
184 	struct otx2_hw *hw = &pf->hw;  in cn20k_register_pfvf_mbox_intr()
189 	/* irq data for 4 PF intr vectors */  in cn20k_register_pfvf_mbox_intr()
190 	irq_data = devm_kcalloc(pf->dev, 4,  in cn20k_register_pfvf_mbox_intr()
225 		irq_data[vec].pf = pf;  in cn20k_register_pfvf_mbox_intr()
229 		if (pf->pcifunc)  in cn20k_register_pfvf_mbox_intr()
231 				 "RVUPF%d_VF%d Mbox%d", rvu_get_pf(pf->pdev,  in cn20k_register_pfvf_mbox_intr()
232 				 pf->pcifunc), vec / 2, vec % 2);  in cn20k_register_pfvf_mbox_intr()
238 		ret = request_irq(pci_irq_vector(pf->pdev, intr_vec),  in cn20k_register_pfvf_mbox_intr()
239 				  pf->hw_ops->pfvf_mbox_intr_handler, 0,  in cn20k_register_pfvf_mbox_intr()
243 			dev_err(pf->dev,  in cn20k_register_pfvf_mbox_intr()
249 	cn20k_enable_pfvf_mbox_intr(pf, numvfs);  in cn20k_register_pfvf_mbox_intr()